1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=SSE --check-prefix=SSE2 3 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+ssse3 | FileCheck %s --check-prefix=SSE --check-prefix=SSSE3 4 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=SSE --check-prefix=SSE41 5 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX --check-prefix=AVX1 6 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=AVX --check-prefix=AVX2 7 8 define <4 x i32> @load_zmov_4i32_to_0zzz(<4 x i32> *%ptr) { 9 ; SSE-LABEL: load_zmov_4i32_to_0zzz: 10 ; SSE: # %bb.0: # %entry 11 ; SSE-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero 12 ; SSE-NEXT: retq 13 ; 14 ; AVX-LABEL: load_zmov_4i32_to_0zzz: 15 ; AVX: # %bb.0: # %entry 16 ; AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero 17 ; AVX-NEXT: retq 18 entry: 19 %X = load <4 x i32>, <4 x i32>* %ptr 20 %Y = shufflevector <4 x i32> %X, <4 x i32> zeroinitializer, <4 x i32> <i32 0, i32 4, i32 4, i32 4> 21 ret <4 x i32>%Y 22 } 23 24 define <2 x i64> @load_zmov_2i64_to_0z(<2 x i64> *%ptr) { 25 ; SSE-LABEL: load_zmov_2i64_to_0z: 26 ; SSE: # %bb.0: # %entry 27 ; SSE-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero 28 ; SSE-NEXT: retq 29 ; 30 ; AVX-LABEL: load_zmov_2i64_to_0z: 31 ; AVX: # %bb.0: # %entry 32 ; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero 33 ; AVX-NEXT: retq 34 entry: 35 %X = load <2 x i64>, <2 x i64>* %ptr 36 %Y = shufflevector <2 x i64> %X, <2 x i64> zeroinitializer, <2 x i32> <i32 0, i32 2> 37 ret <2 x i64>%Y 38 } 39