1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2 ; RUN: llc -mtriple=i686-linux-gnu %s -o - | FileCheck %s 3 4 define i32 @branch_eq(i64 %a, i64 %b) { 5 ; CHECK-LABEL: branch_eq: 6 ; CHECK: # %bb.0: # %entry 7 ; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax 8 ; CHECK-NEXT: movl {{[0-9]+}}(%esp), %ecx 9 ; CHECK-NEXT: xorl {{[0-9]+}}(%esp), %ecx 10 ; CHECK-NEXT: xorl {{[0-9]+}}(%esp), %eax 11 ; CHECK-NEXT: orl %ecx, %eax 12 ; CHECK-NEXT: jne .LBB0_2 13 ; CHECK-NEXT: # %bb.1: # %bb1 14 ; CHECK-NEXT: movl $1, %eax 15 ; CHECK-NEXT: retl 16 ; CHECK-NEXT: .LBB0_2: # %bb2 17 ; CHECK-NEXT: movl $2, %eax 18 ; CHECK-NEXT: retl 19 entry: 20 %cmp = icmp eq i64 %a, %b 21 br i1 %cmp, label %bb1, label %bb2 22 bb1: 23 ret i32 1 24 bb2: 25 ret i32 2 26 } 27 28 define i32 @branch_slt(i64 %a, i64 %b) { 29 ; CHECK-LABEL: branch_slt: 30 ; CHECK: # %bb.0: # %entry 31 ; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax 32 ; CHECK-NEXT: movl {{[0-9]+}}(%esp), %ecx 33 ; CHECK-NEXT: cmpl {{[0-9]+}}(%esp), %eax 34 ; CHECK-NEXT: sbbl {{[0-9]+}}(%esp), %ecx 35 ; CHECK-NEXT: jge .LBB1_2 36 ; CHECK-NEXT: # %bb.1: # %bb1 37 ; CHECK-NEXT: movl $1, %eax 38 ; CHECK-NEXT: retl 39 ; CHECK-NEXT: .LBB1_2: # %bb2 40 ; CHECK-NEXT: movl $2, %eax 41 ; CHECK-NEXT: retl 42 entry: 43 %cmp = icmp slt i64 %a, %b 44 br i1 %cmp, label %bb1, label %bb2 45 bb1: 46 ret i32 1 47 bb2: 48 ret i32 2 49 } 50 51 define i32 @branch_ule(i64 %a, i64 %b) { 52 ; CHECK-LABEL: branch_ule: 53 ; CHECK: # %bb.0: # %entry 54 ; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax 55 ; CHECK-NEXT: movl {{[0-9]+}}(%esp), %ecx 56 ; CHECK-NEXT: cmpl {{[0-9]+}}(%esp), %eax 57 ; CHECK-NEXT: sbbl {{[0-9]+}}(%esp), %ecx 58 ; CHECK-NEXT: jb .LBB2_2 59 ; CHECK-NEXT: # %bb.1: # %bb1 60 ; CHECK-NEXT: movl $1, %eax 61 ; CHECK-NEXT: retl 62 ; CHECK-NEXT: .LBB2_2: # %bb2 63 ; CHECK-NEXT: movl $2, %eax 64 ; CHECK-NEXT: retl 65 entry: 66 %cmp = icmp ule i64 %a, %b 67 br i1 %cmp, label %bb1, label %bb2 68 bb1: 69 ret i32 1 70 bb2: 71 ret i32 2 72 } 73 74 define i32 @set_gt(i64 %a, i64 %b) { 75 ; CHECK-LABEL: set_gt: 76 ; CHECK: # %bb.0: # %entry 77 ; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax 78 ; CHECK-NEXT: movl {{[0-9]+}}(%esp), %ecx 79 ; CHECK-NEXT: cmpl {{[0-9]+}}(%esp), %eax 80 ; CHECK-NEXT: sbbl {{[0-9]+}}(%esp), %ecx 81 ; CHECK-NEXT: setl %al 82 ; CHECK-NEXT: movzbl %al, %eax 83 ; CHECK-NEXT: retl 84 entry: 85 %cmp = icmp sgt i64 %a, %b 86 %res = select i1 %cmp, i32 1, i32 0 87 ret i32 %res 88 } 89 90 define i32 @test_wide(i128 %a, i128 %b) { 91 ; CHECK-LABEL: test_wide: 92 ; CHECK: # %bb.0: # %entry 93 ; CHECK-NEXT: pushl %esi 94 ; CHECK-NEXT: .cfi_def_cfa_offset 8 95 ; CHECK-NEXT: .cfi_offset %esi, -8 96 ; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax 97 ; CHECK-NEXT: movl {{[0-9]+}}(%esp), %ecx 98 ; CHECK-NEXT: movl {{[0-9]+}}(%esp), %edx 99 ; CHECK-NEXT: movl {{[0-9]+}}(%esp), %esi 100 ; CHECK-NEXT: cmpl {{[0-9]+}}(%esp), %edx 101 ; CHECK-NEXT: sbbl {{[0-9]+}}(%esp), %esi 102 ; CHECK-NEXT: sbbl {{[0-9]+}}(%esp), %ecx 103 ; CHECK-NEXT: sbbl {{[0-9]+}}(%esp), %eax 104 ; CHECK-NEXT: jge .LBB4_2 105 ; CHECK-NEXT: # %bb.1: # %bb1 106 ; CHECK-NEXT: movl $1, %eax 107 ; CHECK-NEXT: popl %esi 108 ; CHECK-NEXT: .cfi_def_cfa_offset 4 109 ; CHECK-NEXT: retl 110 ; CHECK-NEXT: .LBB4_2: # %bb2 111 ; CHECK-NEXT: .cfi_def_cfa_offset 8 112 ; CHECK-NEXT: movl $2, %eax 113 ; CHECK-NEXT: popl %esi 114 ; CHECK-NEXT: .cfi_def_cfa_offset 4 115 ; CHECK-NEXT: retl 116 entry: 117 %cmp = icmp slt i128 %a, %b 118 br i1 %cmp, label %bb1, label %bb2 119 bb1: 120 ret i32 1 121 bb2: 122 ret i32 2 123 } 124 125 ; The comparison of the low bits will be folded to a CARRY_FALSE node. Make 126 ; sure the code can handle that. 127 define i32 @test_carry_false(i64 %a, i64 %b) { 128 ; CHECK-LABEL: test_carry_false: 129 ; CHECK: # %bb.0: # %entry 130 ; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax 131 ; CHECK-NEXT: cmpl {{[0-9]+}}(%esp), %eax 132 ; CHECK-NEXT: jge .LBB5_2 133 ; CHECK-NEXT: # %bb.1: # %bb1 134 ; CHECK-NEXT: movl $1, %eax 135 ; CHECK-NEXT: retl 136 ; CHECK-NEXT: .LBB5_2: # %bb2 137 ; CHECK-NEXT: movl $2, %eax 138 ; CHECK-NEXT: retl 139 entry: 140 %x = and i64 %a, -4294967296 ;0xffffffff00000000 141 %y = and i64 %b, -4294967296 142 %cmp = icmp slt i64 %x, %y 143 br i1 %cmp, label %bb1, label %bb2 144 bb1: 145 ret i32 1 146 bb2: 147 ret i32 2 148 } 149
