1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2 ; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse4.2 -post-RA-scheduler=true | FileCheck %s 3 4 ; Widen a v3i16 to v8i16 to do a vector add 5 6 @.str = internal constant [4 x i8] c"%d \00" 7 @.str1 = internal constant [2 x i8] c"\0A\00" 8 9 define void @update(<3 x i16>* %dst, <3 x i16>* %src, i32 %n) nounwind { 10 ; CHECK-LABEL: update: 11 ; CHECK: # %bb.0: # %entry 12 ; CHECK-NEXT: pushl %ebp 13 ; CHECK-NEXT: movl %esp, %ebp 14 ; CHECK-NEXT: andl $-8, %esp 15 ; CHECK-NEXT: subl $40, %esp 16 ; CHECK-NEXT: movl {{\.LCPI.*}}, %eax 17 ; CHECK-NEXT: movdqa {{.*#+}} xmm1 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15] 18 ; CHECK-NEXT: pcmpeqd %xmm0, %xmm0 19 ; CHECK-NEXT: movw $1, {{[0-9]+}}(%esp) 20 ; CHECK-NEXT: movl $0, {{[0-9]+}}(%esp) 21 ; CHECK-NEXT: movl %eax, {{[0-9]+}}(%esp) 22 ; CHECK-NEXT: jmp .LBB0_1 23 ; CHECK-NEXT: .p2align 4, 0x90 24 ; CHECK-NEXT: .LBB0_2: # %forbody 25 ; CHECK-NEXT: # in Loop: Header=BB0_1 Depth=1 26 ; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax 27 ; CHECK-NEXT: movl 12(%ebp), %edx 28 ; CHECK-NEXT: movl 8(%ebp), %ecx 29 ; CHECK-NEXT: movd {{.*#+}} xmm2 = mem[0],zero,zero,zero 30 ; CHECK-NEXT: pmovzxwd {{.*#+}} xmm2 = xmm2[0],zero,xmm2[1],zero,xmm2[2],zero,xmm2[3],zero 31 ; CHECK-NEXT: pinsrd $2, 4(%edx,%eax,8), %xmm2 32 ; CHECK-NEXT: psubd %xmm0, %xmm2 33 ; CHECK-NEXT: pextrw $4, %xmm2, 4(%ecx,%eax,8) 34 ; CHECK-NEXT: pshufb %xmm1, %xmm2 35 ; CHECK-NEXT: movd %xmm2, (%ecx,%eax,8) 36 ; CHECK-NEXT: incl {{[0-9]+}}(%esp) 37 ; CHECK-NEXT: .LBB0_1: # %forcond 38 ; CHECK-NEXT: # =>This Inner Loop Header: Depth=1 39 ; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax 40 ; CHECK-NEXT: cmpl 16(%ebp), %eax 41 ; CHECK-NEXT: jl .LBB0_2 42 ; CHECK-NEXT: # %bb.3: # %afterfor 43 ; CHECK-NEXT: movl %ebp, %esp 44 ; CHECK-NEXT: popl %ebp 45 ; CHECK-NEXT: retl 46 entry: 47 %dst.addr = alloca <3 x i16>* 48 %src.addr = alloca <3 x i16>* 49 %n.addr = alloca i32 50 %v = alloca <3 x i16>, align 8 51 %i = alloca i32, align 4 52 store <3 x i16>* %dst, <3 x i16>** %dst.addr 53 store <3 x i16>* %src, <3 x i16>** %src.addr 54 store i32 %n, i32* %n.addr 55 store <3 x i16> < i16 1, i16 1, i16 1 >, <3 x i16>* %v 56 store i32 0, i32* %i 57 br label %forcond 58 59 forcond: 60 %tmp = load i32, i32* %i 61 %tmp1 = load i32, i32* %n.addr 62 %cmp = icmp slt i32 %tmp, %tmp1 63 br i1 %cmp, label %forbody, label %afterfor 64 65 forbody: 66 %tmp2 = load i32, i32* %i 67 %tmp3 = load <3 x i16>*, <3 x i16>** %dst.addr 68 %arrayidx = getelementptr <3 x i16>, <3 x i16>* %tmp3, i32 %tmp2 69 %tmp4 = load i32, i32* %i 70 %tmp5 = load <3 x i16>*, <3 x i16>** %src.addr 71 %arrayidx6 = getelementptr <3 x i16>, <3 x i16>* %tmp5, i32 %tmp4 72 %tmp7 = load <3 x i16>, <3 x i16>* %arrayidx6 73 %add = add <3 x i16> %tmp7, < i16 1, i16 1, i16 1 > 74 store <3 x i16> %add, <3 x i16>* %arrayidx 75 br label %forinc 76 77 forinc: 78 %tmp8 = load i32, i32* %i 79 %inc = add i32 %tmp8, 1 80 store i32 %inc, i32* %i 81 br label %forcond 82 83 afterfor: 84 ret void 85 } 86 87
