1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2 ; RUN: llc -mtriple=i686-unknown-unknown -mcpu=generic -mattr=+sse4.2 < %s | FileCheck %s 3 ; RUN: llc -mtriple=i686-unknown-unknown -mcpu=atom < %s | FileCheck -check-prefix=ATOM %s 4 5 ; Scheduler causes produce a different instruction order 6 7 ; bitcast a v4i16 to v2i32 8 9 define void @convert(<2 x i32>* %dst, <4 x i16>* %src) nounwind { 10 ; CHECK-LABEL: convert: 11 ; CHECK: # %bb.0: # %entry 12 ; CHECK-NEXT: pushl %eax 13 ; CHECK-NEXT: movl $0, (%esp) 14 ; CHECK-NEXT: movdqa {{.*#+}} xmm0 = [1,1,1,1] 15 ; CHECK-NEXT: movdqa {{.*#+}} xmm1 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15] 16 ; CHECK-NEXT: cmpl $3, (%esp) 17 ; CHECK-NEXT: jg .LBB0_3 18 ; CHECK-NEXT: .p2align 4, 0x90 19 ; CHECK-NEXT: .LBB0_2: # %forbody 20 ; CHECK-NEXT: # =>This Inner Loop Header: Depth=1 21 ; CHECK-NEXT: movl (%esp), %eax 22 ; CHECK-NEXT: movl {{[0-9]+}}(%esp), %ecx 23 ; CHECK-NEXT: movl {{[0-9]+}}(%esp), %edx 24 ; CHECK-NEXT: pmovzxwd {{.*#+}} xmm2 = mem[0],zero,mem[1],zero,mem[2],zero,mem[3],zero 25 ; CHECK-NEXT: paddw %xmm0, %xmm2 26 ; CHECK-NEXT: pshufb %xmm1, %xmm2 27 ; CHECK-NEXT: movq %xmm2, (%ecx,%eax,8) 28 ; CHECK-NEXT: incl (%esp) 29 ; CHECK-NEXT: cmpl $3, (%esp) 30 ; CHECK-NEXT: jle .LBB0_2 31 ; CHECK-NEXT: .LBB0_3: # %afterfor 32 ; CHECK-NEXT: popl %eax 33 ; CHECK-NEXT: retl 34 ; 35 ; ATOM-LABEL: convert: 36 ; ATOM: # %bb.0: # %entry 37 ; ATOM-NEXT: pushl %eax 38 ; ATOM-NEXT: movdqa {{.*#+}} xmm0 = [1,1,1,1] 39 ; ATOM-NEXT: movdqa {{.*#+}} xmm1 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15] 40 ; ATOM-NEXT: movl $0, (%esp) 41 ; ATOM-NEXT: cmpl $3, (%esp) 42 ; ATOM-NEXT: jg .LBB0_3 43 ; ATOM-NEXT: .p2align 4, 0x90 44 ; ATOM-NEXT: .LBB0_2: # %forbody 45 ; ATOM-NEXT: # =>This Inner Loop Header: Depth=1 46 ; ATOM-NEXT: movl (%esp), %eax 47 ; ATOM-NEXT: movl {{[0-9]+}}(%esp), %ecx 48 ; ATOM-NEXT: movq {{.*#+}} xmm2 = mem[0],zero 49 ; ATOM-NEXT: movl {{[0-9]+}}(%esp), %ecx 50 ; ATOM-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1],xmm2[2],xmm0[2],xmm2[3],xmm0[3] 51 ; ATOM-NEXT: paddw %xmm0, %xmm2 52 ; ATOM-NEXT: pshufb %xmm1, %xmm2 53 ; ATOM-NEXT: movq %xmm2, (%ecx,%eax,8) 54 ; ATOM-NEXT: incl (%esp) 55 ; ATOM-NEXT: cmpl $3, (%esp) 56 ; ATOM-NEXT: jle .LBB0_2 57 ; ATOM-NEXT: .LBB0_3: # %afterfor 58 ; ATOM-NEXT: popl %eax 59 ; ATOM-NEXT: retl 60 entry: 61 %dst.addr = alloca <2 x i32>* 62 %src.addr = alloca <4 x i16>* 63 %i = alloca i32, align 4 64 store <2 x i32>* %dst, <2 x i32>** %dst.addr 65 store <4 x i16>* %src, <4 x i16>** %src.addr 66 store i32 0, i32* %i 67 br label %forcond 68 69 forcond: 70 %tmp = load i32, i32* %i 71 %cmp = icmp slt i32 %tmp, 4 72 br i1 %cmp, label %forbody, label %afterfor 73 74 forbody: 75 %tmp1 = load i32, i32* %i 76 %tmp2 = load <2 x i32>*, <2 x i32>** %dst.addr 77 %arrayidx = getelementptr <2 x i32>, <2 x i32>* %tmp2, i32 %tmp1 78 %tmp3 = load i32, i32* %i 79 %tmp4 = load <4 x i16>*, <4 x i16>** %src.addr 80 %arrayidx5 = getelementptr <4 x i16>, <4 x i16>* %tmp4, i32 %tmp3 81 %tmp6 = load <4 x i16>, <4 x i16>* %arrayidx5 82 %add = add <4 x i16> %tmp6, < i16 1, i16 1, i16 1, i16 1 > 83 %conv = bitcast <4 x i16> %add to <2 x i32> 84 store <2 x i32> %conv, <2 x i32>* %arrayidx 85 br label %forinc 86 87 forinc: 88 %tmp7 = load i32, i32* %i 89 %inc = add i32 %tmp7, 1 90 store i32 %inc, i32* %i 91 br label %forcond 92 93 afterfor: 94 ret void 95 } 96
