1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2 ; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse2 -x86-experimental-vector-widening-legalization | FileCheck %s --check-prefix=X86 3 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 -x86-experimental-vector-widening-legalization | FileCheck %s --check-prefix=X64 4 5 define <4 x i32> @zext_v4i8_to_v4i32(<4 x i8>* %ptr) { 6 ; X86-LABEL: zext_v4i8_to_v4i32: 7 ; X86: # %bb.0: 8 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax 9 ; X86-NEXT: movd {{.*#+}} xmm0 = mem[0],zero,zero,zero 10 ; X86-NEXT: pxor %xmm1, %xmm1 11 ; X86-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3],xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7] 12 ; X86-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3] 13 ; X86-NEXT: retl 14 ; 15 ; X64-LABEL: zext_v4i8_to_v4i32: 16 ; X64: # %bb.0: 17 ; X64-NEXT: movd {{.*#+}} xmm0 = mem[0],zero,zero,zero 18 ; X64-NEXT: pxor %xmm1, %xmm1 19 ; X64-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3],xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7] 20 ; X64-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3] 21 ; X64-NEXT: retq 22 %val = load <4 x i8>, <4 x i8>* %ptr 23 %ext = zext <4 x i8> %val to <4 x i32> 24 ret <4 x i32> %ext 25 } 26
