1 // RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve < %s \ 2 // RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST 3 // RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \ 4 // RUN: | FileCheck %s --check-prefix=CHECK-ERROR 5 // RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \ 6 // RUN: | llvm-objdump -d -mattr=+sve - | FileCheck %s --check-prefix=CHECK-INST 7 // RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \ 8 // RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN 9 10 ld1w z0.s, p0/z, [x0] 11 // CHECK-INST: ld1w { z0.s }, p0/z, [x0] 12 // CHECK-ENCODING: [0x00,0xa0,0x40,0xa5] 13 // CHECK-ERROR: instruction requires: sve 14 // CHECK-UNKNOWN: 00 a0 40 a5 <unknown> 15 16 ld1w z0.d, p0/z, [x0] 17 // CHECK-INST: ld1w { z0.d }, p0/z, [x0] 18 // CHECK-ENCODING: [0x00,0xa0,0x60,0xa5] 19 // CHECK-ERROR: instruction requires: sve 20 // CHECK-UNKNOWN: 00 a0 60 a5 <unknown> 21 22 ld1w { z0.s }, p0/z, [x0] 23 // CHECK-INST: ld1w { z0.s }, p0/z, [x0] 24 // CHECK-ENCODING: [0x00,0xa0,0x40,0xa5] 25 // CHECK-ERROR: instruction requires: sve 26 // CHECK-UNKNOWN: 00 a0 40 a5 <unknown> 27 28 ld1w { z0.d }, p0/z, [x0] 29 // CHECK-INST: ld1w { z0.d }, p0/z, [x0] 30 // CHECK-ENCODING: [0x00,0xa0,0x60,0xa5] 31 // CHECK-ERROR: instruction requires: sve 32 // CHECK-UNKNOWN: 00 a0 60 a5 <unknown> 33 34 ld1w { z31.s }, p7/z, [sp, #-1, mul vl] 35 // CHECK-INST: ld1w { z31.s }, p7/z, [sp, #-1, mul vl] 36 // CHECK-ENCODING: [0xff,0xbf,0x4f,0xa5] 37 // CHECK-ERROR: instruction requires: sve 38 // CHECK-UNKNOWN: ff bf 4f a5 <unknown> 39 40 ld1w { z21.s }, p5/z, [x10, #5, mul vl] 41 // CHECK-INST: ld1w { z21.s }, p5/z, [x10, #5, mul vl] 42 // CHECK-ENCODING: [0x55,0xb5,0x45,0xa5] 43 // CHECK-ERROR: instruction requires: sve 44 // CHECK-UNKNOWN: 55 b5 45 a5 <unknown> 45 46 ld1w { z31.d }, p7/z, [sp, #-1, mul vl] 47 // CHECK-INST: ld1w { z31.d }, p7/z, [sp, #-1, mul vl] 48 // CHECK-ENCODING: [0xff,0xbf,0x6f,0xa5] 49 // CHECK-ERROR: instruction requires: sve 50 // CHECK-UNKNOWN: ff bf 6f a5 <unknown> 51 52 ld1w { z21.d }, p5/z, [x10, #5, mul vl] 53 // CHECK-INST: ld1w { z21.d }, p5/z, [x10, #5, mul vl] 54 // CHECK-ENCODING: [0x55,0xb5,0x65,0xa5] 55 // CHECK-ERROR: instruction requires: sve 56 // CHECK-UNKNOWN: 55 b5 65 a5 <unknown> 57 58 ld1w { z21.s }, p5/z, [sp, x21, lsl #2] 59 // CHECK-INST: ld1w { z21.s }, p5/z, [sp, x21, lsl #2] 60 // CHECK-ENCODING: [0xf5,0x57,0x55,0xa5] 61 // CHECK-ERROR: instruction requires: sve 62 // CHECK-UNKNOWN: f5 57 55 a5 <unknown> 63 64 ld1w { z21.s }, p5/z, [x10, x21, lsl #2] 65 // CHECK-INST: ld1w { z21.s }, p5/z, [x10, x21, lsl #2] 66 // CHECK-ENCODING: [0x55,0x55,0x55,0xa5] 67 // CHECK-ERROR: instruction requires: sve 68 // CHECK-UNKNOWN: 55 55 55 a5 <unknown> 69 70 ld1w { z23.d }, p3/z, [x13, x8, lsl #2] 71 // CHECK-INST: ld1w { z23.d }, p3/z, [x13, x8, lsl #2] 72 // CHECK-ENCODING: [0xb7,0x4d,0x68,0xa5] 73 // CHECK-ERROR: instruction requires: sve 74 // CHECK-UNKNOWN: b7 4d 68 a5 <unknown> 75 76 ld1w { z0.s }, p0/z, [x0, z0.s, uxtw] 77 // CHECK-INST: ld1w { z0.s }, p0/z, [x0, z0.s, uxtw] 78 // CHECK-ENCODING: [0x00,0x40,0x00,0x85] 79 // CHECK-ERROR: instruction requires: sve 80 // CHECK-UNKNOWN: 00 40 00 85 <unknown> 81 82 ld1w { z0.s }, p0/z, [x0, z0.s, sxtw] 83 // CHECK-INST: ld1w { z0.s }, p0/z, [x0, z0.s, sxtw] 84 // CHECK-ENCODING: [0x00,0x40,0x40,0x85] 85 // CHECK-ERROR: instruction requires: sve 86 // CHECK-UNKNOWN: 00 40 40 85 <unknown> 87 88 ld1w { z31.s }, p7/z, [sp, z31.s, uxtw #2] 89 // CHECK-INST: ld1w { z31.s }, p7/z, [sp, z31.s, uxtw #2] 90 // CHECK-ENCODING: [0xff,0x5f,0x3f,0x85] 91 // CHECK-ERROR: instruction requires: sve 92 // CHECK-UNKNOWN: ff 5f 3f 85 <unknown> 93 94 ld1w { z31.s }, p7/z, [sp, z31.s, sxtw #2] 95 // CHECK-INST: ld1w { z31.s }, p7/z, [sp, z31.s, sxtw #2] 96 // CHECK-ENCODING: [0xff,0x5f,0x7f,0x85] 97 // CHECK-ERROR: instruction requires: sve 98 // CHECK-UNKNOWN: ff 5f 7f 85 <unknown> 99 100 ld1w { z31.d }, p7/z, [sp, z31.d] 101 // CHECK-INST: ld1w { z31.d }, p7/z, [sp, z31.d] 102 // CHECK-ENCODING: [0xff,0xdf,0x5f,0xc5] 103 // CHECK-ERROR: instruction requires: sve 104 // CHECK-UNKNOWN: ff df 5f c5 <unknown> 105 106 ld1w { z23.d }, p3/z, [x13, z8.d, lsl #2] 107 // CHECK-INST: ld1w { z23.d }, p3/z, [x13, z8.d, lsl #2] 108 // CHECK-ENCODING: [0xb7,0xcd,0x68,0xc5] 109 // CHECK-ERROR: instruction requires: sve 110 // CHECK-UNKNOWN: b7 cd 68 c5 <unknown> 111 112 ld1w { z21.d }, p5/z, [x10, z21.d, uxtw] 113 // CHECK-INST: ld1w { z21.d }, p5/z, [x10, z21.d, uxtw] 114 // CHECK-ENCODING: [0x55,0x55,0x15,0xc5] 115 // CHECK-ERROR: instruction requires: sve 116 // CHECK-UNKNOWN: 55 55 15 c5 <unknown> 117 118 ld1w { z21.d }, p5/z, [x10, z21.d, sxtw] 119 // CHECK-INST: ld1w { z21.d }, p5/z, [x10, z21.d, sxtw] 120 // CHECK-ENCODING: [0x55,0x55,0x55,0xc5] 121 // CHECK-ERROR: instruction requires: sve 122 // CHECK-UNKNOWN: 55 55 55 c5 <unknown> 123 124 ld1w { z0.d }, p0/z, [x0, z0.d, uxtw #2] 125 // CHECK-INST: ld1w { z0.d }, p0/z, [x0, z0.d, uxtw #2] 126 // CHECK-ENCODING: [0x00,0x40,0x20,0xc5] 127 // CHECK-ERROR: instruction requires: sve 128 // CHECK-UNKNOWN: 00 40 20 c5 <unknown> 129 130 ld1w { z0.d }, p0/z, [x0, z0.d, sxtw #2] 131 // CHECK-INST: ld1w { z0.d }, p0/z, [x0, z0.d, sxtw #2] 132 // CHECK-ENCODING: [0x00,0x40,0x60,0xc5] 133 // CHECK-ERROR: instruction requires: sve 134 // CHECK-UNKNOWN: 00 40 60 c5 <unknown> 135 136 ld1w { z31.s }, p7/z, [z31.s, #124] 137 // CHECK-INST: ld1w { z31.s }, p7/z, [z31.s, #124] 138 // CHECK-ENCODING: [0xff,0xdf,0x3f,0x85] 139 // CHECK-ERROR: instruction requires: sve 140 // CHECK-UNKNOWN: ff df 3f 85 <unknown> 141 142 ld1w { z0.s }, p0/z, [z0.s] 143 // CHECK-INST: ld1w { z0.s }, p0/z, [z0.s] 144 // CHECK-ENCODING: [0x00,0xc0,0x20,0x85] 145 // CHECK-ERROR: instruction requires: sve 146 // CHECK-UNKNOWN: 00 c0 20 85 <unknown> 147 148 ld1w { z31.d }, p7/z, [z31.d, #124] 149 // CHECK-INST: ld1w { z31.d }, p7/z, [z31.d, #124] 150 // CHECK-ENCODING: [0xff,0xdf,0x3f,0xc5] 151 // CHECK-ERROR: instruction requires: sve 152 // CHECK-UNKNOWN: ff df 3f c5 <unknown> 153 154 ld1w { z0.d }, p0/z, [z0.d] 155 // CHECK-INST: ld1w { z0.d }, p0/z, [z0.d] 156 // CHECK-ENCODING: [0x00,0xc0,0x20,0xc5] 157 // CHECK-ERROR: instruction requires: sve 158 // CHECK-UNKNOWN: 00 c0 20 c5 <unknown> 159
