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      1 // RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve  2>&1 < %s| FileCheck %s
      2 
      3 // --------------------------------------------------------------------------//
      4 // Invalid operand (.b, .h)
      5 
      6 ldff1w z12.b, p7/z, [x0]
      7 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
      8 // CHECK-NEXT: ldff1w z12.b, p7/z, [x0]
      9 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
     10 
     11 ldff1w z4.h, p7/z, [x0]
     12 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
     13 // CHECK-NEXT: ldff1w z4.h, p7/z, [x0]
     14 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
     15 
     16 // --------------------------------------------------------------------------//
     17 // restricted predicate has range [0, 7].
     18 
     19 ldff1w z12.s, p8/z, [x0]
     20 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: restricted predicate has range [0, 7].
     21 // CHECK-NEXT: ldff1w z12.s, p8/z, [x0]
     22 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
     23 
     24 ldff1w z4.d, p8/z, [x0]
     25 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: restricted predicate has range [0, 7].
     26 // CHECK-NEXT: ldff1w z4.d, p8/z, [x0]
     27 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
     28 
     29 // --------------------------------------------------------------------------//
     30 // Invalid scalar + scalar addressing modes
     31 
     32 ldff1w z0.s, p0/z, [x0, sp]
     33 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: register must be x0..x30 or xzr, with required shift 'lsl #2'
     34 // CHECK-NEXT: ldff1w z0.s, p0/z, [x0, sp]
     35 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
     36 
     37 ldff1w z0.s, p0/z, [x0, x0, lsl #3]
     38 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: register must be x0..x30 or xzr, with required shift 'lsl #2'
     39 // CHECK-NEXT: ldff1w z0.s, p0/z, [x0, x0, lsl #3]
     40 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
     41 
     42 ldff1w z0.s, p0/z, [x0, w0]
     43 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: register must be x0..x30 or xzr, with required shift 'lsl #2'
     44 // CHECK-NEXT: ldff1w z0.s, p0/z, [x0, w0]
     45 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
     46 
     47 ldff1w z0.s, p0/z, [x0, w0, uxtw]
     48 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: register must be x0..x30 or xzr, with required shift 'lsl #2'
     49 // CHECK-NEXT: ldff1w z0.s, p0/z, [x0, w0, uxtw]
     50 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
     51 
     52 
     53 // --------------------------------------------------------------------------//
     54 // Invalid scalar + vector addressing modes
     55 
     56 ldff1w z0.d, p0/z, [x0, z0.h]
     57 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
     58 // CHECK-NEXT: ldff1w z0.d, p0/z, [x0, z0.h]
     59 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
     60 
     61 ldff1w z0.d, p0/z, [x0, z0.s]
     62 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
     63 // CHECK-NEXT: ldff1w z0.d, p0/z, [x0, z0.s]
     64 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
     65 
     66 ldff1w z0.s, p0/z, [x0, z0.s]
     67 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid shift/extend specified, expected 'z[0..31].s, (uxtw|sxtw)'
     68 // CHECK-NEXT: ldff1w z0.s, p0/z, [x0, z0.s]
     69 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
     70 
     71 ldff1w z0.s, p0/z, [x0, z0.s, uxtw #3]
     72 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid shift/extend specified, expected 'z[0..31].s, (uxtw|sxtw) #2'
     73 // CHECK-NEXT: ldff1w z0.s, p0/z, [x0, z0.s, uxtw #3]
     74 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
     75 
     76 ldff1w z0.s, p0/z, [x0, z0.s, lsl #2]
     77 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid shift/extend specified, expected 'z[0..31].s, (uxtw|sxtw) #2'
     78 // CHECK-NEXT: ldff1w z0.s, p0/z, [x0, z0.s, lsl #2]
     79 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
     80 
     81 ldff1w z0.d, p0/z, [x0, z0.d, lsl #3]
     82 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid shift/extend specified, expected 'z[0..31].d, (lsl|uxtw|sxtw) #2'
     83 // CHECK-NEXT: ldff1w z0.d, p0/z, [x0, z0.d, lsl #3]
     84 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
     85 
     86 ldff1w z0.d, p0/z, [x0, z0.d, sxtw #3]
     87 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid shift/extend specified, expected 'z[0..31].d, (lsl|uxtw|sxtw) #2'
     88 // CHECK-NEXT: ldff1w z0.d, p0/z, [x0, z0.d, sxtw #3]
     89 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
     90 
     91 
     92 // --------------------------------------------------------------------------//
     93 // Invalid vector + immediate addressing modes
     94 
     95 ldff1w z0.s, p0/z, [z0.s, #-4]
     96 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be a multiple of 4 in range [0, 124].
     97 // CHECK-NEXT: ldff1w z0.s, p0/z, [z0.s, #-4]
     98 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
     99 
    100 ldff1w z0.s, p0/z, [z0.s, #-1]
    101 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be a multiple of 4 in range [0, 124].
    102 // CHECK-NEXT: ldff1w z0.s, p0/z, [z0.s, #-1]
    103 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
    104 
    105 ldff1w z0.s, p0/z, [z0.s, #125]
    106 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be a multiple of 4 in range [0, 124].
    107 // CHECK-NEXT: ldff1w z0.s, p0/z, [z0.s, #125]
    108 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
    109 
    110 ldff1w z0.s, p0/z, [z0.s, #128]
    111 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be a multiple of 4 in range [0, 124].
    112 // CHECK-NEXT: ldff1w z0.s, p0/z, [z0.s, #128]
    113 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
    114 
    115 ldff1w z0.s, p0/z, [z0.s, #3]
    116 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be a multiple of 4 in range [0, 124].
    117 // CHECK-NEXT: ldff1w z0.s, p0/z, [z0.s, #3]
    118 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
    119 
    120 ldff1w z0.d, p0/z, [z0.d, #-4]
    121 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be a multiple of 4 in range [0, 124].
    122 // CHECK-NEXT: ldff1w z0.d, p0/z, [z0.d, #-4]
    123 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
    124 
    125 ldff1w z0.d, p0/z, [z0.d, #-1]
    126 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be a multiple of 4 in range [0, 124].
    127 // CHECK-NEXT: ldff1w z0.d, p0/z, [z0.d, #-1]
    128 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
    129 
    130 ldff1w z0.d, p0/z, [z0.d, #125]
    131 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be a multiple of 4 in range [0, 124].
    132 // CHECK-NEXT: ldff1w z0.d, p0/z, [z0.d, #125]
    133 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
    134 
    135 ldff1w z0.d, p0/z, [z0.d, #128]
    136 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be a multiple of 4 in range [0, 124].
    137 // CHECK-NEXT: ldff1w z0.d, p0/z, [z0.d, #128]
    138 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
    139 
    140 ldff1w z0.d, p0/z, [z0.d, #3]
    141 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be a multiple of 4 in range [0, 124].
    142 // CHECK-NEXT: ldff1w z0.d, p0/z, [z0.d, #3]
    143 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
    144 
    145 
    146 // --------------------------------------------------------------------------//
    147 // Negative tests for instructions that are incompatible with movprfx
    148 
    149 movprfx z0.d, p0/z, z7.d
    150 ldff1w  { z0.d }, p0/z, [z0.d]
    151 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
    152 // CHECK-NEXT: ldff1w  { z0.d }, p0/z, [z0.d]
    153 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
    154 
    155 movprfx z0, z7
    156 ldff1w  { z0.d }, p0/z, [z0.d]
    157 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
    158 // CHECK-NEXT: ldff1w  { z0.d }, p0/z, [z0.d]
    159 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
    160