1 // RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve 2>&1 < %s| FileCheck %s 2 3 // --------------------------------------------------------------------------// 4 // Invalid operand (.s) 5 6 ldnf1sw z23.s, p0/z, [x13, #1, MUL VL] 7 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width 8 // CHECK-NEXT: ldnf1sw z23.s, p0/z, [x13, #1, MUL VL] 9 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 10 11 ldnf1sw z29.s, p0/z, [x3, #1, MUL VL] 12 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width 13 // CHECK-NEXT: ldnf1sw z29.s, p0/z, [x3, #1, MUL VL] 14 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 15 16 17 // --------------------------------------------------------------------------// 18 // Immediate out of lower bound [-8, 7]. 19 20 ldnf1sw z28.d, p2/z, [x28, #-9, MUL VL] 21 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-8, 7]. 22 // CHECK-NEXT: ldnf1sw z28.d, p2/z, [x28, #-9, MUL VL] 23 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 24 25 ldnf1sw z27.d, p1/z, [x26, #8, MUL VL] 26 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-8, 7]. 27 // CHECK-NEXT: ldnf1sw z27.d, p1/z, [x26, #8, MUL VL] 28 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 29 30 31 // --------------------------------------------------------------------------// 32 // restricted predicate has range [0, 7]. 33 34 ldnf1sw z4.d, p8/z, [x11, #1, MUL VL] 35 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: restricted predicate has range [0, 7]. 36 // CHECK-NEXT: ldnf1sw z4.d, p8/z, [x11, #1, MUL VL] 37 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 38 39 40 // --------------------------------------------------------------------------// 41 // Invalid vector list. 42 43 ldnf1sw { }, p0/z, [x1, #1, MUL VL] 44 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: vector register expected 45 // CHECK-NEXT: ldnf1sw { }, p0/z, [x1, #1, MUL VL] 46 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 47 48 ldnf1sw { z1.d, z2.d }, p0/z, [x1, #1, MUL VL] 49 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand 50 // CHECK-NEXT: ldnf1sw { z1.d, z2.d }, p0/z, [x1, #1, MUL VL] 51 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 52 53 ldnf1sw { v0.2d }, p0/z, [x1, #1, MUL VL] 54 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand 55 // CHECK-NEXT: ldnf1sw { v0.2d }, p0/z, [x1, #1, MUL VL] 56 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 57 58 59 // --------------------------------------------------------------------------// 60 // Negative tests for instructions that are incompatible with movprfx 61 62 movprfx z21.d, p5/z, z28.d 63 ldnf1sw { z21.d }, p5/z, [x10, #5, mul vl] 64 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov 65 // CHECK-NEXT: ldnf1sw { z21.d }, p5/z, [x10, #5, mul vl] 66 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 67 68 movprfx z21, z28 69 ldnf1sw { z21.d }, p5/z, [x10, #5, mul vl] 70 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov 71 // CHECK-NEXT: ldnf1sw { z21.d }, p5/z, [x10, #5, mul vl] 72 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 73
