1 // RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve 2>&1 < %s| FileCheck %s 2 3 // --------------------------------------------------------------------------// 4 // Immediate out of upper bound [-8, 7]. 5 6 st1b z10.b, p4, [x8, #-9, MUL VL] 7 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-8, 7]. 8 // CHECK-NEXT: st1b z10.b, p4, [x8, #-9, MUL VL] 9 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 10 11 st1b z18.b, p4, [x24, #8, MUL VL] 12 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-8, 7]. 13 // CHECK-NEXT: st1b z18.b, p4, [x24, #8, MUL VL] 14 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 15 16 st1b z11.h, p0, [x23, #-9, MUL VL] 17 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-8, 7]. 18 // CHECK-NEXT: st1b z11.h, p0, [x23, #-9, MUL VL] 19 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 20 21 st1b z24.h, p3, [x1, #8, MUL VL] 22 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-8, 7]. 23 // CHECK-NEXT: st1b z24.h, p3, [x1, #8, MUL VL] 24 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 25 26 st1b z6.s, p5, [x23, #-9, MUL VL] 27 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-8, 7]. 28 // CHECK-NEXT: st1b z6.s, p5, [x23, #-9, MUL VL] 29 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 30 31 st1b z16.s, p6, [x14, #8, MUL VL] 32 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-8, 7]. 33 // CHECK-NEXT: st1b z16.s, p6, [x14, #8, MUL VL] 34 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 35 36 st1b z26.d, p2, [x7, #-9, MUL VL] 37 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-8, 7]. 38 // CHECK-NEXT: st1b z26.d, p2, [x7, #-9, MUL VL] 39 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 40 41 st1b z27.d, p1, [x12, #8, MUL VL] 42 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-8, 7]. 43 // CHECK-NEXT: st1b z27.d, p1, [x12, #8, MUL VL] 44 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 45 46 // --------------------------------------------------------------------------// 47 // Restricted predicate has range [0, 7]. 48 49 st1b z12.b, p8, [x27, #6, MUL VL] 50 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: restricted predicate has range [0, 7]. 51 // CHECK-NEXT: st1b z12.b, p8, [x27, #6, MUL VL] 52 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 53 54 st1b z23.h, p8, [x20, #1, MUL VL] 55 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: restricted predicate has range [0, 7]. 56 // CHECK-NEXT: st1b z23.h, p8, [x20, #1, MUL VL] 57 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 58 59 st1b z6.s, p8, [x0, #8, MUL VL] 60 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: restricted predicate has range [0, 7]. 61 // CHECK-NEXT: st1b z6.s, p8, [x0, #8, MUL VL] 62 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 63 64 st1b z14.d, p8, [x6, #5, MUL VL] 65 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: restricted predicate has range [0, 7]. 66 // CHECK-NEXT: st1b z14.d, p8, [x6, #5, MUL VL] 67 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 68 69 // --------------------------------------------------------------------------// 70 // Invalid vector list 71 72 st1b { }, p0, [x0] 73 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: vector register expected 74 // CHECK-NEXT: st1b { }, p0, [x0] 75 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 76 77 st1b { z1.b, z2.b }, p0, [x0] 78 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand 79 // CHECK-NEXT: st1b { z1.b, z2.b }, p0, [x0] 80 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 81 82 st1b { v0.16b }, p0, [x0] 83 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand 84 // CHECK-NEXT: st1b { v0.16b }, p0, [x0] 85 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 86 87 88 // --------------------------------------------------------------------------// 89 // Invalid scalar + scalar addressing modes 90 91 st1b z0.b, p0, [x0, xzr] 92 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: register must be x0..x30 without shift 93 // CHECK-NEXT: st1b z0.b, p0, [x0, xzr] 94 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 95 96 st1b z0.b, p0, [x0, x0, lsl #1] 97 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: register must be x0..x30 without shift 98 // CHECK-NEXT: st1b z0.b, p0, [x0, x0, lsl #1] 99 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 100 101 st1b z0.b, p0, [x0, w0] 102 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: register must be x0..x30 without shift 103 // CHECK-NEXT: st1b z0.b, p0, [x0, w0] 104 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 105 106 st1b z0.b, p0, [x0, w0, uxtw] 107 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: register must be x0..x30 without shift 108 // CHECK-NEXT: st1b z0.b, p0, [x0, w0, uxtw] 109 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 110 111 112 // --------------------------------------------------------------------------// 113 // Invalid scalar + vector addressing modes 114 115 st1b z0.d, p0, [x0, z0.b] 116 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand 117 // CHECK-NEXT: st1b z0.d, p0, [x0, z0.b] 118 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 119 120 st1b z0.d, p0, [x0, z0.h] 121 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand 122 // CHECK-NEXT: st1b z0.d, p0, [x0, z0.h] 123 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 124 125 st1b z0.d, p0, [x0, z0.s] 126 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand 127 // CHECK-NEXT: st1b z0.d, p0, [x0, z0.s] 128 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 129 130 st1b z0.s, p0, [x0, z0.s] 131 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid shift/extend specified, expected 'z[0..31].s, (uxtw|sxtw)' 132 // CHECK-NEXT: st1b z0.s, p0, [x0, z0.s] 133 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 134 135 st1b z0.s, p0, [x0, z0.s, uxtw #1] 136 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid shift/extend specified, expected 'z[0..31].s, (uxtw|sxtw)' 137 // CHECK-NEXT: st1b z0.s, p0, [x0, z0.s, uxtw #1] 138 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 139 140 st1b z0.s, p0, [x0, z0.s, lsl #0] 141 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid shift/extend specified, expected 'z[0..31].s, (uxtw|sxtw)' 142 // CHECK-NEXT: st1b z0.s, p0, [x0, z0.s, lsl #0] 143 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 144 145 st1b z0.d, p0, [x0, z0.d, lsl #1] 146 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid shift/extend specified, expected 'z[0..31].d, (uxtw|sxtw)' 147 // CHECK-NEXT: st1b z0.d, p0, [x0, z0.d, lsl #1] 148 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 149 150 st1b z0.d, p0, [x0, z0.d, sxtw #1] 151 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid shift/extend specified, expected 'z[0..31].d, (uxtw|sxtw)' 152 // CHECK-NEXT: st1b z0.d, p0, [x0, z0.d, sxtw #1] 153 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 154 155 156 // --------------------------------------------------------------------------// 157 // Invalid vector + immediate addressing modes 158 159 st1b z0.s, p0, [z0.s, #-1] 160 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [0, 31]. 161 // CHECK-NEXT: st1b z0.s, p0, [z0.s, #-1] 162 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 163 164 st1b z0.s, p0, [z0.s, #32] 165 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [0, 31]. 166 // CHECK-NEXT: st1b z0.s, p0, [z0.s, #32] 167 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 168 169 st1b z0.d, p0, [z0.d, #-1] 170 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [0, 31]. 171 // CHECK-NEXT: st1b z0.d, p0, [z0.d, #-1] 172 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 173 174 st1b z0.d, p0, [z0.d, #32] 175 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [0, 31]. 176 // CHECK-NEXT: st1b z0.d, p0, [z0.d, #32] 177 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 178 179 180 // --------------------------------------------------------------------------// 181 // Negative tests for instructions that are incompatible with movprfx 182 183 movprfx z31.d, p7/z, z6.d 184 st1b { z31.d }, p7, [z31.d, #31] 185 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov 186 // CHECK-NEXT: st1b { z31.d }, p7, [z31.d, #31] 187 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 188 189 movprfx z31, z6 190 st1b { z31.d }, p7, [z31.d, #31] 191 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov 192 // CHECK-NEXT: st1b { z31.d }, p7, [z31.d, #31] 193 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 194
