1 // RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve 2>&1 < %s| FileCheck %s 2 3 // --------------------------------------------------------------------------// 4 // Immediate out of upper bound [-8, 7]. 5 6 st1h z29.h, p5, [x7, #-9, MUL VL] 7 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-8, 7]. 8 // CHECK-NEXT: st1h z29.h, p5, [x7, #-9, MUL VL] 9 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 10 11 st1h z29.h, p5, [x4, #8, MUL VL] 12 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-8, 7]. 13 // CHECK-NEXT: st1h z29.h, p5, [x4, #8, MUL VL] 14 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 15 16 st1h z21.s, p2, [x1, #-9, MUL VL] 17 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-8, 7]. 18 // CHECK-NEXT: st1h z21.s, p2, [x1, #-9, MUL VL] 19 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 20 21 st1h z17.s, p5, [x1, #8, MUL VL] 22 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-8, 7]. 23 // CHECK-NEXT: st1h z17.s, p5, [x1, #8, MUL VL] 24 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 25 26 st1h z0.d, p1, [x14, #-9, MUL VL] 27 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-8, 7]. 28 // CHECK-NEXT: st1h z0.d, p1, [x14, #-9, MUL VL] 29 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 30 31 st1h z24.d, p3, [x16, #8, MUL VL] 32 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-8, 7]. 33 // CHECK-NEXT: st1h z24.d, p3, [x16, #8, MUL VL] 34 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 35 36 // --------------------------------------------------------------------------// 37 // Restricted predicate has range [0, 7]. 38 39 st1h z15.h, p8, [x0, #8, MUL VL] 40 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: restricted predicate has range [0, 7]. 41 // CHECK-NEXT: st1h z15.h, p8, [x0, #8, MUL VL] 42 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 43 44 st1h z17.s, p8, [x20, #2, MUL VL] 45 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: restricted predicate has range [0, 7]. 46 // CHECK-NEXT: st1h z17.s, p8, [x20, #2, MUL VL] 47 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 48 49 st1h z15.d, p8, [x0, #8, MUL VL] 50 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: restricted predicate has range [0, 7]. 51 // CHECK-NEXT: st1h z15.d, p8, [x0, #8, MUL VL] 52 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 53 54 // --------------------------------------------------------------------------// 55 // Invalid vector list 56 57 st1h { }, p0, [x0] 58 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: vector register expected 59 // CHECK-NEXT: st1h { }, p0, [x0] 60 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 61 62 st1h { z1.h, z2.h }, p0, [x0] 63 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand 64 // CHECK-NEXT: st1h { z1.h, z2.h }, p0, [x0] 65 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 66 67 st1h { v0.8h }, p0, [x0] 68 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand 69 // CHECK-NEXT: st1h { v0.8h }, p0, [x0] 70 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 71 72 73 // --------------------------------------------------------------------------// 74 // Invalid scalar + scalar addressing modes 75 76 st1h z0.h, p0, [x0, x0] 77 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: register must be x0..x30 with required shift 'lsl #1' 78 // CHECK-NEXT: st1h z0.h, p0, [x0, x0] 79 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 80 81 st1h z0.h, p0, [x0, xzr] 82 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: register must be x0..x30 with required shift 'lsl #1' 83 // CHECK-NEXT: st1h z0.h, p0, [x0, xzr] 84 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 85 86 st1h z0.h, p0, [x0, x0, lsl #2] 87 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: register must be x0..x30 with required shift 'lsl #1' 88 // CHECK-NEXT: st1h z0.h, p0, [x0, x0, lsl #2] 89 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 90 91 st1h z0.h, p0, [x0, w0] 92 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: register must be x0..x30 with required shift 'lsl #1' 93 // CHECK-NEXT: st1h z0.h, p0, [x0, w0] 94 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 95 96 st1h z0.h, p0, [x0, w0, uxtw] 97 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: register must be x0..x30 with required shift 'lsl #1' 98 // CHECK-NEXT: st1h z0.h, p0, [x0, w0, uxtw] 99 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 100 101 102 // --------------------------------------------------------------------------// 103 // Invalid scalar + vector addressing modes 104 105 st1h z0.d, p0, [x0, z0.h] 106 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand 107 // CHECK-NEXT: st1h z0.d, p0, [x0, z0.h] 108 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 109 110 st1h z0.d, p0, [x0, z0.s] 111 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand 112 // CHECK-NEXT: st1h z0.d, p0, [x0, z0.s] 113 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 114 115 st1h z0.s, p0, [x0, z0.s] 116 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid shift/extend specified, expected 'z[0..31].s, (uxtw|sxtw)' 117 // CHECK-NEXT: st1h z0.s, p0, [x0, z0.s] 118 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 119 120 st1h z0.s, p0, [x0, z0.s, uxtw #2] 121 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid shift/extend specified, expected 'z[0..31].s, (uxtw|sxtw) #1' 122 // CHECK-NEXT: st1h z0.s, p0, [x0, z0.s, uxtw #2] 123 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 124 125 st1h z0.s, p0, [x0, z0.s, lsl #1] 126 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid shift/extend specified, expected 'z[0..31].s, (uxtw|sxtw) #1' 127 // CHECK-NEXT: st1h z0.s, p0, [x0, z0.s, lsl #1] 128 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 129 130 st1h z0.d, p0, [x0, z0.d, lsl #2] 131 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid shift/extend specified, expected 'z[0..31].d, (lsl|uxtw|sxtw) #1' 132 // CHECK-NEXT: st1h z0.d, p0, [x0, z0.d, lsl #2] 133 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 134 135 st1h z0.d, p0, [x0, z0.d, sxtw #2] 136 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid shift/extend specified, expected 'z[0..31].d, (lsl|uxtw|sxtw) #1' 137 // CHECK-NEXT: st1h z0.d, p0, [x0, z0.d, sxtw #2] 138 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 139 140 // --------------------------------------------------------------------------// 141 // Invalid vector + immediate addressing modes 142 143 st1h z0.s, p0, [z0.s, #-1] 144 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be a multiple of 2 in range [0, 62]. 145 // CHECK-NEXT: st1h z0.s, p0, [z0.s, #-1] 146 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 147 148 st1h z0.s, p0, [z0.s, #-2] 149 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be a multiple of 2 in range [0, 62]. 150 // CHECK-NEXT: st1h z0.s, p0, [z0.s, #-2] 151 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 152 153 st1h z0.s, p0, [z0.s, #63] 154 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be a multiple of 2 in range [0, 62]. 155 // CHECK-NEXT: st1h z0.s, p0, [z0.s, #63] 156 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 157 158 st1h z0.s, p0, [z0.s, #64] 159 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be a multiple of 2 in range [0, 62]. 160 // CHECK-NEXT: st1h z0.s, p0, [z0.s, #64] 161 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 162 163 st1h z0.s, p0, [z0.s, #3] 164 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be a multiple of 2 in range [0, 62]. 165 // CHECK-NEXT: st1h z0.s, p0, [z0.s, #3] 166 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 167 168 st1h z0.d, p0, [z0.d, #-1] 169 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be a multiple of 2 in range [0, 62]. 170 // CHECK-NEXT: st1h z0.d, p0, [z0.d, #-1] 171 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 172 173 st1h z0.d, p0, [z0.d, #-2] 174 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be a multiple of 2 in range [0, 62]. 175 // CHECK-NEXT: st1h z0.d, p0, [z0.d, #-2] 176 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 177 178 st1h z0.d, p0, [z0.d, #63] 179 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be a multiple of 2 in range [0, 62]. 180 // CHECK-NEXT: st1h z0.d, p0, [z0.d, #63] 181 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 182 183 st1h z0.d, p0, [z0.d, #64] 184 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be a multiple of 2 in range [0, 62]. 185 // CHECK-NEXT: st1h z0.d, p0, [z0.d, #64] 186 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 187 188 st1h z0.d, p0, [z0.d, #3] 189 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be a multiple of 2 in range [0, 62]. 190 // CHECK-NEXT: st1h z0.d, p0, [z0.d, #3] 191 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 192 193 194 // --------------------------------------------------------------------------// 195 // Negative tests for instructions that are incompatible with movprfx 196 197 movprfx z31.d, p7/z, z6.d 198 st1h { z31.d }, p7, [z31.d, #62] 199 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov 200 // CHECK-NEXT: st1h { z31.d }, p7, [z31.d, #62] 201 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 202 203 movprfx z31, z6 204 st1h { z31.d }, p7, [z31.d, #62] 205 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov 206 // CHECK-NEXT: st1h { z31.d }, p7, [z31.d, #62] 207 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 208
