1 // RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve < %s \ 2 // RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST 3 // RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \ 4 // RUN: | FileCheck %s --check-prefix=CHECK-ERROR 5 // RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \ 6 // RUN: | llvm-objdump -d -mattr=+sve - | FileCheck %s --check-prefix=CHECK-INST 7 // RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \ 8 // RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN 9 10 st1w z0.s, p0, [x0] 11 // CHECK-INST: st1w { z0.s }, p0, [x0] 12 // CHECK-ENCODING: [0x00,0xe0,0x40,0xe5] 13 // CHECK-ERROR: instruction requires: sve 14 // CHECK-UNKNOWN: 00 e0 40 e5 <unknown> 15 16 st1w z0.d, p0, [x0] 17 // CHECK-INST: st1w { z0.d }, p0, [x0] 18 // CHECK-ENCODING: [0x00,0xe0,0x60,0xe5] 19 // CHECK-ERROR: instruction requires: sve 20 // CHECK-UNKNOWN: 00 e0 60 e5 <unknown> 21 22 st1w { z0.s }, p0, [x0] 23 // CHECK-INST: st1w { z0.s }, p0, [x0] 24 // CHECK-ENCODING: [0x00,0xe0,0x40,0xe5] 25 // CHECK-ERROR: instruction requires: sve 26 // CHECK-UNKNOWN: 00 e0 40 e5 <unknown> 27 28 st1w { z0.d }, p0, [x0] 29 // CHECK-INST: st1w { z0.d }, p0, [x0] 30 // CHECK-ENCODING: [0x00,0xe0,0x60,0xe5] 31 // CHECK-ERROR: instruction requires: sve 32 // CHECK-UNKNOWN: 00 e0 60 e5 <unknown> 33 34 st1w { z31.s }, p7, [sp, #-1, mul vl] 35 // CHECK-INST: st1w { z31.s }, p7, [sp, #-1, mul vl] 36 // CHECK-ENCODING: [0xff,0xff,0x4f,0xe5] 37 // CHECK-ERROR: instruction requires: sve 38 // CHECK-UNKNOWN: ff ff 4f e5 <unknown> 39 40 st1w { z21.s }, p5, [x10, #5, mul vl] 41 // CHECK-INST: st1w { z21.s }, p5, [x10, #5, mul vl] 42 // CHECK-ENCODING: [0x55,0xf5,0x45,0xe5] 43 // CHECK-ERROR: instruction requires: sve 44 // CHECK-UNKNOWN: 55 f5 45 e5 <unknown> 45 46 st1w { z31.d }, p7, [sp, #-1, mul vl] 47 // CHECK-INST: st1w { z31.d }, p7, [sp, #-1, mul vl] 48 // CHECK-ENCODING: [0xff,0xff,0x6f,0xe5] 49 // CHECK-ERROR: instruction requires: sve 50 // CHECK-UNKNOWN: ff ff 6f e5 <unknown> 51 52 st1w { z21.d }, p5, [x10, #5, mul vl] 53 // CHECK-INST: st1w { z21.d }, p5, [x10, #5, mul vl] 54 // CHECK-ENCODING: [0x55,0xf5,0x65,0xe5] 55 // CHECK-ERROR: instruction requires: sve 56 // CHECK-UNKNOWN: 55 f5 65 e5 <unknown> 57 58 st1w { z0.s }, p0, [x0, x0, lsl #2] 59 // CHECK-INST: st1w { z0.s }, p0, [x0, x0, lsl #2] 60 // CHECK-ENCODING: [0x00,0x40,0x40,0xe5] 61 // CHECK-ERROR: instruction requires: sve 62 // CHECK-UNKNOWN: 00 40 40 e5 <unknown> 63 64 st1w { z0.d }, p0, [x0, x0, lsl #2] 65 // CHECK-INST: st1w { z0.d }, p0, [x0, x0, lsl #2] 66 // CHECK-ENCODING: [0x00,0x40,0x60,0xe5] 67 // CHECK-ERROR: instruction requires: sve 68 // CHECK-UNKNOWN: 00 40 60 e5 <unknown> 69 70 st1w { z0.s }, p0, [x0, z0.s, uxtw] 71 // CHECK-INST: st1w { z0.s }, p0, [x0, z0.s, uxtw] 72 // CHECK-ENCODING: [0x00,0x80,0x40,0xe5] 73 // CHECK-ERROR: instruction requires: sve 74 // CHECK-UNKNOWN: 00 80 40 e5 <unknown> 75 76 st1w { z0.s }, p0, [x0, z0.s, sxtw] 77 // CHECK-INST: st1w { z0.s }, p0, [x0, z0.s, sxtw] 78 // CHECK-ENCODING: [0x00,0xc0,0x40,0xe5] 79 // CHECK-ERROR: instruction requires: sve 80 // CHECK-UNKNOWN: 00 c0 40 e5 <unknown> 81 82 st1w { z0.d }, p0, [x0, z0.d, uxtw] 83 // CHECK-INST: st1w { z0.d }, p0, [x0, z0.d, uxtw] 84 // CHECK-ENCODING: [0x00,0x80,0x00,0xe5] 85 // CHECK-ERROR: instruction requires: sve 86 // CHECK-UNKNOWN: 00 80 00 e5 <unknown> 87 88 st1w { z0.d }, p0, [x0, z0.d, sxtw] 89 // CHECK-INST: st1w { z0.d }, p0, [x0, z0.d, sxtw] 90 // CHECK-ENCODING: [0x00,0xc0,0x00,0xe5] 91 // CHECK-ERROR: instruction requires: sve 92 // CHECK-UNKNOWN: 00 c0 00 e5 <unknown> 93 94 st1w { z0.s }, p0, [x0, z0.s, uxtw #2] 95 // CHECK-INST: st1w { z0.s }, p0, [x0, z0.s, uxtw #2] 96 // CHECK-ENCODING: [0x00,0x80,0x60,0xe5] 97 // CHECK-ERROR: instruction requires: sve 98 // CHECK-UNKNOWN: 00 80 60 e5 <unknown> 99 100 st1w { z0.s }, p0, [x0, z0.s, sxtw #2] 101 // CHECK-INST: st1w { z0.s }, p0, [x0, z0.s, sxtw #2] 102 // CHECK-ENCODING: [0x00,0xc0,0x60,0xe5] 103 // CHECK-ERROR: instruction requires: sve 104 // CHECK-UNKNOWN: 00 c0 60 e5 <unknown> 105 106 st1w { z0.d }, p0, [x0, z0.d, uxtw #2] 107 // CHECK-INST: st1w { z0.d }, p0, [x0, z0.d, uxtw #2] 108 // CHECK-ENCODING: [0x00,0x80,0x20,0xe5] 109 // CHECK-ERROR: instruction requires: sve 110 // CHECK-UNKNOWN: 00 80 20 e5 <unknown> 111 112 st1w { z0.d }, p0, [x0, z0.d, sxtw #2] 113 // CHECK-INST: st1w { z0.d }, p0, [x0, z0.d, sxtw #2] 114 // CHECK-ENCODING: [0x00,0xc0,0x20,0xe5] 115 // CHECK-ERROR: instruction requires: sve 116 // CHECK-UNKNOWN: 00 c0 20 e5 <unknown> 117 118 st1w { z0.d }, p0, [x0, z0.d] 119 // CHECK-INST: st1w { z0.d }, p0, [x0, z0.d] 120 // CHECK-ENCODING: [0x00,0xa0,0x00,0xe5] 121 // CHECK-ERROR: instruction requires: sve 122 // CHECK-UNKNOWN: 00 a0 00 e5 <unknown> 123 124 st1w { z0.d }, p0, [x0, z0.d, lsl #2] 125 // CHECK-INST: st1w { z0.d }, p0, [x0, z0.d, lsl #2] 126 // CHECK-ENCODING: [0x00,0xa0,0x20,0xe5] 127 // CHECK-ERROR: instruction requires: sve 128 // CHECK-UNKNOWN: 00 a0 20 e5 <unknown> 129 130 st1w { z31.s }, p7, [z31.s, #124] 131 // CHECK-INST: st1w { z31.s }, p7, [z31.s, #124] 132 // CHECK-ENCODING: [0xff,0xbf,0x7f,0xe5] 133 // CHECK-ERROR: instruction requires: sve 134 // CHECK-UNKNOWN: ff bf 7f e5 <unknown> 135 136 st1w { z31.d }, p7, [z31.d, #124] 137 // CHECK-INST: st1w { z31.d }, p7, [z31.d, #124] 138 // CHECK-ENCODING: [0xff,0xbf,0x5f,0xe5] 139 // CHECK-ERROR: instruction requires: sve 140 // CHECK-UNKNOWN: ff bf 5f e5 <unknown> 141
