1 // RUN: not llvm-mc -arch=amdgcn %s 2>&1 | FileCheck -check-prefix=GCN %s 2 // RUN: not llvm-mc -arch=amdgcn -mcpu=tahiti %s 2>&1 | FileCheck -check-prefix=GCN -check-prefix=SI-ERR %s 3 // RUN: not llvm-mc -arch=amdgcn -mcpu=tonga %s 2>&1 | FileCheck -check-prefix=GCN -check-prefix=VI-ERR %s 4 // RUN: not llvm-mc -arch=amdgcn -mcpu=gfx900 -show-encoding %s 2>&1 | FileCheck -check-prefix=GFX9 %s 5 6 s_setreg_b32 0x1f803, s2 7 // GCN: error: invalid immediate: only 16-bit values are legal 8 9 s_setreg_b32 hwreg(0x40), s2 10 // GCN: error: invalid code of hardware register: only 6-bit values are legal 11 12 s_setreg_b32 hwreg(HW_REG_WRONG), s2 13 // GCN: error: invalid symbolic name of hardware register 14 15 s_setreg_b32 hwreg(3,32,32), s2 16 // GCN: error: invalid bit offset: only 5-bit values are legal 17 18 s_setreg_b32 hwreg(3,0,33), s2 19 // GCN: error: invalid bitfield width: only values from 1 to 32 are legal 20 21 s_setreg_imm32_b32 0x1f803, 0xff 22 // GCN: error: invalid immediate: only 16-bit values are legal 23 24 s_setreg_imm32_b32 hwreg(3,0,33), 0xff 25 // GCN: error: invalid bitfield width: only values from 1 to 32 are legal 26 27 s_getreg_b32 s2, hwreg(3,32,32) 28 // GCN: error: invalid bit offset: only 5-bit values are legal 29 30 s_getreg_b32 s2, hwreg(HW_REG_SH_MEM_BASES) 31 // SI-ERR: error: invalid symbolic name of hardware register 32 // VI-ERR: error: invalid symbolic name of hardware register 33 // GFX9: s_getreg_b32 s2, hwreg(HW_REG_SH_MEM_BASES) ; encoding: [0x0f,0xf8,0x82,0xb8] 34 35 s_cmpk_le_u32 s2, -1 36 // GCN: error: invalid operand for instruction 37 38 s_cmpk_le_u32 s2, 0x1ffff 39 // GCN: error: invalid operand for instruction 40 41 s_cmpk_le_u32 s2, 0x10000 42 // GCN: error: invalid operand for instruction 43 44 s_mulk_i32 s2, 0xFFFFFFFFFFFF0000 45 // GCN: error: invalid operand for instruction 46 47 s_mulk_i32 s2, 0x10000 48 // GCN: error: invalid operand for instruction 49
