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      1 ; RUN: opt < %s -indirectbr-expand -S | FileCheck %s
      2 ;
      3 ; REQUIRES: x86-registered-target
      4 
      5 target triple = "x86_64-unknown-linux-gnu"
      6 
      7 @test1.targets = constant [4 x i8*] [i8* blockaddress(@test1, %bb0),
      8                                      i8* blockaddress(@test1, %bb1),
      9                                      i8* blockaddress(@test1, %bb2),
     10                                      i8* blockaddress(@test1, %bb3)]
     11 ; CHECK-LABEL: @test1.targets = constant [4 x i8*]
     12 ; CHECK:       [i8* inttoptr (i64 1 to i8*),
     13 ; CHECK:        i8* inttoptr (i64 2 to i8*),
     14 ; CHECK:        i8* inttoptr (i64 3 to i8*),
     15 ; CHECK:        i8* blockaddress(@test1, %bb3)]
     16 
     17 define void @test1(i64* readonly %p, i64* %sink) #0 {
     18 ; CHECK-LABEL: define void @test1(
     19 entry:
     20   %i0 = load i64, i64* %p
     21   %target.i0 = getelementptr [4 x i8*], [4 x i8*]* @test1.targets, i64 0, i64 %i0
     22   %target0 = load i8*, i8** %target.i0
     23   ; Only a subset of blocks are viable successors here.
     24   indirectbr i8* %target0, [label %bb0, label %bb1]
     25 ; CHECK-NOT:     indirectbr
     26 ; CHECK:         %[[ENTRY_V:.*]] = ptrtoint i8* %{{.*}} to i64
     27 ; CHECK-NEXT:    br label %[[SWITCH_BB:.*]]
     28 
     29 bb0:
     30   store volatile i64 0, i64* %sink
     31   br label %latch
     32 
     33 bb1:
     34   store volatile i64 1, i64* %sink
     35   br label %latch
     36 
     37 bb2:
     38   store volatile i64 2, i64* %sink
     39   br label %latch
     40 
     41 bb3:
     42   store volatile i64 3, i64* %sink
     43   br label %latch
     44 
     45 latch:
     46   %i.next = load i64, i64* %p
     47   %target.i.next = getelementptr [4 x i8*], [4 x i8*]* @test1.targets, i64 0, i64 %i.next
     48   %target.next = load i8*, i8** %target.i.next
     49   ; A different subset of blocks are viable successors here.
     50   indirectbr i8* %target.next, [label %bb1, label %bb2]
     51 ; CHECK-NOT:     indirectbr
     52 ; CHECK:         %[[LATCH_V:.*]] = ptrtoint i8* %{{.*}} to i64
     53 ; CHECK-NEXT:    br label %[[SWITCH_BB]]
     54 ;
     55 ; CHECK:       [[SWITCH_BB]]:
     56 ; CHECK-NEXT:    %[[V:.*]] = phi i64 [ %[[ENTRY_V]], %entry ], [ %[[LATCH_V]], %latch ]
     57 ; CHECK-NEXT:    switch i64 %[[V]], label %bb0 [
     58 ; CHECK-NEXT:      i64 2, label %bb1
     59 ; CHECK-NEXT:      i64 3, label %bb2
     60 ; CHECK-NEXT:    ]
     61 }
     62 
     63 attributes #0 = { "target-features"="+retpoline" }
     64