1 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py 2 ; Tests to make sure elimination of casts is working correctly 3 ; RUN: opt < %s -instcombine -S | FileCheck %s 4 target datalayout = "E-p:64:64:64-p1:32:32:32-p2:64:64:64-p3:64:64:64-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128-n8:16:32:64" 5 6 @inbuf = external global [32832 x i8] ; <[32832 x i8]*> [#uses=1] 7 8 define i32 @test1(i32 %A) { 9 ; CHECK-LABEL: @test1( 10 ; CHECK-NEXT: ret i32 %A 11 ; 12 %c1 = bitcast i32 %A to i32 ; <i32> [#uses=1] 13 %c2 = bitcast i32 %c1 to i32 ; <i32> [#uses=1] 14 ret i32 %c2 15 } 16 17 define i64 @test2(i8 %A) { 18 ; CHECK-LABEL: @test2( 19 ; CHECK-NEXT: [[RET:%.*]] = zext i8 %A to i64 20 ; CHECK-NEXT: ret i64 [[RET]] 21 ; 22 %c1 = zext i8 %A to i16 ; <i16> [#uses=1] 23 %c2 = zext i16 %c1 to i32 ; <i32> [#uses=1] 24 %Ret = zext i32 %c2 to i64 ; <i64> [#uses=1] 25 ret i64 %Ret 26 } 27 28 ; This function should just use bitwise AND 29 define i64 @test3(i64 %A) { 30 ; CHECK-LABEL: @test3( 31 ; CHECK-NEXT: [[C2:%.*]] = and i64 %A, 255 32 ; CHECK-NEXT: ret i64 [[C2]] 33 ; 34 %c1 = trunc i64 %A to i8 ; <i8> [#uses=1] 35 %c2 = zext i8 %c1 to i64 ; <i64> [#uses=1] 36 ret i64 %c2 37 } 38 39 define i32 @test4(i32 %A, i32 %B) { 40 ; CHECK-LABEL: @test4( 41 ; CHECK-NEXT: [[COND:%.*]] = icmp slt i32 %A, %B 42 ; CHECK-NEXT: [[RESULT:%.*]] = zext i1 [[COND]] to i32 43 ; CHECK-NEXT: ret i32 [[RESULT]] 44 ; 45 %COND = icmp slt i32 %A, %B ; <i1> [#uses=1] 46 ; Booleans are unsigned integrals 47 %c = zext i1 %COND to i8 ; <i8> [#uses=1] 48 ; for the cast elim purpose 49 %result = zext i8 %c to i32 ; <i32> [#uses=1] 50 ret i32 %result 51 } 52 53 define i32 @test5(i1 %B) { 54 ; This cast should get folded into 55 ; CHECK-LABEL: @test5( 56 ; CHECK-NEXT: [[RESULT:%.*]] = zext i1 %B to i32 57 ; CHECK-NEXT: ret i32 [[RESULT]] 58 ; 59 %c = zext i1 %B to i8 ; <i8> [#uses=1] 60 ; this cast 61 %result = zext i8 %c to i32 ; <i32> [#uses=1] 62 ret i32 %result 63 } 64 65 define i32 @test6(i64 %A) { 66 ; CHECK-LABEL: @test6( 67 ; CHECK-NEXT: [[C1:%.*]] = trunc i64 %A to i32 68 ; CHECK-NEXT: ret i32 [[C1]] 69 ; 70 %c1 = trunc i64 %A to i32 ; <i32> [#uses=1] 71 %res = bitcast i32 %c1 to i32 ; <i32> [#uses=1] 72 ret i32 %res 73 } 74 75 define i64 @test7(i1 %A) { 76 ; CHECK-LABEL: @test7( 77 ; CHECK-NEXT: [[RES:%.*]] = zext i1 %A to i64 78 ; CHECK-NEXT: ret i64 [[RES]] 79 ; 80 %c1 = zext i1 %A to i32 ; <i32> [#uses=1] 81 %res = sext i32 %c1 to i64 ; <i64> [#uses=1] 82 ret i64 %res 83 } 84 85 define i64 @test8(i8 %A) { 86 ; CHECK-LABEL: @test8( 87 ; CHECK-NEXT: [[C1:%.*]] = sext i8 %A to i64 88 ; CHECK-NEXT: ret i64 [[C1]] 89 ; 90 %c1 = sext i8 %A to i64 ; <i64> [#uses=1] 91 %res = bitcast i64 %c1 to i64 ; <i64> [#uses=1] 92 ret i64 %res 93 } 94 95 define i16 @test9(i16 %A) { 96 ; CHECK-LABEL: @test9( 97 ; CHECK-NEXT: ret i16 %A 98 ; 99 %c1 = sext i16 %A to i32 ; <i32> [#uses=1] 100 %c2 = trunc i32 %c1 to i16 ; <i16> [#uses=1] 101 ret i16 %c2 102 } 103 104 define i16 @test10(i16 %A) { 105 ; CHECK-LABEL: @test10( 106 ; CHECK-NEXT: ret i16 %A 107 ; 108 %c1 = sext i16 %A to i32 ; <i32> [#uses=1] 109 %c2 = trunc i32 %c1 to i16 ; <i16> [#uses=1] 110 ret i16 %c2 111 } 112 113 declare void @varargs(i32, ...) 114 115 define void @test11(i32* %P) { 116 ; CHECK-LABEL: @test11( 117 ; CHECK-NEXT: call void (i32, ...) @varargs(i32 5, i32* %P) 118 ; CHECK-NEXT: ret void 119 ; 120 %c = bitcast i32* %P to i16* ; <i16*> [#uses=1] 121 call void (i32, ...) @varargs( i32 5, i16* %c ) 122 ret void 123 } 124 125 declare i32 @__gxx_personality_v0(...) 126 define void @test_invoke_vararg_cast(i32* %a, i32* %b) personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 127 ; CHECK-LABEL: @test_invoke_vararg_cast( 128 ; CHECK-NEXT: entry: 129 ; CHECK-NEXT: invoke void (i32, ...) @varargs(i32 1, i32* %b, i32* %a) 130 ; CHECK-NEXT: to label %invoke.cont unwind label %lpad 131 ; CHECK: invoke.cont: 132 ; CHECK-NEXT: ret void 133 ; CHECK: lpad: 134 ; CHECK-NEXT: [[TMP0:%.*]] = landingpad { i8*, i32 135 ; 136 entry: 137 %0 = bitcast i32* %b to i8* 138 %1 = bitcast i32* %a to i64* 139 invoke void (i32, ...) @varargs(i32 1, i8* %0, i64* %1) 140 to label %invoke.cont unwind label %lpad 141 142 invoke.cont: ; preds = %entry 143 ret void 144 145 lpad: ; preds = %entry 146 %2 = landingpad { i8*, i32 } 147 cleanup 148 ret void 149 } 150 151 define i8* @test13(i64 %A) { 152 ; CHECK-LABEL: @test13( 153 ; CHECK-NEXT: [[C:%.*]] = getelementptr [32832 x i8], [32832 x i8]* @inbuf, i64 0, i64 %A 154 ; CHECK-NEXT: ret i8* [[C]] 155 ; 156 %c = getelementptr [0 x i8], [0 x i8]* bitcast ([32832 x i8]* @inbuf to [0 x i8]*), i64 0, i64 %A ; <i8*> [#uses=1] 157 ret i8* %c 158 } 159 160 define i1 @test14(i8 %A) { 161 ; CHECK-LABEL: @test14( 162 ; CHECK-NEXT: [[X:%.*]] = icmp sgt i8 %A, -1 163 ; CHECK-NEXT: ret i1 [[X]] 164 ; 165 %c = bitcast i8 %A to i8 ; <i8> [#uses=1] 166 %X = icmp ult i8 %c, -128 ; <i1> [#uses=1] 167 ret i1 %X 168 } 169 170 171 ; This just won't occur when there's no difference between ubyte and sbyte 172 ;bool %test15(ubyte %A) { 173 ; %c = cast ubyte %A to sbyte 174 ; %X = setlt sbyte %c, 0 ; setgt %A, 127 175 ; ret bool %X 176 ;} 177 178 define i1 @test16(i32* %P) { 179 ; CHECK-LABEL: @test16( 180 ; CHECK-NEXT: [[C:%.*]] = icmp ne i32* %P, null 181 ; CHECK-NEXT: ret i1 [[C]] 182 ; 183 %c = icmp ne i32* %P, null ; <i1> [#uses=1] 184 ret i1 %c 185 } 186 187 define i16 @test17(i1 %tmp3) { 188 ; CHECK-LABEL: @test17( 189 ; CHECK-NEXT: [[T86:%.*]] = zext i1 %tmp3 to i16 190 ; CHECK-NEXT: ret i16 [[T86]] 191 ; 192 %c = zext i1 %tmp3 to i32 ; <i32> [#uses=1] 193 %t86 = trunc i32 %c to i16 ; <i16> [#uses=1] 194 ret i16 %t86 195 } 196 197 define i16 @test18(i8 %tmp3) { 198 ; CHECK-LABEL: @test18( 199 ; CHECK-NEXT: [[T86:%.*]] = sext i8 %tmp3 to i16 200 ; CHECK-NEXT: ret i16 [[T86]] 201 ; 202 %c = sext i8 %tmp3 to i32 ; <i32> [#uses=1] 203 %t86 = trunc i32 %c to i16 ; <i16> [#uses=1] 204 ret i16 %t86 205 } 206 207 define i1 @test19(i32 %X) { 208 ; CHECK-LABEL: @test19( 209 ; CHECK-NEXT: [[Z:%.*]] = icmp slt i32 %X, 12345 210 ; CHECK-NEXT: ret i1 [[Z]] 211 ; 212 %c = sext i32 %X to i64 213 %Z = icmp slt i64 %c, 12345 214 ret i1 %Z 215 } 216 217 define <2 x i1> @test19vec(<2 x i32> %X) { 218 ; CHECK-LABEL: @test19vec( 219 ; CHECK-NEXT: [[Z:%.*]] = icmp slt <2 x i32> %X, <i32 12345, i32 2147483647> 220 ; CHECK-NEXT: ret <2 x i1> [[Z]] 221 ; 222 %c = sext <2 x i32> %X to <2 x i64> 223 %Z = icmp slt <2 x i64> %c, <i64 12345, i64 2147483647> 224 ret <2 x i1> %Z 225 } 226 227 define <3 x i1> @test19vec2(<3 x i1> %X) { 228 ; CHECK-LABEL: @test19vec2( 229 ; CHECK-NEXT: [[CMPEQ:%.*]] = xor <3 x i1> %X, <i1 true, i1 true, i1 true> 230 ; CHECK-NEXT: ret <3 x i1> [[CMPEQ]] 231 ; 232 %sext = sext <3 x i1> %X to <3 x i32> 233 %cmpeq = icmp eq <3 x i32> %sext, zeroinitializer 234 ret <3 x i1> %cmpeq 235 } 236 237 define i1 @test20(i1 %B) { 238 ; CHECK-LABEL: @test20( 239 ; CHECK-NEXT: ret i1 false 240 ; 241 %c = zext i1 %B to i32 ; <i32> [#uses=1] 242 %D = icmp slt i32 %c, -1 ; <i1> [#uses=1] 243 ;; false 244 ret i1 %D 245 } 246 247 define i32 @test21(i32 %X) { 248 ; CHECK-LABEL: @test21( 249 ; CHECK-NEXT: [[C21:%.*]] = and i32 %X, 255 250 ; CHECK-NEXT: ret i32 [[C21]] 251 ; 252 %c1 = trunc i32 %X to i8 ; <i8> [#uses=1] 253 ;; sext -> zext -> and -> nop 254 %c2 = sext i8 %c1 to i32 ; <i32> [#uses=1] 255 %RV = and i32 %c2, 255 ; <i32> [#uses=1] 256 ret i32 %RV 257 } 258 259 define i32 @test22(i32 %X) { 260 ; CHECK-LABEL: @test22( 261 ; CHECK-NEXT: [[SEXT:%.*]] = shl i32 %X, 24 262 ; CHECK-NEXT: ret i32 [[SEXT]] 263 ; 264 %c1 = trunc i32 %X to i8 ; <i8> [#uses=1] 265 ;; sext -> zext -> and -> nop 266 %c2 = sext i8 %c1 to i32 ; <i32> [#uses=1] 267 %RV = shl i32 %c2, 24 ; <i32> [#uses=1] 268 ret i32 %RV 269 } 270 271 define i32 @test23(i32 %X) { 272 ;; Turn into an AND even though X 273 ; CHECK-LABEL: @test23( 274 ; CHECK-NEXT: [[C2:%.*]] = and i32 %X, 65535 275 ; CHECK-NEXT: ret i32 [[C2]] 276 ; 277 %c1 = trunc i32 %X to i16 ; <i16> [#uses=1] 278 ;; and Z are signed. 279 %c2 = zext i16 %c1 to i32 ; <i32> [#uses=1] 280 ret i32 %c2 281 } 282 283 define i1 @test24(i1 %C) { 284 ; CHECK-LABEL: @test24( 285 ; CHECK-NEXT: ret i1 true 286 ; 287 %X = select i1 %C, i32 14, i32 1234 ; <i32> [#uses=1] 288 ;; Fold cast into select 289 %c = icmp ne i32 %X, 0 ; <i1> [#uses=1] 290 ret i1 %c 291 } 292 293 define i32 @test26(float %F) { 294 ;; no need to cast from float->double. 295 ; CHECK-LABEL: @test26( 296 ; CHECK-NEXT: [[D:%.*]] = fptosi float %F to i32 297 ; CHECK-NEXT: ret i32 [[D]] 298 ; 299 %c = fpext float %F to double ; <double> [#uses=1] 300 %D = fptosi double %c to i32 ; <i32> [#uses=1] 301 ret i32 %D 302 } 303 304 define [4 x float]* @test27([9 x [4 x float]]* %A) { 305 ; CHECK-LABEL: @test27( 306 ; CHECK-NEXT: [[C:%.*]] = getelementptr inbounds [9 x [4 x float]], [9 x [4 x float]]* %A, i64 0, i64 0 307 ; CHECK-NEXT: ret [4 x float]* [[C]] 308 ; 309 %c = bitcast [9 x [4 x float]]* %A to [4 x float]* ; <[4 x float]*> [#uses=1] 310 ret [4 x float]* %c 311 } 312 313 define float* @test28([4 x float]* %A) { 314 ; CHECK-LABEL: @test28( 315 ; CHECK-NEXT: [[C:%.*]] = getelementptr inbounds [4 x float], [4 x float]* %A, i64 0, i64 0 316 ; CHECK-NEXT: ret float* [[C]] 317 ; 318 %c = bitcast [4 x float]* %A to float* ; <float*> [#uses=1] 319 ret float* %c 320 } 321 322 define i32 @test29(i32 %c1, i32 %c2) { 323 ; CHECK-LABEL: @test29( 324 ; CHECK-NEXT: [[TMP2:%.*]] = or i32 %c2, %c1 325 ; CHECK-NEXT: [[TMP10:%.*]] = and i32 [[TMP2]], 255 326 ; CHECK-NEXT: ret i32 [[TMP10]] 327 ; 328 %tmp1 = trunc i32 %c1 to i8 ; <i8> [#uses=1] 329 %tmp4.mask = trunc i32 %c2 to i8 ; <i8> [#uses=1] 330 %tmp = or i8 %tmp4.mask, %tmp1 ; <i8> [#uses=1] 331 %tmp10 = zext i8 %tmp to i32 ; <i32> [#uses=1] 332 ret i32 %tmp10 333 } 334 335 define i32 @test30(i32 %c1) { 336 ; CHECK-LABEL: @test30( 337 ; CHECK-NEXT: [[C3:%.*]] = and i32 %c1, 255 338 ; CHECK-NEXT: [[C4:%.*]] = xor i32 [[C3]], 1 339 ; CHECK-NEXT: ret i32 [[C4]] 340 ; 341 %c2 = trunc i32 %c1 to i8 ; <i8> [#uses=1] 342 %c3 = xor i8 %c2, 1 ; <i8> [#uses=1] 343 %c4 = zext i8 %c3 to i32 ; <i32> [#uses=1] 344 ret i32 %c4 345 } 346 347 define i1 @test31(i64 %A) { 348 ; CHECK-LABEL: @test31( 349 ; CHECK-NEXT: [[C:%.*]] = and i64 %A, 42 350 ; CHECK-NEXT: [[D:%.*]] = icmp eq i64 [[C]], 10 351 ; CHECK-NEXT: ret i1 [[D]] 352 ; 353 %B = trunc i64 %A to i32 354 %C = and i32 %B, 42 355 %D = icmp eq i32 %C, 10 356 ret i1 %D 357 } 358 359 ; FIXME: Vectors should fold too...or not? 360 ; Does this depend on the whether the source/dest types of the trunc are legal in the data layout? 361 define <2 x i1> @test31vec(<2 x i64> %A) { 362 ; CHECK-LABEL: @test31vec( 363 ; CHECK-NEXT: [[B:%.*]] = trunc <2 x i64> %A to <2 x i32> 364 ; CHECK-NEXT: [[C:%.*]] = and <2 x i32> [[B]], <i32 42, i32 42> 365 ; CHECK-NEXT: [[D:%.*]] = icmp eq <2 x i32> [[C]], <i32 10, i32 10> 366 ; CHECK-NEXT: ret <2 x i1> [[D]] 367 ; 368 %B = trunc <2 x i64> %A to <2 x i32> 369 %C = and <2 x i32> %B, <i32 42, i32 42> 370 %D = icmp eq <2 x i32> %C, <i32 10, i32 10> 371 ret <2 x i1> %D 372 } 373 374 ; Verify that the 'and' was narrowed, the zext was eliminated, and the compare was narrowed 375 ; even for vectors. Earlier folds should ensure that the icmp(and(zext)) pattern never occurs. 376 377 define <2 x i1> @test32vec(<2 x i8> %A) { 378 ; CHECK-LABEL: @test32vec( 379 ; CHECK-NEXT: [[TMP1:%.*]] = and <2 x i8> %A, <i8 42, i8 42> 380 ; CHECK-NEXT: [[D:%.*]] = icmp eq <2 x i8> [[TMP1]], <i8 10, i8 10> 381 ; CHECK-NEXT: ret <2 x i1> [[D]] 382 ; 383 %B = zext <2 x i8> %A to <2 x i16> 384 %C = and <2 x i16> %B, <i16 42, i16 42> 385 %D = icmp eq <2 x i16> %C, <i16 10, i16 10> 386 ret <2 x i1> %D 387 } 388 389 define i32 @test33(i32 %c1) { 390 ; CHECK-LABEL: @test33( 391 ; CHECK-NEXT: ret i32 %c1 392 ; 393 %x = bitcast i32 %c1 to float ; <float> [#uses=1] 394 %y = bitcast float %x to i32 ; <i32> [#uses=1] 395 ret i32 %y 396 } 397 398 define i16 @test34(i16 %a) { 399 ; CHECK-LABEL: @test34( 400 ; CHECK-NEXT: [[TMP21:%.*]] = lshr i16 %a, 8 401 ; CHECK-NEXT: ret i16 [[TMP21]] 402 ; 403 %c1 = zext i16 %a to i32 ; <i32> [#uses=1] 404 %tmp21 = lshr i32 %c1, 8 ; <i32> [#uses=1] 405 %c2 = trunc i32 %tmp21 to i16 ; <i16> [#uses=1] 406 ret i16 %c2 407 } 408 409 define i16 @test35(i16 %a) { 410 ; CHECK-LABEL: @test35( 411 ; CHECK-NEXT: [[TMP2:%.*]] = lshr i16 %a, 8 412 ; CHECK-NEXT: ret i16 [[TMP2]] 413 ; 414 %c1 = bitcast i16 %a to i16 ; <i16> [#uses=1] 415 %tmp2 = lshr i16 %c1, 8 ; <i16> [#uses=1] 416 %c2 = bitcast i16 %tmp2 to i16 ; <i16> [#uses=1] 417 ret i16 %c2 418 } 419 420 ; rdar://6480391 421 define i1 @test36(i32 %a) { 422 ; CHECK-LABEL: @test36( 423 ; CHECK-NEXT: [[D:%.*]] = icmp sgt i32 %a, -1 424 ; CHECK-NEXT: ret i1 [[D]] 425 ; 426 %b = lshr i32 %a, 31 427 %c = trunc i32 %b to i8 428 %d = icmp eq i8 %c, 0 429 ret i1 %d 430 } 431 432 define <2 x i1> @test36vec(<2 x i32> %a) { 433 ; CHECK-LABEL: @test36vec( 434 ; CHECK-NEXT: [[D:%.*]] = icmp sgt <2 x i32> %a, <i32 -1, i32 -1> 435 ; CHECK-NEXT: ret <2 x i1> [[D]] 436 ; 437 %b = lshr <2 x i32> %a, <i32 31, i32 31> 438 %c = trunc <2 x i32> %b to <2 x i8> 439 %d = icmp eq <2 x i8> %c, zeroinitializer 440 ret <2 x i1> %d 441 } 442 443 define i1 @test37(i32 %a) { 444 ; CHECK-LABEL: @test37( 445 ; CHECK-NEXT: ret i1 false 446 ; 447 %b = lshr i32 %a, 31 448 %c = or i32 %b, 512 449 %d = trunc i32 %c to i8 450 %e = icmp eq i8 %d, 11 451 ret i1 %e 452 } 453 454 define i64 @test38(i32 %a) { 455 ; CHECK-LABEL: @test38( 456 ; CHECK-NEXT: [[TMP1:%.*]] = icmp ne i32 %a, -2 457 ; CHECK-NEXT: [[TMP2:%.*]] = zext i1 [[TMP1]] to i64 458 ; CHECK-NEXT: ret i64 [[TMP2]] 459 ; 460 %1 = icmp eq i32 %a, -2 461 %2 = zext i1 %1 to i8 462 %3 = xor i8 %2, 1 463 %4 = zext i8 %3 to i64 464 ret i64 %4 465 } 466 467 define i16 @test39(i16 %a) { 468 ; CHECK-LABEL: @test39( 469 ; CHECK-NEXT: [[TMP_UPGRD_32:%.*]] = call i16 @llvm.bswap.i16(i16 %a) 470 ; CHECK-NEXT: ret i16 [[TMP_UPGRD_32]] 471 ; 472 %tmp = zext i16 %a to i32 473 %tmp21 = lshr i32 %tmp, 8 474 %tmp5 = shl i32 %tmp, 8 475 %tmp.upgrd.32 = or i32 %tmp21, %tmp5 476 %tmp.upgrd.3 = trunc i32 %tmp.upgrd.32 to i16 477 ret i16 %tmp.upgrd.3 478 } 479 480 define i16 @test40(i16 %a) { 481 ; CHECK-LABEL: @test40( 482 ; CHECK-NEXT: [[TMP21:%.*]] = lshr i16 %a, 9 483 ; CHECK-NEXT: [[TMP5:%.*]] = shl i16 %a, 8 484 ; CHECK-NEXT: [[TMP_UPGRD_32:%.*]] = or i16 [[TMP21]], [[TMP5]] 485 ; CHECK-NEXT: ret i16 [[TMP_UPGRD_32]] 486 ; 487 %tmp = zext i16 %a to i32 488 %tmp21 = lshr i32 %tmp, 9 489 %tmp5 = shl i32 %tmp, 8 490 %tmp.upgrd.32 = or i32 %tmp21, %tmp5 491 %tmp.upgrd.3 = trunc i32 %tmp.upgrd.32 to i16 492 ret i16 %tmp.upgrd.3 493 } 494 495 define <2 x i16> @test40vec(<2 x i16> %a) { 496 ; CHECK-LABEL: @test40vec( 497 ; CHECK-NEXT: [[TMP21:%.*]] = lshr <2 x i16> [[A:%.*]], <i16 9, i16 9> 498 ; CHECK-NEXT: [[TMP5:%.*]] = shl <2 x i16> [[A]], <i16 8, i16 8> 499 ; CHECK-NEXT: [[TMP_UPGRD_32:%.*]] = or <2 x i16> [[TMP21]], [[TMP5]] 500 ; CHECK-NEXT: ret <2 x i16> [[TMP_UPGRD_32]] 501 ; 502 %tmp = zext <2 x i16> %a to <2 x i32> 503 %tmp21 = lshr <2 x i32> %tmp, <i32 9, i32 9> 504 %tmp5 = shl <2 x i32> %tmp, <i32 8, i32 8> 505 %tmp.upgrd.32 = or <2 x i32> %tmp21, %tmp5 506 %tmp.upgrd.3 = trunc <2 x i32> %tmp.upgrd.32 to <2 x i16> 507 ret <2 x i16> %tmp.upgrd.3 508 } 509 510 ; PR1263 511 define i32* @test41(i32* %tmp1) { 512 ; CHECK-LABEL: @test41( 513 ; CHECK-NEXT: ret i32* %tmp1 514 ; 515 %tmp64 = bitcast i32* %tmp1 to { i32 }* 516 %tmp65 = getelementptr { i32 }, { i32 }* %tmp64, i32 0, i32 0 517 ret i32* %tmp65 518 } 519 520 define i32 addrspace(1)* @test41_addrspacecast_smaller(i32* %tmp1) { 521 ; CHECK-LABEL: @test41_addrspacecast_smaller( 522 ; CHECK-NEXT: [[TMP65:%.*]] = addrspacecast i32* %tmp1 to i32 addrspace(1)* 523 ; CHECK-NEXT: ret i32 addrspace(1)* [[TMP65]] 524 ; 525 %tmp64 = addrspacecast i32* %tmp1 to { i32 } addrspace(1)* 526 %tmp65 = getelementptr { i32 }, { i32 } addrspace(1)* %tmp64, i32 0, i32 0 527 ret i32 addrspace(1)* %tmp65 528 } 529 530 define i32* @test41_addrspacecast_larger(i32 addrspace(1)* %tmp1) { 531 ; CHECK-LABEL: @test41_addrspacecast_larger( 532 ; CHECK-NEXT: [[TMP65:%.*]] = addrspacecast i32 addrspace(1)* %tmp1 to i32* 533 ; CHECK-NEXT: ret i32* [[TMP65]] 534 ; 535 %tmp64 = addrspacecast i32 addrspace(1)* %tmp1 to { i32 }* 536 %tmp65 = getelementptr { i32 }, { i32 }* %tmp64, i32 0, i32 0 537 ret i32* %tmp65 538 } 539 540 define i32 @test42(i32 %X) { 541 ; CHECK-LABEL: @test42( 542 ; CHECK-NEXT: [[Z:%.*]] = and i32 %X, 255 543 ; CHECK-NEXT: ret i32 [[Z]] 544 ; 545 %Y = trunc i32 %X to i8 ; <i8> [#uses=1] 546 %Z = zext i8 %Y to i32 ; <i32> [#uses=1] 547 ret i32 %Z 548 } 549 550 ; rdar://6598839 551 define zeroext i64 @test43(i8 zeroext %on_off) nounwind readonly { 552 ; CHECK-LABEL: @test43( 553 ; CHECK-NEXT: [[A:%.*]] = zext i8 %on_off to i64 554 ; CHECK-NEXT: [[B:%.*]] = add nsw i64 [[A]], -1 555 ; CHECK-NEXT: ret i64 [[B]] 556 ; 557 %A = zext i8 %on_off to i32 558 %B = add i32 %A, -1 559 %C = sext i32 %B to i64 560 ret i64 %C ;; Should be (add (zext i8 -> i64), -1) 561 } 562 563 define i64 @test44(i8 %T) { 564 ; CHECK-LABEL: @test44( 565 ; CHECK-NEXT: [[A:%.*]] = zext i8 %T to i64 566 ; CHECK-NEXT: [[B:%.*]] = or i64 [[A]], 1234 567 ; CHECK-NEXT: ret i64 [[B]] 568 ; 569 %A = zext i8 %T to i16 570 %B = or i16 %A, 1234 571 %C = zext i16 %B to i64 572 ret i64 %C 573 } 574 575 define i64 @test45(i8 %A, i64 %Q) { 576 ; CHECK-LABEL: @test45( 577 ; CHECK-NEXT: [[B:%.*]] = sext i8 %A to i64 578 ; CHECK-NEXT: [[C:%.*]] = or i64 [[B]], %Q 579 ; CHECK-NEXT: [[E:%.*]] = and i64 [[C]], 4294967295 580 ; CHECK-NEXT: ret i64 [[E]] 581 ; 582 %D = trunc i64 %Q to i32 ;; should be removed 583 %B = sext i8 %A to i32 584 %C = or i32 %B, %D 585 %E = zext i32 %C to i64 586 ret i64 %E 587 } 588 589 590 define i64 @test46(i64 %A) { 591 ; CHECK-LABEL: @test46( 592 ; CHECK-NEXT: [[C:%.*]] = shl i64 %A, 8 593 ; CHECK-NEXT: [[D:%.*]] = and i64 [[C]], 10752 594 ; CHECK-NEXT: ret i64 [[D]] 595 ; 596 %B = trunc i64 %A to i32 597 %C = and i32 %B, 42 598 %D = shl i32 %C, 8 599 %E = zext i32 %D to i64 600 ret i64 %E 601 } 602 603 define <2 x i64> @test46vec(<2 x i64> %A) { 604 ; CHECK-LABEL: @test46vec( 605 ; CHECK-NEXT: [[C:%.*]] = shl <2 x i64> [[A:%.*]], <i64 8, i64 8> 606 ; CHECK-NEXT: [[D:%.*]] = and <2 x i64> [[C]], <i64 10752, i64 10752> 607 ; CHECK-NEXT: ret <2 x i64> [[D]] 608 ; 609 %B = trunc <2 x i64> %A to <2 x i32> 610 %C = and <2 x i32> %B, <i32 42, i32 42> 611 %D = shl <2 x i32> %C, <i32 8, i32 8> 612 %E = zext <2 x i32> %D to <2 x i64> 613 ret <2 x i64> %E 614 } 615 616 define i64 @test47(i8 %A) { 617 ; CHECK-LABEL: @test47( 618 ; CHECK-NEXT: [[TMP1:%.*]] = or i8 [[A:%.*]], 42 619 ; CHECK-NEXT: [[C:%.*]] = sext i8 [[TMP1]] to i64 620 ; CHECK-NEXT: [[E:%.*]] = and i64 [[C]], 4294967295 621 ; CHECK-NEXT: ret i64 [[E]] 622 ; 623 %B = sext i8 %A to i32 624 %C = or i32 %B, 42 625 %E = zext i32 %C to i64 626 ret i64 %E 627 } 628 629 define i64 @test48(i8 %A1, i8 %a2) { 630 ; CHECK-LABEL: @test48( 631 ; CHECK-NEXT: [[Z2:%.*]] = zext i8 %A1 to i32 632 ; CHECK-NEXT: [[C:%.*]] = shl nuw nsw i32 [[Z2]], 8 633 ; CHECK-NEXT: [[D:%.*]] = or i32 [[C]], [[Z2]] 634 ; CHECK-NEXT: [[E:%.*]] = zext i32 [[D]] to i64 635 ; CHECK-NEXT: ret i64 [[E]] 636 ; 637 %Z1 = zext i8 %a2 to i32 638 %Z2 = zext i8 %A1 to i32 639 %C = shl i32 %Z2, 8 640 %D = or i32 %C, %Z2 641 %E = zext i32 %D to i64 642 ret i64 %E 643 } 644 645 define i64 @test49(i64 %A) { 646 ; CHECK-LABEL: @test49( 647 ; CHECK-NEXT: [[C:%.*]] = shl i64 %A, 32 648 ; CHECK-NEXT: [[SEXT:%.*]] = ashr exact i64 [[C]], 32 649 ; CHECK-NEXT: [[D:%.*]] = or i64 [[SEXT]], 1 650 ; CHECK-NEXT: ret i64 [[D]] 651 ; 652 %B = trunc i64 %A to i32 653 %C = or i32 %B, 1 654 %D = sext i32 %C to i64 655 ret i64 %D 656 } 657 658 define i64 @test50(i64 %A) { 659 ; CHECK-LABEL: @test50( 660 ; CHECK-NEXT: [[A:%.*]] = lshr i64 %A, 2 661 ; CHECK-NEXT: [[D:%.*]] = shl i64 [[A]], 32 662 ; CHECK-NEXT: [[SEXT:%.*]] = add i64 [[D]], -4294967296 663 ; CHECK-NEXT: [[E:%.*]] = ashr exact i64 [[SEXT]], 32 664 ; CHECK-NEXT: ret i64 [[E]] 665 ; 666 %a = lshr i64 %A, 2 667 %B = trunc i64 %a to i32 668 %D = add i32 %B, -1 669 %E = sext i32 %D to i64 670 ret i64 %E 671 ; lshr+shl will be handled by DAGCombine. 672 } 673 674 define i64 @test51(i64 %A, i1 %cond) { 675 ; CHECK-LABEL: @test51( 676 ; CHECK-NEXT: [[C:%.*]] = and i64 %A, 4294967294 677 ; CHECK-NEXT: [[D:%.*]] = or i64 %A, 1 678 ; CHECK-NEXT: [[E:%.*]] = select i1 %cond, i64 [[C]], i64 [[D]] 679 ; CHECK-NEXT: [[SEXT:%.*]] = shl i64 [[E]], 32 680 ; CHECK-NEXT: [[F:%.*]] = ashr exact i64 [[SEXT]], 32 681 ; CHECK-NEXT: ret i64 [[F]] 682 ; 683 %B = trunc i64 %A to i32 684 %C = and i32 %B, -2 685 %D = or i32 %B, 1 686 %E = select i1 %cond, i32 %C, i32 %D 687 %F = sext i32 %E to i64 688 ret i64 %F 689 } 690 691 define i32 @test52(i64 %A) { 692 ; CHECK-LABEL: @test52( 693 ; CHECK-NEXT: [[B:%.*]] = trunc i64 %A to i32 694 ; CHECK-NEXT: [[C:%.*]] = and i32 [[B]], 7224 695 ; CHECK-NEXT: [[D:%.*]] = or i32 [[C]], 32962 696 ; CHECK-NEXT: ret i32 [[D]] 697 ; 698 %B = trunc i64 %A to i16 699 %C = or i16 %B, -32574 700 %D = and i16 %C, -25350 701 %E = zext i16 %D to i32 702 ret i32 %E 703 } 704 705 define i64 @test53(i32 %A) { 706 ; CHECK-LABEL: @test53( 707 ; CHECK-NEXT: [[TMP1:%.*]] = and i32 %A, 7224 708 ; CHECK-NEXT: [[TMP2:%.*]] = or i32 [[TMP1]], 32962 709 ; CHECK-NEXT: [[D:%.*]] = zext i32 [[TMP2]] to i64 710 ; CHECK-NEXT: ret i64 [[D]] 711 ; 712 %B = trunc i32 %A to i16 713 %C = or i16 %B, -32574 714 %D = and i16 %C, -25350 715 %E = zext i16 %D to i64 716 ret i64 %E 717 } 718 719 define i32 @test54(i64 %A) { 720 ; CHECK-LABEL: @test54( 721 ; CHECK-NEXT: [[B:%.*]] = trunc i64 %A to i32 722 ; CHECK-NEXT: [[C:%.*]] = and i32 [[B]], 7224 723 ; CHECK-NEXT: [[D:%.*]] = or i32 [[C]], -32574 724 ; CHECK-NEXT: ret i32 [[D]] 725 ; 726 %B = trunc i64 %A to i16 727 %C = or i16 %B, -32574 728 %D = and i16 %C, -25350 729 %E = sext i16 %D to i32 730 ret i32 %E 731 } 732 733 define i64 @test55(i32 %A) { 734 ; CHECK-LABEL: @test55( 735 ; CHECK-NEXT: [[TMP1:%.*]] = and i32 %A, 7224 736 ; CHECK-NEXT: [[C:%.*]] = zext i32 [[TMP1]] to i64 737 ; CHECK-NEXT: [[D:%.*]] = or i64 [[C]], -32574 738 ; CHECK-NEXT: ret i64 [[D]] 739 ; 740 %B = trunc i32 %A to i16 741 %C = or i16 %B, -32574 742 %D = and i16 %C, -25350 743 %E = sext i16 %D to i64 744 ret i64 %E 745 } 746 747 define i64 @test56(i16 %A) nounwind { 748 ; CHECK-LABEL: @test56( 749 ; CHECK-NEXT: [[TMP353:%.*]] = sext i16 %A to i64 750 ; CHECK-NEXT: [[TMP354:%.*]] = lshr i64 [[TMP353]], 5 751 ; CHECK-NEXT: [[TMP355:%.*]] = and i64 [[TMP354]], 134217727 752 ; CHECK-NEXT: ret i64 [[TMP355]] 753 ; 754 %tmp353 = sext i16 %A to i32 755 %tmp354 = lshr i32 %tmp353, 5 756 %tmp355 = zext i32 %tmp354 to i64 757 ret i64 %tmp355 758 } 759 760 define <2 x i64> @test56vec(<2 x i16> %A) nounwind { 761 ; CHECK-LABEL: @test56vec( 762 ; CHECK-NEXT: [[TMP353:%.*]] = sext <2 x i16> [[A:%.*]] to <2 x i64> 763 ; CHECK-NEXT: [[TMP354:%.*]] = lshr <2 x i64> [[TMP353]], <i64 5, i64 5> 764 ; CHECK-NEXT: [[TMP355:%.*]] = and <2 x i64> [[TMP354]], <i64 134217727, i64 134217727> 765 ; CHECK-NEXT: ret <2 x i64> [[TMP355]] 766 ; 767 %tmp353 = sext <2 x i16> %A to <2 x i32> 768 %tmp354 = lshr <2 x i32> %tmp353, <i32 5, i32 5> 769 %tmp355 = zext <2 x i32> %tmp354 to <2 x i64> 770 ret <2 x i64> %tmp355 771 } 772 773 define i64 @test57(i64 %A) nounwind { 774 ; CHECK-LABEL: @test57( 775 ; CHECK-NEXT: [[C:%.*]] = lshr i64 %A, 8 776 ; CHECK-NEXT: [[E:%.*]] = and i64 [[C]], 16777215 777 ; CHECK-NEXT: ret i64 [[E]] 778 ; 779 %B = trunc i64 %A to i32 780 %C = lshr i32 %B, 8 781 %E = zext i32 %C to i64 782 ret i64 %E 783 } 784 785 define <2 x i64> @test57vec(<2 x i64> %A) nounwind { 786 ; CHECK-LABEL: @test57vec( 787 ; CHECK-NEXT: [[C:%.*]] = lshr <2 x i64> [[A:%.*]], <i64 8, i64 8> 788 ; CHECK-NEXT: [[E:%.*]] = and <2 x i64> [[C]], <i64 16777215, i64 16777215> 789 ; CHECK-NEXT: ret <2 x i64> [[E]] 790 ; 791 %B = trunc <2 x i64> %A to <2 x i32> 792 %C = lshr <2 x i32> %B, <i32 8, i32 8> 793 %E = zext <2 x i32> %C to <2 x i64> 794 ret <2 x i64> %E 795 } 796 797 define i64 @test58(i64 %A) nounwind { 798 ; CHECK-LABEL: @test58( 799 ; CHECK-NEXT: [[C:%.*]] = lshr i64 %A, 8 800 ; CHECK-NEXT: [[D:%.*]] = and i64 [[C]], 16777087 801 ; CHECK-NEXT: [[E:%.*]] = or i64 [[D]], 128 802 ; CHECK-NEXT: ret i64 [[E]] 803 ; 804 %B = trunc i64 %A to i32 805 %C = lshr i32 %B, 8 806 %D = or i32 %C, 128 807 %E = zext i32 %D to i64 808 ret i64 %E 809 810 } 811 812 define i64 @test59(i8 %A, i8 %B) nounwind { 813 ; CHECK-LABEL: @test59( 814 ; CHECK-NEXT: [[C:%.*]] = zext i8 %A to i64 815 ; CHECK-NEXT: [[D:%.*]] = shl nuw nsw i64 [[C]], 4 816 ; CHECK-NEXT: [[E:%.*]] = and i64 [[D]], 48 817 ; CHECK-NEXT: [[TMP1:%.*]] = lshr i8 %B, 4 818 ; CHECK-NEXT: [[G:%.*]] = zext i8 [[TMP1]] to i64 819 ; CHECK-NEXT: [[H:%.*]] = or i64 [[E]], [[G]] 820 ; CHECK-NEXT: ret i64 [[H]] 821 ; 822 %C = zext i8 %A to i32 823 %D = shl i32 %C, 4 824 %E = and i32 %D, 48 825 %F = zext i8 %B to i32 826 %G = lshr i32 %F, 4 827 %H = or i32 %G, %E 828 %I = zext i32 %H to i64 829 ret i64 %I 830 } 831 832 define <3 x i32> @test60(<4 x i32> %call4) nounwind { 833 ; CHECK-LABEL: @test60( 834 ; CHECK-NEXT: [[TMP10:%.*]] = shufflevector <4 x i32> %call4, <4 x i32> undef, <3 x i32> <i32 0, i32 1, i32 2> 835 ; CHECK-NEXT: ret <3 x i32> [[TMP10]] 836 ; 837 %tmp11 = bitcast <4 x i32> %call4 to i128 838 %tmp9 = trunc i128 %tmp11 to i96 839 %tmp10 = bitcast i96 %tmp9 to <3 x i32> 840 ret <3 x i32> %tmp10 841 842 } 843 844 define <4 x i32> @test61(<3 x i32> %call4) nounwind { 845 ; CHECK-LABEL: @test61( 846 ; CHECK-NEXT: [[TMP10:%.*]] = shufflevector <3 x i32> %call4, <3 x i32> <i32 0, i32 undef, i32 undef>, <4 x i32> <i32 0, i32 1, i32 2, i32 3> 847 ; CHECK-NEXT: ret <4 x i32> [[TMP10]] 848 ; 849 %tmp11 = bitcast <3 x i32> %call4 to i96 850 %tmp9 = zext i96 %tmp11 to i128 851 %tmp10 = bitcast i128 %tmp9 to <4 x i32> 852 ret <4 x i32> %tmp10 853 } 854 855 define <4 x i32> @test62(<3 x float> %call4) nounwind { 856 ; CHECK-LABEL: @test62( 857 ; CHECK-NEXT: [[TMP1:%.*]] = bitcast <3 x float> %call4 to <3 x i32> 858 ; CHECK-NEXT: [[TMP10:%.*]] = shufflevector <3 x i32> [[TMP1]], <3 x i32> <i32 0, i32 undef, i32 undef>, <4 x i32> <i32 0, i32 1, i32 2, i32 3> 859 ; CHECK-NEXT: ret <4 x i32> [[TMP10]] 860 ; 861 %tmp11 = bitcast <3 x float> %call4 to i96 862 %tmp9 = zext i96 %tmp11 to i128 863 %tmp10 = bitcast i128 %tmp9 to <4 x i32> 864 ret <4 x i32> %tmp10 865 } 866 867 ; PR7311 - Don't create invalid IR on scalar->vector cast. 868 define <2 x float> @test63(i64 %tmp8) nounwind { 869 ; CHECK-LABEL: @test63( 870 ; CHECK-NEXT: entry: 871 ; CHECK-NEXT: [[A:%.*]] = bitcast i64 %tmp8 to <2 x i32> 872 ; CHECK-NEXT: [[VCVT_I:%.*]] = uitofp <2 x i32> [[A]] to <2 x float> 873 ; CHECK-NEXT: ret <2 x float> [[VCVT_I]] 874 ; 875 entry: 876 %a = bitcast i64 %tmp8 to <2 x i32> 877 %vcvt.i = uitofp <2 x i32> %a to <2 x float> 878 ret <2 x float> %vcvt.i 879 } 880 881 define <4 x float> @test64(<4 x float> %c) nounwind { 882 ; CHECK-LABEL: @test64( 883 ; CHECK-NEXT: ret <4 x float> %c 884 ; 885 %t0 = bitcast <4 x float> %c to <4 x i32> 886 %t1 = bitcast <4 x i32> %t0 to <4 x float> 887 ret <4 x float> %t1 888 } 889 890 define <4 x float> @test65(<4 x float> %c) nounwind { 891 ; CHECK-LABEL: @test65( 892 ; CHECK-NEXT: ret <4 x float> %c 893 ; 894 %t0 = bitcast <4 x float> %c to <2 x double> 895 %t1 = bitcast <2 x double> %t0 to <4 x float> 896 ret <4 x float> %t1 897 } 898 899 define <2 x float> @test66(<2 x float> %c) nounwind { 900 ; CHECK-LABEL: @test66( 901 ; CHECK-NEXT: ret <2 x float> %c 902 ; 903 %t0 = bitcast <2 x float> %c to double 904 %t1 = bitcast double %t0 to <2 x float> 905 ret <2 x float> %t1 906 } 907 908 define float @test2c() { 909 ; CHECK-LABEL: @test2c( 910 ; CHECK-NEXT: ret float -1.000000e+00 911 ; 912 ret float extractelement (<2 x float> bitcast (double bitcast (<2 x float> <float -1.000000e+00, float -1.000000e+00> to double) to <2 x float>), i32 0) 913 } 914 915 define i64 @test_mmx(<2 x i32> %c) nounwind { 916 ; CHECK-LABEL: @test_mmx( 917 ; CHECK-NEXT: [[C:%.*]] = bitcast <2 x i32> %c to i64 918 ; CHECK-NEXT: ret i64 [[C]] 919 ; 920 %A = bitcast <2 x i32> %c to x86_mmx 921 %B = bitcast x86_mmx %A to <2 x i32> 922 %C = bitcast <2 x i32> %B to i64 923 ret i64 %C 924 } 925 926 define i64 @test_mmx_const(<2 x i32> %c) nounwind { 927 ; CHECK-LABEL: @test_mmx_const( 928 ; CHECK-NEXT: ret i64 0 929 ; 930 %A = bitcast <2 x i32> zeroinitializer to x86_mmx 931 %B = bitcast x86_mmx %A to <2 x i32> 932 %C = bitcast <2 x i32> %B to i64 933 ret i64 %C 934 } 935 936 ; PR12514 937 define i1 @test67(i1 %a, i32 %b) { 938 ; CHECK-LABEL: @test67( 939 ; CHECK-NEXT: ret i1 false 940 ; 941 %tmp2 = zext i1 %a to i32 942 %conv6 = xor i32 %tmp2, 1 943 %and = and i32 %b, %conv6 944 %sext = shl nuw nsw i32 %and, 24 945 %neg.i = xor i32 %sext, -16777216 946 %conv.i.i = ashr exact i32 %neg.i, 24 947 %trunc = trunc i32 %conv.i.i to i8 948 %tobool.i = icmp eq i8 %trunc, 0 949 ret i1 %tobool.i 950 } 951 952 %s = type { i32, i32, i16 } 953 954 define %s @test68(%s *%p, i64 %i) { 955 ; CHECK-LABEL: @test68( 956 ; CHECK-NEXT: [[PP1:%.*]] = getelementptr %s, %s* %p, i64 %i 957 ; CHECK-NEXT: [[L:%.*]] = load %s, %s* [[PP1]], align 4 958 ; CHECK-NEXT: ret %s [[L]] 959 ; 960 %o = mul i64 %i, 12 961 %q = bitcast %s* %p to i8* 962 %pp = getelementptr inbounds i8, i8* %q, i64 %o 963 %r = bitcast i8* %pp to %s* 964 %l = load %s, %s* %r 965 ret %s %l 966 } 967 968 ; addrspacecasts should be eliminated. 969 define %s @test68_addrspacecast(%s* %p, i64 %i) { 970 ; CHECK-LABEL: @test68_addrspacecast( 971 ; CHECK-NEXT: [[PP1:%.*]] = getelementptr %s, %s* %p, i64 %i 972 ; CHECK-NEXT: [[L:%.*]] = load %s, %s* [[PP1]], align 4 973 ; CHECK-NEXT: ret %s [[L]] 974 ; 975 %o = mul i64 %i, 12 976 %q = addrspacecast %s* %p to i8 addrspace(2)* 977 %pp = getelementptr inbounds i8, i8 addrspace(2)* %q, i64 %o 978 %r = addrspacecast i8 addrspace(2)* %pp to %s* 979 %l = load %s, %s* %r 980 ret %s %l 981 } 982 983 define %s @test68_addrspacecast_2(%s* %p, i64 %i) { 984 ; CHECK-LABEL: @test68_addrspacecast_2( 985 ; CHECK-NEXT: [[PP1:%.*]] = getelementptr %s, %s* %p, i64 %i 986 ; CHECK-NEXT: [[R:%.*]] = addrspacecast %s* [[PP1]] to %s addrspace(1)* 987 ; CHECK-NEXT: [[L:%.*]] = load %s, %s addrspace(1)* [[R]], align 4 988 ; CHECK-NEXT: ret %s [[L]] 989 ; 990 %o = mul i64 %i, 12 991 %q = addrspacecast %s* %p to i8 addrspace(2)* 992 %pp = getelementptr inbounds i8, i8 addrspace(2)* %q, i64 %o 993 %r = addrspacecast i8 addrspace(2)* %pp to %s addrspace(1)* 994 %l = load %s, %s addrspace(1)* %r 995 ret %s %l 996 } 997 998 define %s @test68_as1(%s addrspace(1)* %p, i32 %i) { 999 ; CHECK-LABEL: @test68_as1( 1000 ; CHECK-NEXT: [[PP1:%.*]] = getelementptr %s, %s addrspace(1)* %p, i32 %i 1001 ; CHECK-NEXT: [[L:%.*]] = load %s, %s addrspace(1)* [[PP1]], align 4 1002 ; CHECK-NEXT: ret %s [[L]] 1003 ; 1004 %o = mul i32 %i, 12 1005 %q = bitcast %s addrspace(1)* %p to i8 addrspace(1)* 1006 %pp = getelementptr inbounds i8, i8 addrspace(1)* %q, i32 %o 1007 %r = bitcast i8 addrspace(1)* %pp to %s addrspace(1)* 1008 %l = load %s, %s addrspace(1)* %r 1009 ret %s %l 1010 } 1011 1012 define double @test69(double *%p, i64 %i) { 1013 ; CHECK-LABEL: @test69( 1014 ; CHECK-NEXT: [[PP1:%.*]] = getelementptr inbounds double, double* %p, i64 %i 1015 ; CHECK-NEXT: [[L:%.*]] = load double, double* [[PP1]], align 8 1016 ; CHECK-NEXT: ret double [[L]] 1017 ; 1018 %o = shl nsw i64 %i, 3 1019 %q = bitcast double* %p to i8* 1020 %pp = getelementptr inbounds i8, i8* %q, i64 %o 1021 %r = bitcast i8* %pp to double* 1022 %l = load double, double* %r 1023 ret double %l 1024 } 1025 1026 define %s @test70(%s *%p, i64 %i) { 1027 ; CHECK-LABEL: @test70( 1028 ; CHECK-NEXT: [[O:%.*]] = mul nsw i64 %i, 3 1029 ; CHECK-NEXT: [[PP1:%.*]] = getelementptr inbounds %s, %s* %p, i64 [[O]] 1030 ; CHECK-NEXT: [[L:%.*]] = load %s, %s* [[PP1]], align 4 1031 ; CHECK-NEXT: ret %s [[L]] 1032 ; 1033 %o = mul nsw i64 %i, 36 1034 %q = bitcast %s* %p to i8* 1035 %pp = getelementptr inbounds i8, i8* %q, i64 %o 1036 %r = bitcast i8* %pp to %s* 1037 %l = load %s, %s* %r 1038 ret %s %l 1039 } 1040 1041 define double @test71(double *%p, i64 %i) { 1042 ; CHECK-LABEL: @test71( 1043 ; CHECK-NEXT: [[O:%.*]] = shl i64 %i, 2 1044 ; CHECK-NEXT: [[PP1:%.*]] = getelementptr double, double* %p, i64 [[O]] 1045 ; CHECK-NEXT: [[L:%.*]] = load double, double* [[PP1]], align 8 1046 ; CHECK-NEXT: ret double [[L]] 1047 ; 1048 %o = shl i64 %i, 5 1049 %q = bitcast double* %p to i8* 1050 %pp = getelementptr i8, i8* %q, i64 %o 1051 %r = bitcast i8* %pp to double* 1052 %l = load double, double* %r 1053 ret double %l 1054 } 1055 1056 define double @test72(double *%p, i32 %i) { 1057 ; CHECK-LABEL: @test72( 1058 ; CHECK-NEXT: [[O:%.*]] = sext i32 %i to i64 1059 ; CHECK-NEXT: [[PP1:%.*]] = getelementptr inbounds double, double* %p, i64 [[O]] 1060 ; CHECK-NEXT: [[L:%.*]] = load double, double* [[PP1]], align 8 1061 ; CHECK-NEXT: ret double [[L]] 1062 ; 1063 %so = shl nsw i32 %i, 3 1064 %o = sext i32 %so to i64 1065 %q = bitcast double* %p to i8* 1066 %pp = getelementptr inbounds i8, i8* %q, i64 %o 1067 %r = bitcast i8* %pp to double* 1068 %l = load double, double* %r 1069 ret double %l 1070 } 1071 1072 define double @test73(double *%p, i128 %i) { 1073 ; CHECK-LABEL: @test73( 1074 ; CHECK-NEXT: [[O:%.*]] = trunc i128 %i to i64 1075 ; CHECK-NEXT: [[PP1:%.*]] = getelementptr double, double* %p, i64 [[O]] 1076 ; CHECK-NEXT: [[L:%.*]] = load double, double* [[PP1]], align 8 1077 ; CHECK-NEXT: ret double [[L]] 1078 ; 1079 %lo = shl nsw i128 %i, 3 1080 %o = trunc i128 %lo to i64 1081 %q = bitcast double* %p to i8* 1082 %pp = getelementptr inbounds i8, i8* %q, i64 %o 1083 %r = bitcast i8* %pp to double* 1084 %l = load double, double* %r 1085 ret double %l 1086 } 1087 1088 define double @test74(double *%p, i64 %i) { 1089 ; CHECK-LABEL: @test74( 1090 ; CHECK-NEXT: [[PP1:%.*]] = getelementptr inbounds double, double* %p, i64 %i 1091 ; CHECK-NEXT: [[L:%.*]] = load double, double* [[PP1]], align 8 1092 ; CHECK-NEXT: ret double [[L]] 1093 ; 1094 %q = bitcast double* %p to i64* 1095 %pp = getelementptr inbounds i64, i64* %q, i64 %i 1096 %r = bitcast i64* %pp to double* 1097 %l = load double, double* %r 1098 ret double %l 1099 } 1100 1101 define i32* @test75(i32* %p, i32 %x) { 1102 ; CHECK-LABEL: @test75( 1103 ; CHECK-NEXT: [[Y:%.*]] = shl i32 %x, 3 1104 ; CHECK-NEXT: [[Z:%.*]] = sext i32 [[Y]] to i64 1105 ; CHECK-NEXT: [[Q:%.*]] = bitcast i32* %p to i8* 1106 ; CHECK-NEXT: [[R:%.*]] = getelementptr i8, i8* [[Q]], i64 [[Z]] 1107 ; CHECK-NEXT: [[S:%.*]] = bitcast i8* [[R]] to i32* 1108 ; CHECK-NEXT: ret i32* [[S]] 1109 ; 1110 %y = shl i32 %x, 3 1111 %z = sext i32 %y to i64 1112 %q = bitcast i32* %p to i8* 1113 %r = getelementptr i8, i8* %q, i64 %z 1114 %s = bitcast i8* %r to i32* 1115 ret i32* %s 1116 } 1117 1118 define %s @test76(%s *%p, i64 %i, i64 %j) { 1119 ; CHECK-LABEL: @test76( 1120 ; CHECK-NEXT: [[O2:%.*]] = mul i64 %i, %j 1121 ; CHECK-NEXT: [[PP1:%.*]] = getelementptr %s, %s* %p, i64 [[O2]] 1122 ; CHECK-NEXT: [[L:%.*]] = load %s, %s* [[PP1]], align 4 1123 ; CHECK-NEXT: ret %s [[L]] 1124 ; 1125 %o = mul i64 %i, 12 1126 %o2 = mul nsw i64 %o, %j 1127 %q = bitcast %s* %p to i8* 1128 %pp = getelementptr inbounds i8, i8* %q, i64 %o2 1129 %r = bitcast i8* %pp to %s* 1130 %l = load %s, %s* %r 1131 ret %s %l 1132 } 1133 1134 define %s @test77(%s *%p, i64 %i, i64 %j) { 1135 ; CHECK-LABEL: @test77( 1136 ; CHECK-NEXT: [[O:%.*]] = mul nsw i64 %i, 3 1137 ; CHECK-NEXT: [[O2:%.*]] = mul nsw i64 [[O]], %j 1138 ; CHECK-NEXT: [[PP1:%.*]] = getelementptr inbounds %s, %s* %p, i64 [[O2]] 1139 ; CHECK-NEXT: [[L:%.*]] = load %s, %s* [[PP1]], align 4 1140 ; CHECK-NEXT: ret %s [[L]] 1141 ; 1142 %o = mul nsw i64 %i, 36 1143 %o2 = mul nsw i64 %o, %j 1144 %q = bitcast %s* %p to i8* 1145 %pp = getelementptr inbounds i8, i8* %q, i64 %o2 1146 %r = bitcast i8* %pp to %s* 1147 %l = load %s, %s* %r 1148 ret %s %l 1149 } 1150 1151 define %s @test78(%s *%p, i64 %i, i64 %j, i32 %k, i32 %l, i128 %m, i128 %n) { 1152 ; CHECK-LABEL: @test78( 1153 ; CHECK-NEXT: [[A:%.*]] = mul nsw i32 %k, 3 1154 ; CHECK-NEXT: [[B:%.*]] = mul nsw i32 [[A]], %l 1155 ; CHECK-NEXT: [[C:%.*]] = sext i32 [[B]] to i128 1156 ; CHECK-NEXT: [[D:%.*]] = mul nsw i128 [[C]], %m 1157 ; CHECK-NEXT: [[E:%.*]] = mul i128 [[D]], %n 1158 ; CHECK-NEXT: [[F:%.*]] = trunc i128 [[E]] to i64 1159 ; CHECK-NEXT: [[G:%.*]] = mul i64 [[F]], %i 1160 ; CHECK-NEXT: [[H:%.*]] = mul i64 [[G]], %j 1161 ; CHECK-NEXT: [[PP1:%.*]] = getelementptr %s, %s* %p, i64 [[H]] 1162 ; CHECK-NEXT: [[LOAD:%.*]] = load %s, %s* [[PP1]], align 4 1163 ; CHECK-NEXT: ret %s [[LOAD]] 1164 ; 1165 %a = mul nsw i32 %k, 36 1166 %b = mul nsw i32 %a, %l 1167 %c = sext i32 %b to i128 1168 %d = mul nsw i128 %c, %m 1169 %e = mul i128 %d, %n 1170 %f = trunc i128 %e to i64 1171 %g = mul nsw i64 %f, %i 1172 %h = mul nsw i64 %g, %j 1173 %q = bitcast %s* %p to i8* 1174 %pp = getelementptr inbounds i8, i8* %q, i64 %h 1175 %r = bitcast i8* %pp to %s* 1176 %load = load %s, %s* %r 1177 ret %s %load 1178 } 1179 1180 define %s @test79(%s *%p, i64 %i, i32 %j) { 1181 ; CHECK-LABEL: @test79( 1182 ; CHECK-NEXT: [[TMP1:%.*]] = trunc i64 %i to i32 1183 ; CHECK-NEXT: [[B:%.*]] = mul i32 [[TMP1]], 36 1184 ; CHECK-NEXT: [[C:%.*]] = mul i32 [[B]], %j 1185 ; CHECK-NEXT: [[Q:%.*]] = bitcast %s* %p to i8* 1186 ; CHECK-NEXT: [[TMP2:%.*]] = sext i32 [[C]] to i64 1187 ; CHECK-NEXT: [[PP:%.*]] = getelementptr inbounds i8, i8* [[Q]], i64 [[TMP2]] 1188 ; CHECK-NEXT: [[R:%.*]] = bitcast i8* [[PP]] to %s* 1189 ; CHECK-NEXT: [[L:%.*]] = load %s, %s* [[R]], align 4 1190 ; CHECK-NEXT: ret %s [[L]] 1191 ; 1192 %a = mul nsw i64 %i, 36 1193 %b = trunc i64 %a to i32 1194 %c = mul i32 %b, %j 1195 %q = bitcast %s* %p to i8* 1196 %pp = getelementptr inbounds i8, i8* %q, i32 %c 1197 %r = bitcast i8* %pp to %s* 1198 %l = load %s, %s* %r 1199 ret %s %l 1200 } 1201 1202 define double @test80([100 x double]* %p, i32 %i) { 1203 ; CHECK-LABEL: @test80( 1204 ; CHECK-NEXT: [[TMP1:%.*]] = sext i32 %i to i64 1205 ; CHECK-NEXT: [[PP1:%.*]] = getelementptr [100 x double], [100 x double]* %p, i64 0, i64 [[TMP1]] 1206 ; CHECK-NEXT: [[L:%.*]] = load double, double* [[PP1]], align 8 1207 ; CHECK-NEXT: ret double [[L]] 1208 ; 1209 %tmp = shl nsw i32 %i, 3 1210 %q = bitcast [100 x double]* %p to i8* 1211 %pp = getelementptr i8, i8* %q, i32 %tmp 1212 %r = bitcast i8* %pp to double* 1213 %l = load double, double* %r 1214 ret double %l 1215 } 1216 1217 define double @test80_addrspacecast([100 x double] addrspace(1)* %p, i32 %i) { 1218 ; CHECK-LABEL: @test80_addrspacecast( 1219 ; CHECK-NEXT: [[PP1:%.*]] = getelementptr [100 x double], [100 x double] addrspace(1)* %p, i32 0, i32 %i 1220 ; CHECK-NEXT: [[L:%.*]] = load double, double addrspace(1)* [[PP1]], align 8 1221 ; CHECK-NEXT: ret double [[L]] 1222 ; 1223 %tmp = shl nsw i32 %i, 3 1224 %q = addrspacecast [100 x double] addrspace(1)* %p to i8 addrspace(2)* 1225 %pp = getelementptr i8, i8 addrspace(2)* %q, i32 %tmp 1226 %r = addrspacecast i8 addrspace(2)* %pp to double addrspace(1)* 1227 %l = load double, double addrspace(1)* %r 1228 ret double %l 1229 } 1230 1231 define double @test80_addrspacecast_2([100 x double] addrspace(1)* %p, i32 %i) { 1232 ; CHECK-LABEL: @test80_addrspacecast_2( 1233 ; CHECK-NEXT: [[PP1:%.*]] = getelementptr [100 x double], [100 x double] addrspace(1)* %p, i32 0, i32 %i 1234 ; CHECK-NEXT: [[R:%.*]] = addrspacecast double addrspace(1)* [[PP1]] to double addrspace(3)* 1235 ; CHECK-NEXT: [[L:%.*]] = load double, double addrspace(3)* [[R]], align 8 1236 ; CHECK-NEXT: ret double [[L]] 1237 ; 1238 %tmp = shl nsw i32 %i, 3 1239 %q = addrspacecast [100 x double] addrspace(1)* %p to i8 addrspace(2)* 1240 %pp = getelementptr i8, i8 addrspace(2)* %q, i32 %tmp 1241 %r = addrspacecast i8 addrspace(2)* %pp to double addrspace(3)* 1242 %l = load double, double addrspace(3)* %r 1243 ret double %l 1244 } 1245 1246 define double @test80_as1([100 x double] addrspace(1)* %p, i16 %i) { 1247 ; CHECK-LABEL: @test80_as1( 1248 ; CHECK-NEXT: [[TMP1:%.*]] = sext i16 %i to i32 1249 ; CHECK-NEXT: [[PP1:%.*]] = getelementptr [100 x double], [100 x double] addrspace(1)* %p, i32 0, i32 [[TMP1]] 1250 ; CHECK-NEXT: [[L:%.*]] = load double, double addrspace(1)* [[PP1]], align 8 1251 ; CHECK-NEXT: ret double [[L]] 1252 ; 1253 %tmp = shl nsw i16 %i, 3 1254 %q = bitcast [100 x double] addrspace(1)* %p to i8 addrspace(1)* 1255 %pp = getelementptr i8, i8 addrspace(1)* %q, i16 %tmp 1256 %r = bitcast i8 addrspace(1)* %pp to double addrspace(1)* 1257 %l = load double, double addrspace(1)* %r 1258 ret double %l 1259 } 1260 1261 define double @test81(double *%p, float %f) { 1262 ; CHECK-LABEL: @test81( 1263 ; CHECK-NEXT: [[I:%.*]] = fptosi float %f to i64 1264 ; CHECK-NEXT: [[Q:%.*]] = bitcast double* %p to i8* 1265 ; CHECK-NEXT: [[PP:%.*]] = getelementptr i8, i8* [[Q]], i64 [[I]] 1266 ; CHECK-NEXT: [[R:%.*]] = bitcast i8* [[PP]] to double* 1267 ; CHECK-NEXT: [[L:%.*]] = load double, double* [[R]], align 8 1268 ; CHECK-NEXT: ret double [[L]] 1269 ; 1270 %i = fptosi float %f to i64 1271 %q = bitcast double* %p to i8* 1272 %pp = getelementptr i8, i8* %q, i64 %i 1273 %r = bitcast i8* %pp to double* 1274 %l = load double, double* %r 1275 ret double %l 1276 } 1277 1278 define i64 @test82(i64 %A) nounwind { 1279 ; CHECK-LABEL: @test82( 1280 ; CHECK-NEXT: [[TMP1:%.*]] = shl i64 %A, 1 1281 ; CHECK-NEXT: [[E:%.*]] = and i64 [[TMP1]], 4294966784 1282 ; CHECK-NEXT: ret i64 [[E]] 1283 ; 1284 %B = trunc i64 %A to i32 1285 %C = lshr i32 %B, 8 1286 %D = shl i32 %C, 9 1287 %E = zext i32 %D to i64 1288 ret i64 %E 1289 } 1290 1291 ; PR15959 1292 define i64 @test83(i16 %a, i64 %k) { 1293 ; CHECK-LABEL: @test83( 1294 ; CHECK-NEXT: [[CONV:%.*]] = sext i16 %a to i32 1295 ; CHECK-NEXT: [[TMP1:%.*]] = trunc i64 %k to i32 1296 ; CHECK-NEXT: [[SH_PROM:%.*]] = add i32 [[TMP1]], -1 1297 ; CHECK-NEXT: [[SHL:%.*]] = shl i32 [[CONV]], [[SH_PROM]] 1298 ; CHECK-NEXT: [[SH_PROM1:%.*]] = zext i32 [[SHL]] to i64 1299 ; CHECK-NEXT: ret i64 [[SH_PROM1]] 1300 ; 1301 %conv = sext i16 %a to i32 1302 %sub = add nsw i64 %k, -1 1303 %sh_prom = trunc i64 %sub to i32 1304 %shl = shl i32 %conv, %sh_prom 1305 %sh_prom1 = zext i32 %shl to i64 1306 ret i64 %sh_prom1 1307 } 1308 1309 define i8 @test84(i32 %a) { 1310 ; CHECK-LABEL: @test84( 1311 ; CHECK-NEXT: [[ADD:%.*]] = add i32 %a, 2130706432 1312 ; CHECK-NEXT: [[SHR:%.*]] = lshr exact i32 [[ADD]], 23 1313 ; CHECK-NEXT: [[TRUNC:%.*]] = trunc i32 [[SHR]] to i8 1314 ; CHECK-NEXT: ret i8 [[TRUNC]] 1315 ; 1316 %add = add nsw i32 %a, -16777216 1317 %shr = lshr exact i32 %add, 23 1318 %trunc = trunc i32 %shr to i8 1319 ret i8 %trunc 1320 } 1321 1322 define i8 @test85(i32 %a) { 1323 ; CHECK-LABEL: @test85( 1324 ; CHECK-NEXT: [[ADD:%.*]] = add i32 %a, 2130706432 1325 ; CHECK-NEXT: [[SHR:%.*]] = lshr exact i32 [[ADD]], 23 1326 ; CHECK-NEXT: [[TRUNC:%.*]] = trunc i32 [[SHR]] to i8 1327 ; CHECK-NEXT: ret i8 [[TRUNC]] 1328 ; 1329 %add = add nuw i32 %a, -16777216 1330 %shr = lshr exact i32 %add, 23 1331 %trunc = trunc i32 %shr to i8 1332 ret i8 %trunc 1333 } 1334 1335 define i16 @test86(i16 %v) { 1336 ; CHECK-LABEL: @test86( 1337 ; CHECK-NEXT: [[S1:%.*]] = ashr i16 %v, 4 1338 ; CHECK-NEXT: ret i16 [[S1]] 1339 ; 1340 %a = sext i16 %v to i32 1341 %s = ashr i32 %a, 4 1342 %t = trunc i32 %s to i16 1343 ret i16 %t 1344 } 1345 1346 define i16 @test87(i16 %v) { 1347 ; CHECK-LABEL: @test87( 1348 ; CHECK-NEXT: [[A1:%.*]] = ashr i16 %v, 12 1349 ; CHECK-NEXT: ret i16 [[A1]] 1350 ; 1351 %c = sext i16 %v to i32 1352 %m = mul nsw i32 %c, 16 1353 %a = ashr i32 %m, 16 1354 %t = trunc i32 %a to i16 1355 ret i16 %t 1356 } 1357 1358 define i16 @test88(i16 %v) { 1359 ; CHECK-LABEL: @test88( 1360 ; CHECK-NEXT: [[TMP1:%.*]] = ashr i16 %v, 15 1361 ; CHECK-NEXT: ret i16 [[TMP1]] 1362 ; 1363 %a = sext i16 %v to i32 1364 %s = ashr i32 %a, 18 1365 %t = trunc i32 %s to i16 1366 ret i16 %t 1367 } 1368 1369 define i32 @PR21388(i32* %v) { 1370 ; CHECK-LABEL: @PR21388( 1371 ; CHECK-NEXT: [[ICMP:%.*]] = icmp slt i32* %v, null 1372 ; CHECK-NEXT: [[SEXT:%.*]] = sext i1 [[ICMP]] to i32 1373 ; CHECK-NEXT: ret i32 [[SEXT]] 1374 ; 1375 %icmp = icmp slt i32* %v, null 1376 %sext = sext i1 %icmp to i32 1377 ret i32 %sext 1378 } 1379 1380 define float @sitofp_zext(i16 %a) { 1381 ; CHECK-LABEL: @sitofp_zext( 1382 ; CHECK-NEXT: [[SITOFP:%.*]] = uitofp i16 %a to float 1383 ; CHECK-NEXT: ret float [[SITOFP]] 1384 ; 1385 %zext = zext i16 %a to i32 1386 %sitofp = sitofp i32 %zext to float 1387 ret float %sitofp 1388 } 1389 1390 define i1 @PR23309(i32 %A, i32 %B) { 1391 ; CHECK-LABEL: @PR23309( 1392 ; CHECK-NEXT: [[SUB:%.*]] = sub i32 %A, %B 1393 ; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[SUB]], 1 1394 ; CHECK-NEXT: [[TRUNC:%.*]] = icmp ne i32 [[TMP1]], 0 1395 ; CHECK-NEXT: ret i1 [[TRUNC]] 1396 ; 1397 %add = add i32 %A, -4 1398 %sub = sub nsw i32 %add, %B 1399 %trunc = trunc i32 %sub to i1 1400 ret i1 %trunc 1401 } 1402 1403 define i1 @PR23309v2(i32 %A, i32 %B) { 1404 ; CHECK-LABEL: @PR23309v2( 1405 ; CHECK-NEXT: [[SUB:%.*]] = add i32 %A, %B 1406 ; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[SUB]], 1 1407 ; CHECK-NEXT: [[TRUNC:%.*]] = icmp ne i32 [[TMP1]], 0 1408 ; CHECK-NEXT: ret i1 [[TRUNC]] 1409 ; 1410 %add = add i32 %A, -4 1411 %sub = add nuw i32 %add, %B 1412 %trunc = trunc i32 %sub to i1 1413 ret i1 %trunc 1414 } 1415 1416 define i16 @PR24763(i8 %V) { 1417 ; CHECK-LABEL: @PR24763( 1418 ; CHECK-NEXT: [[L:%.*]] = ashr i8 %V, 1 1419 ; CHECK-NEXT: [[T:%.*]] = sext i8 [[L]] to i16 1420 ; CHECK-NEXT: ret i16 [[T]] 1421 ; 1422 %conv = sext i8 %V to i32 1423 %l = lshr i32 %conv, 1 1424 %t = trunc i32 %l to i16 1425 ret i16 %t 1426 } 1427 1428 define i64 @PR28745() { 1429 ; CHECK-LABEL: @PR28745( 1430 ; CHECK-NEXT: ret i64 1 1431 1432 %b = zext i32 extractvalue ({ i32 } select (i1 icmp eq (i16 extractelement (<2 x i16> bitcast (<1 x i32> <i32 1> to <2 x i16>), i32 0), i16 0), { i32 } { i32 1 }, { i32 } zeroinitializer), 0) to i64 1433 ret i64 %b 1434 } 1435 1436 define i32 @test89() { 1437 ; CHECK-LABEL: @test89( 1438 ; CHECK-NEXT: ret i32 393216 1439 ret i32 bitcast (<2 x i16> <i16 6, i16 undef> to i32) 1440 } 1441 1442 define <2 x i32> @test90() { 1443 ; CHECK-LABEL: @test90( 1444 ; CHECK: ret <2 x i32> <i32 0, i32 15360> 1445 %tmp6 = bitcast <4 x half> <half undef, half undef, half undef, half 0xH3C00> to <2 x i32> 1446 ret <2 x i32> %tmp6 1447 } 1448 1449 ; Do not optimize to ashr i64 (shift by 48 > 96 - 64) 1450 define i64 @test91(i64 %A) { 1451 ; CHECK-LABEL: @test91( 1452 ; CHECK-NEXT: [[B:%.*]] = sext i64 %A to i96 1453 ; CHECK-NEXT: [[C:%.*]] = lshr i96 [[B]], 48 1454 ; CHECK-NEXT: [[D:%.*]] = trunc i96 [[C]] to i64 1455 ; CHECK-NEXT: ret i64 [[D]] 1456 ; 1457 %B = sext i64 %A to i96 1458 %C = lshr i96 %B, 48 1459 %D = trunc i96 %C to i64 1460 ret i64 %D 1461 } 1462 1463 ; Do optimize to ashr i64 (shift by 32 <= 96 - 64) 1464 define i64 @test92(i64 %A) { 1465 ; CHECK-LABEL: @test92( 1466 ; CHECK-NEXT: [[C:%.*]] = ashr i64 %A, 32 1467 ; CHECK-NEXT: ret i64 [[C]] 1468 ; 1469 %B = sext i64 %A to i96 1470 %C = lshr i96 %B, 32 1471 %D = trunc i96 %C to i64 1472 ret i64 %D 1473 } 1474 1475 ; When optimizing to ashr i32, don't shift by more than 31. 1476 define i32 @test93(i32 %A) { 1477 ; CHECK-LABEL: @test93( 1478 ; CHECK-NEXT: [[C:%.*]] = ashr i32 %A, 31 1479 ; CHECK-NEXT: ret i32 [[C]] 1480 ; 1481 %B = sext i32 %A to i96 1482 %C = lshr i96 %B, 64 1483 %D = trunc i96 %C to i32 1484 ret i32 %D 1485 } 1486 1487 ; The following four tests sext + lshr + trunc patterns. 1488 ; PR33078 1489 1490 define i8 @pr33078_1(i8 %A) { 1491 ; CHECK-LABEL: @pr33078_1( 1492 ; CHECK-NEXT: [[C:%.*]] = ashr i8 [[A:%.*]], 7 1493 ; CHECK-NEXT: ret i8 [[C]] 1494 ; 1495 %B = sext i8 %A to i16 1496 %C = lshr i16 %B, 8 1497 %D = trunc i16 %C to i8 1498 ret i8 %D 1499 } 1500 1501 define i12 @pr33078_2(i8 %A) { 1502 ; CHECK-LABEL: @pr33078_2( 1503 ; CHECK-NEXT: [[C:%.*]] = ashr i8 [[A:%.*]], 4 1504 ; CHECK-NEXT: [[D:%.*]] = sext i8 [[C]] to i12 1505 ; CHECK-NEXT: ret i12 [[D]] 1506 ; 1507 %B = sext i8 %A to i16 1508 %C = lshr i16 %B, 4 1509 %D = trunc i16 %C to i12 1510 ret i12 %D 1511 } 1512 1513 define i4 @pr33078_3(i8 %A) { 1514 ; CHECK-LABEL: @pr33078_3( 1515 ; CHECK-NEXT: [[B:%.*]] = sext i8 [[A:%.*]] to i16 1516 ; CHECK-NEXT: [[C:%.*]] = lshr i16 [[B]], 12 1517 ; CHECK-NEXT: [[D:%.*]] = trunc i16 [[C]] to i4 1518 ; CHECK-NEXT: ret i4 [[D]] 1519 ; 1520 %B = sext i8 %A to i16 1521 %C = lshr i16 %B, 12 1522 %D = trunc i16 %C to i4 1523 ret i4 %D 1524 } 1525 1526 define i8 @pr33078_4(i3 %x) { 1527 ; Don't turn this in an `ashr`. This was getting miscompiled 1528 ; CHECK-LABEL: @pr33078_4( 1529 ; CHECK-NEXT: [[B:%.*]] = sext i3 %x to i16 1530 ; CHECK-NEXT: [[C:%.*]] = lshr i16 [[B]], 13 1531 ; CHECK-NEXT: [[D:%.*]] = trunc i16 [[C]] to i8 1532 ; CHECK-NEXT: ret i8 [[D]] 1533 %B = sext i3 %x to i16 1534 %C = lshr i16 %B, 13 1535 %D = trunc i16 %C to i8 1536 ret i8 %D 1537 } 1538 1539 ; (sext (xor (cmp), -1)) -> (sext (!cmp)) 1540 define i64 @test94(i32 %a) { 1541 ; CHECK-LABEL: @test94( 1542 ; CHECK-NEXT: [[TMP1:%.*]] = icmp ne i32 [[A:%.*]], -2 1543 ; CHECK-NEXT: [[TMP2:%.*]] = sext i1 [[TMP1]] to i64 1544 ; CHECK-NEXT: ret i64 [[TMP2]] 1545 ; 1546 %1 = icmp eq i32 %a, -2 1547 %2 = sext i1 %1 to i8 1548 %3 = xor i8 %2, -1 1549 %4 = sext i8 %3 to i64 1550 ret i64 %4 1551 } 1552 1553 ; We should be able to remove the zext and trunc here. 1554 define i32 @test95(i32 %x) { 1555 ; CHECK-LABEL: @test95( 1556 ; CHECK-NEXT: [[TMP1:%.*]] = lshr i32 [[X:%.*]], 6 1557 ; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[TMP1]], 2 1558 ; CHECK-NEXT: [[TMP3:%.*]] = or i32 [[TMP2]], 40 1559 ; CHECK-NEXT: ret i32 [[TMP3]] 1560 ; 1561 %1 = trunc i32 %x to i8 1562 %2 = lshr i8 %1, 6 1563 %3 = and i8 %2, 2 1564 %4 = or i8 %3, 40 1565 %5 = zext i8 %4 to i32 1566 ret i32 %5 1567 } 1568
