1 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py 2 ; RUN: opt < %s -instsimplify -S | FileCheck %s 3 4 define i32 @negate_nuw(i32 %x) { 5 ; CHECK-LABEL: @negate_nuw( 6 ; CHECK-NEXT: ret i32 0 7 ; 8 %neg = sub nuw i32 0, %x 9 ret i32 %neg 10 } 11 12 define <2 x i32> @negate_nuw_vec(<2 x i32> %x) { 13 ; CHECK-LABEL: @negate_nuw_vec( 14 ; CHECK-NEXT: ret <2 x i32> zeroinitializer 15 ; 16 %neg = sub nuw <2 x i32> zeroinitializer, %x 17 ret <2 x i32> %neg 18 } 19 20 define <2 x i32> @negate_nuw_vec_undef_elt(<2 x i32> %x) { 21 ; CHECK-LABEL: @negate_nuw_vec_undef_elt( 22 ; CHECK-NEXT: ret <2 x i32> zeroinitializer 23 ; 24 %neg = sub nuw <2 x i32> <i32 0, i32 undef>, %x 25 ret <2 x i32> %neg 26 } 27 28 define i8 @negate_zero_or_minsigned_nsw(i8 %x) { 29 ; CHECK-LABEL: @negate_zero_or_minsigned_nsw( 30 ; CHECK-NEXT: ret i8 0 31 ; 32 %signbit = and i8 %x, 128 33 %neg = sub nsw i8 0, %signbit 34 ret i8 %neg 35 } 36 37 define <2 x i8> @negate_zero_or_minsigned_nsw_vec(<2 x i8> %x) { 38 ; CHECK-LABEL: @negate_zero_or_minsigned_nsw_vec( 39 ; CHECK-NEXT: ret <2 x i8> zeroinitializer 40 ; 41 %signbit = shl <2 x i8> %x, <i8 7, i8 7> 42 %neg = sub nsw <2 x i8> zeroinitializer, %signbit 43 ret <2 x i8> %neg 44 } 45 46 define <2 x i8> @negate_zero_or_minsigned_nsw_vec_undef_elt(<2 x i8> %x) { 47 ; CHECK-LABEL: @negate_zero_or_minsigned_nsw_vec_undef_elt( 48 ; CHECK-NEXT: ret <2 x i8> zeroinitializer 49 ; 50 %signbit = shl <2 x i8> %x, <i8 7, i8 7> 51 %neg = sub nsw <2 x i8> <i8 undef, i8 0>, %signbit 52 ret <2 x i8> %neg 53 } 54 55 define i8 @negate_zero_or_minsigned(i8 %x) { 56 ; CHECK-LABEL: @negate_zero_or_minsigned( 57 ; CHECK-NEXT: [[SIGNBIT:%.*]] = shl i8 [[X:%.*]], 7 58 ; CHECK-NEXT: ret i8 [[SIGNBIT]] 59 ; 60 %signbit = shl i8 %x, 7 61 %neg = sub i8 0, %signbit 62 ret i8 %neg 63 } 64 65 define <2 x i8> @negate_zero_or_minsigned_vec(<2 x i8> %x) { 66 ; CHECK-LABEL: @negate_zero_or_minsigned_vec( 67 ; CHECK-NEXT: [[SIGNBIT:%.*]] = and <2 x i8> [[X:%.*]], <i8 -128, i8 -128> 68 ; CHECK-NEXT: ret <2 x i8> [[SIGNBIT]] 69 ; 70 %signbit = and <2 x i8> %x, <i8 128, i8 128> 71 %neg = sub <2 x i8> zeroinitializer, %signbit 72 ret <2 x i8> %neg 73 } 74 75
