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      1 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
      2 ; RUN: opt < %s -basicaa -newgvn -S | FileCheck %s
      3 target datalayout = "E-m:e-i64:64-n32:64"
      4 
      5 @global = external hidden unnamed_addr constant [11 x i8], align 1
      6 ;; Ensure we do not believe the indexing increments are unreachable due to incorrect memory
      7 ;; equivalence detection.  In PR31483, we were deleting those blocks as unreachable
      8 ; Function Attrs: nounwind
      9 define signext i32 @ham(i8* %arg, i8* %arg1) #0 {
     10 ; CHECK-LABEL: @ham(
     11 ; CHECK-NEXT:  bb:
     12 ; CHECK-NEXT:    [[TMP:%.*]] = alloca i8*, align 8
     13 ; CHECK-NEXT:    store i8* %arg1, i8** [[TMP]], align 8
     14 ; CHECK-NEXT:    br label %bb2
     15 ; CHECK:       bb2:
     16 ; CHECK-NEXT:    [[TMP3:%.*]] = phi i8* [ %arg, %bb ], [ %tmp7, %bb22 ]
     17 ; CHECK-NEXT:    [[TMP4:%.*]] = load i8, i8* [[TMP3]], align 1
     18 ; CHECK-NEXT:    [[TMP5:%.*]] = icmp ne i8 [[TMP4]], 0
     19 ; CHECK-NEXT:    br i1 [[TMP5]], label %bb6, label %bb23
     20 ; CHECK:       bb6:
     21 ; CHECK-NEXT:    [[TMP7:%.*]] = getelementptr inbounds i8, i8* [[TMP3]], i32 1
     22 ; CHECK-NEXT:    [[TMP9:%.*]] = zext i8 [[TMP4]] to i32
     23 ; CHECK-NEXT:    switch i32 [[TMP9]], label %bb22 [
     24 ; CHECK-NEXT:    i32 115, label %bb10
     25 ; CHECK-NEXT:    i32 105, label %bb16
     26 ; CHECK-NEXT:    i32 99, label %bb16
     27 ; CHECK-NEXT:    ]
     28 ; CHECK:       bb10:
     29 ; CHECK-NEXT:    [[TMP11:%.*]] = load i8*, i8** [[TMP]], align 8
     30 ; CHECK-NEXT:    [[TMP12:%.*]] = getelementptr inbounds i8, i8* [[TMP11]], i64 8
     31 ; CHECK-NEXT:    store i8* [[TMP12]], i8** [[TMP]], align 8
     32 ; CHECK-NEXT:    [[TMP13:%.*]] = bitcast i8* [[TMP11]] to i8**
     33 ; CHECK-NEXT:    [[TMP14:%.*]] = load i8*, i8** [[TMP13]], align 8
     34 ; CHECK-NEXT:    [[TMP15:%.*]] = call signext i32 (i8*, ...) @zot(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @global, i32 0, i32 0), i8* [[TMP14]])
     35 ; CHECK-NEXT:    br label %bb22
     36 ; CHECK:       bb16:
     37 ; CHECK-NEXT:    [[TMP17:%.*]] = load i8*, i8** [[TMP]], align 8
     38 ; CHECK-NEXT:    [[TMP18:%.*]] = getelementptr inbounds i8, i8* [[TMP17]], i64 8
     39 ; CHECK-NEXT:    store i8* [[TMP18]], i8** [[TMP]], align 8
     40 ; CHECK-NEXT:    [[TMP19:%.*]] = getelementptr inbounds i8, i8* [[TMP17]], i64 4
     41 ; CHECK-NEXT:    [[TMP20:%.*]] = bitcast i8* [[TMP19]] to i32*
     42 ; CHECK-NEXT:    br label %bb22
     43 ; CHECK:       bb22:
     44 ; CHECK-NEXT:    br label %bb2
     45 ; CHECK:       bb23:
     46 ; CHECK-NEXT:    [[TMP24:%.*]] = bitcast i8** [[TMP]] to i8*
     47 ; CHECK-NEXT:    call void @llvm.va_end(i8* [[TMP24]])
     48 ; CHECK-NEXT:    ret i32 undef
     49 ;
     50 bb:
     51   %tmp = alloca i8*, align 8
     52   store i8* %arg1, i8** %tmp, align 8
     53   br label %bb2
     54 
     55 bb2:                                              ; preds = %bb22, %bb
     56   %tmp3 = phi i8* [ %arg, %bb ], [ %tmp7, %bb22 ]
     57   %tmp4 = load i8, i8* %tmp3, align 1
     58   %tmp5 = icmp ne i8 %tmp4, 0
     59   br i1 %tmp5, label %bb6, label %bb23
     60 
     61 bb6:                                              ; preds = %bb2
     62   %tmp7 = getelementptr inbounds i8, i8* %tmp3, i32 1
     63   %tmp8 = load i8, i8* %tmp3, align 1
     64   %tmp9 = zext i8 %tmp8 to i32
     65   switch i32 %tmp9, label %bb22 [
     66   i32 115, label %bb10
     67   i32 105, label %bb16
     68   i32 99, label %bb16
     69   ]
     70 
     71 bb10:                                             ; preds = %bb6
     72   %tmp11 = load i8*, i8** %tmp, align 8
     73   %tmp12 = getelementptr inbounds i8, i8* %tmp11, i64 8
     74   store i8* %tmp12, i8** %tmp, align 8
     75   %tmp13 = bitcast i8* %tmp11 to i8**
     76   %tmp14 = load i8*, i8** %tmp13, align 8
     77   %tmp15 = call signext i32 (i8*, ...) @zot(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @global, i32 0, i32 0), i8* %tmp14)
     78   br label %bb22
     79 
     80 bb16:                                             ; preds = %bb6, %bb6
     81   %tmp17 = load i8*, i8** %tmp, align 8
     82   %tmp18 = getelementptr inbounds i8, i8* %tmp17, i64 8
     83   store i8* %tmp18, i8** %tmp, align 8
     84   %tmp19 = getelementptr inbounds i8, i8* %tmp17, i64 4
     85   %tmp20 = bitcast i8* %tmp19 to i32*
     86   %tmp21 = load i32, i32* %tmp20, align 4
     87   br label %bb22
     88 
     89 bb22:                                             ; preds = %bb16, %bb10, %bb6
     90   br label %bb2
     91 
     92 bb23:                                             ; preds = %bb2
     93   %tmp24 = bitcast i8** %tmp to i8*
     94   call void @llvm.va_end(i8* %tmp24)
     95   ret i32 undef
     96 }
     97 
     98 declare signext i32 @zot(i8*, ...) #1
     99 
    100 ; Function Attrs: nounwind
    101 declare void @llvm.va_end(i8*) #2
    102 
    103 attributes #0 = { nounwind "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="ppc64" "target-features"="+altivec,-bpermd,-crypto,-direct-move,-extdiv,-power8-vector,-qpx,-vsx" "unsafe-fp-math"="false" "use-soft-float"="false" }
    104 attributes #1 = { "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="ppc64" "target-features"="+altivec,-bpermd,-crypto,-direct-move,-extdiv,-power8-vector,-qpx,-vsx" "unsafe-fp-math"="false" "use-soft-float"="false" }
    105 attributes #2 = { nounwind }
    106 
    107