1 ; RUN: opt -passes='loop(unswitch),verify<loops>' -enable-nontrivial-unswitch -S < %s | FileCheck %s 2 ; RUN: opt -simple-loop-unswitch -enable-nontrivial-unswitch -S < %s | FileCheck %s 3 4 declare i32 @a() 5 declare i32 @b() 6 declare i32 @c() 7 declare i32 @d() 8 9 declare void @sink1(i32) 10 declare void @sink2(i32) 11 12 declare i1 @cond() 13 declare i32 @cond.i32() 14 15 ; Negative test: we cannot unswitch convergent calls. 16 define void @test_no_unswitch_convergent(i1* %ptr, i1 %cond) { 17 ; CHECK-LABEL: @test_no_unswitch_convergent( 18 entry: 19 br label %loop_begin 20 ; CHECK-NEXT: entry: 21 ; CHECK-NEXT: br label %loop_begin 22 ; 23 ; We shouldn't have unswitched into any other block either. 24 ; CHECK-NOT: br i1 %cond 25 26 loop_begin: 27 br i1 %cond, label %loop_a, label %loop_b 28 ; CHECK: loop_begin: 29 ; CHECK-NEXT: br i1 %cond, label %loop_a, label %loop_b 30 31 loop_a: 32 call i32 @a() convergent 33 br label %loop_latch 34 35 loop_b: 36 call i32 @b() 37 br label %loop_latch 38 39 loop_latch: 40 %v = load i1, i1* %ptr 41 br i1 %v, label %loop_begin, label %loop_exit 42 43 loop_exit: 44 ret void 45 } 46 47 ; Negative test: we cannot unswitch noduplicate calls. 48 define void @test_no_unswitch_noduplicate(i1* %ptr, i1 %cond) { 49 ; CHECK-LABEL: @test_no_unswitch_noduplicate( 50 entry: 51 br label %loop_begin 52 ; CHECK-NEXT: entry: 53 ; CHECK-NEXT: br label %loop_begin 54 ; 55 ; We shouldn't have unswitched into any other block either. 56 ; CHECK-NOT: br i1 %cond 57 58 loop_begin: 59 br i1 %cond, label %loop_a, label %loop_b 60 ; CHECK: loop_begin: 61 ; CHECK-NEXT: br i1 %cond, label %loop_a, label %loop_b 62 63 loop_a: 64 call i32 @a() noduplicate 65 br label %loop_latch 66 67 loop_b: 68 call i32 @b() 69 br label %loop_latch 70 71 loop_latch: 72 %v = load i1, i1* %ptr 73 br i1 %v, label %loop_begin, label %loop_exit 74 75 loop_exit: 76 ret void 77 } 78 79 declare i32 @__CxxFrameHandler3(...) 80 81 ; Negative test: we cannot unswitch when tokens are used across blocks as we 82 ; might introduce PHIs. 83 define void @test_no_unswitch_cross_block_token(i1* %ptr, i1 %cond) nounwind personality i32 (...)* @__CxxFrameHandler3 { 84 ; CHECK-LABEL: @test_no_unswitch_cross_block_token( 85 entry: 86 br label %loop_begin 87 ; CHECK-NEXT: entry: 88 ; CHECK-NEXT: br label %loop_begin 89 ; 90 ; We shouldn't have unswitched into any other block either. 91 ; CHECK-NOT: br i1 %cond 92 93 loop_begin: 94 br i1 %cond, label %loop_a, label %loop_b 95 ; CHECK: loop_begin: 96 ; CHECK-NEXT: br i1 %cond, label %loop_a, label %loop_b 97 98 loop_a: 99 call i32 @a() 100 br label %loop_cont 101 102 loop_b: 103 call i32 @b() 104 br label %loop_cont 105 106 loop_cont: 107 invoke i32 @a() 108 to label %loop_latch unwind label %loop_catch 109 110 loop_latch: 111 br label %loop_begin 112 113 loop_catch: 114 %catch = catchswitch within none [label %loop_catch_latch, label %loop_exit] unwind to caller 115 116 loop_catch_latch: 117 %catchpad_latch = catchpad within %catch [] 118 catchret from %catchpad_latch to label %loop_begin 119 120 loop_exit: 121 %catchpad_exit = catchpad within %catch [] 122 catchret from %catchpad_exit to label %exit 123 124 exit: 125 ret void 126 } 127 128 129 ; Non-trivial loop unswitching where there are two distinct trivial conditions 130 ; to unswitch within the loop. 131 define i32 @test1(i1* %ptr, i1 %cond1, i1 %cond2) { 132 ; CHECK-LABEL: @test1( 133 entry: 134 br label %loop_begin 135 ; CHECK-NEXT: entry: 136 ; CHECK-NEXT: br i1 %cond1, label %entry.split.us, label %entry.split 137 138 loop_begin: 139 br i1 %cond1, label %loop_a, label %loop_b 140 141 loop_a: 142 call i32 @a() 143 br label %latch 144 ; The 'loop_a' unswitched loop. 145 ; 146 ; CHECK: entry.split.us: 147 ; CHECK-NEXT: br label %loop_begin.us 148 ; 149 ; CHECK: loop_begin.us: 150 ; CHECK-NEXT: br label %loop_a.us 151 ; 152 ; CHECK: loop_a.us: 153 ; CHECK-NEXT: call i32 @a() 154 ; CHECK-NEXT: br label %latch.us 155 ; 156 ; CHECK: latch.us: 157 ; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr 158 ; CHECK-NEXT: br i1 %[[V]], label %loop_begin.us, label %loop_exit.split.us 159 ; 160 ; CHECK: loop_exit.split.us: 161 ; CHECK-NEXT: br label %loop_exit 162 163 loop_b: 164 br i1 %cond2, label %loop_b_a, label %loop_b_b 165 ; The second unswitched condition. 166 ; 167 ; CHECK: entry.split: 168 ; CHECK-NEXT: br i1 %cond2, label %entry.split.split.us, label %entry.split.split 169 170 loop_b_a: 171 call i32 @b() 172 br label %latch 173 ; The 'loop_b_a' unswitched loop. 174 ; 175 ; CHECK: entry.split.split.us: 176 ; CHECK-NEXT: br label %loop_begin.us1 177 ; 178 ; CHECK: loop_begin.us1: 179 ; CHECK-NEXT: br label %loop_b.us 180 ; 181 ; CHECK: loop_b.us: 182 ; CHECK-NEXT: br label %loop_b_a.us 183 ; 184 ; CHECK: loop_b_a.us: 185 ; CHECK-NEXT: call i32 @b() 186 ; CHECK-NEXT: br label %latch.us2 187 ; 188 ; CHECK: latch.us2: 189 ; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr 190 ; CHECK-NEXT: br i1 %[[V]], label %loop_begin.us1, label %loop_exit.split.split.us 191 ; 192 ; CHECK: loop_exit.split.split.us: 193 ; CHECK-NEXT: br label %loop_exit.split 194 195 loop_b_b: 196 call i32 @c() 197 br label %latch 198 ; The 'loop_b_b' unswitched loop. 199 ; 200 ; CHECK: entry.split.split: 201 ; CHECK-NEXT: br label %loop_begin 202 ; 203 ; CHECK: loop_begin: 204 ; CHECK-NEXT: br label %loop_b 205 ; 206 ; CHECK: loop_b: 207 ; CHECK-NEXT: br label %loop_b_b 208 ; 209 ; CHECK: loop_b_b: 210 ; CHECK-NEXT: call i32 @c() 211 ; CHECK-NEXT: br label %latch 212 ; 213 ; CHECK: latch: 214 ; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr 215 ; CHECK-NEXT: br i1 %[[V]], label %loop_begin, label %loop_exit.split.split 216 ; 217 ; CHECK: loop_exit.split.split: 218 ; CHECK-NEXT: br label %loop_exit.split 219 220 latch: 221 %v = load i1, i1* %ptr 222 br i1 %v, label %loop_begin, label %loop_exit 223 224 loop_exit: 225 ret i32 0 226 ; CHECK: loop_exit.split: 227 ; CHECK-NEXT: br label %loop_exit 228 ; 229 ; CHECK: loop_exit: 230 ; CHECK-NEXT: ret 231 } 232 233 define i32 @test2(i1* %ptr, i1 %cond1, i32* %a.ptr, i32* %b.ptr, i32* %c.ptr) { 234 ; CHECK-LABEL: @test2( 235 entry: 236 br label %loop_begin 237 ; CHECK-NEXT: entry: 238 ; CHECK-NEXT: br i1 %cond1, label %entry.split.us, label %entry.split 239 240 loop_begin: 241 %v = load i1, i1* %ptr 242 br i1 %cond1, label %loop_a, label %loop_b 243 244 loop_a: 245 %a = load i32, i32* %a.ptr 246 %ac = load i32, i32* %c.ptr 247 br i1 %v, label %loop_begin, label %loop_exit 248 ; The 'loop_a' unswitched loop. 249 ; 250 ; CHECK: entry.split.us: 251 ; CHECK-NEXT: br label %loop_begin.us 252 ; 253 ; CHECK: loop_begin.us: 254 ; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr 255 ; CHECK-NEXT: br label %loop_a.us 256 ; 257 ; CHECK: loop_a.us: 258 ; CHECK-NEXT: %[[A:.*]] = load i32, i32* %a.ptr 259 ; CHECK-NEXT: %[[AC:.*]] = load i32, i32* %c.ptr 260 ; CHECK-NEXT: br i1 %[[V]], label %loop_begin.backedge.us, label %loop_exit.split.us 261 ; 262 ; CHECK: loop_exit.split.us: 263 ; CHECK-NEXT: %[[A_LCSSA:.*]] = phi i32 [ %[[A]], %loop_a.us ] 264 ; CHECK-NEXT: %[[AC_LCSSA:.*]] = phi i32 [ %[[AC]], %loop_a.us ] 265 ; CHECK-NEXT: br label %loop_exit 266 267 loop_b: 268 %b = load i32, i32* %b.ptr 269 %bc = load i32, i32* %c.ptr 270 br i1 %v, label %loop_begin, label %loop_exit 271 ; The 'loop_b' unswitched loop. 272 ; 273 ; CHECK: entry.split: 274 ; CHECK-NEXT: br label %loop_begin 275 ; 276 ; CHECK: loop_begin: 277 ; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr 278 ; CHECK-NEXT: br label %loop_b 279 ; 280 ; CHECK: loop_b: 281 ; CHECK-NEXT: %[[B:.*]] = load i32, i32* %b.ptr 282 ; CHECK-NEXT: %[[BC:.*]] = load i32, i32* %c.ptr 283 ; CHECK-NEXT: br i1 %[[V]], label %loop_begin.backedge, label %loop_exit.split 284 ; 285 ; CHECK: loop_exit.split: 286 ; CHECK-NEXT: %[[B_LCSSA:.*]] = phi i32 [ %[[B]], %loop_b ] 287 ; CHECK-NEXT: %[[BC_LCSSA:.*]] = phi i32 [ %[[BC]], %loop_b ] 288 ; CHECK-NEXT: br label %loop_exit 289 290 loop_exit: 291 %ab.phi = phi i32 [ %a, %loop_a ], [ %b, %loop_b ] 292 %c.phi = phi i32 [ %ac, %loop_a ], [ %bc, %loop_b ] 293 %result = add i32 %ab.phi, %c.phi 294 ret i32 %result 295 ; CHECK: loop_exit: 296 ; CHECK-NEXT: %[[AB_PHI:.*]] = phi i32 [ %[[B_LCSSA]], %loop_exit.split ], [ %[[A_LCSSA]], %loop_exit.split.us ] 297 ; CHECK-NEXT: %[[C_PHI:.*]] = phi i32 [ %[[BC_LCSSA]], %loop_exit.split ], [ %[[AC_LCSSA]], %loop_exit.split.us ] 298 ; CHECK-NEXT: %[[RESULT:.*]] = add i32 %[[AB_PHI]], %[[C_PHI]] 299 ; CHECK-NEXT: ret i32 %[[RESULT]] 300 } 301 302 ; Test a non-trivial unswitch of an exiting edge to an exit block with other 303 ; in-loop predecessors. 304 define i32 @test3a(i1* %ptr, i1 %cond1, i32* %a.ptr, i32* %b.ptr) { 305 ; CHECK-LABEL: @test3a( 306 entry: 307 br label %loop_begin 308 ; CHECK-NEXT: entry: 309 ; CHECK-NEXT: br i1 %cond1, label %entry.split.us, label %entry.split 310 311 loop_begin: 312 %v = load i1, i1* %ptr 313 %a = load i32, i32* %a.ptr 314 br i1 %cond1, label %loop_exit, label %loop_b 315 ; The 'loop_exit' clone. 316 ; 317 ; CHECK: entry.split.us: 318 ; CHECK-NEXT: br label %loop_begin.us 319 ; 320 ; CHECK: loop_begin.us: 321 ; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr 322 ; CHECK-NEXT: %[[A:.*]] = load i32, i32* %a.ptr 323 ; CHECK-NEXT: br label %loop_exit.split.us 324 ; 325 ; CHECK: loop_exit.split.us: 326 ; CHECK-NEXT: %[[A_LCSSA:.*]] = phi i32 [ %[[A]], %loop_begin.us ] 327 ; CHECK-NEXT: br label %loop_exit 328 329 loop_b: 330 %b = load i32, i32* %b.ptr 331 br i1 %v, label %loop_begin, label %loop_exit 332 ; The 'loop_b' unswitched loop. 333 ; 334 ; CHECK: entry.split: 335 ; CHECK-NEXT: br label %loop_begin 336 ; 337 ; CHECK: loop_begin: 338 ; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr 339 ; CHECK-NEXT: %[[A:.*]] = load i32, i32* %a.ptr 340 ; CHECK-NEXT: br label %loop_b 341 ; 342 ; CHECK: loop_b: 343 ; CHECK-NEXT: %[[B:.*]] = load i32, i32* %b.ptr 344 ; CHECK-NEXT: br i1 %[[V]], label %loop_begin, label %loop_exit.split 345 ; 346 ; CHECK: loop_exit.split: 347 ; CHECK-NEXT: %[[B_LCSSA:.*]] = phi i32 [ %[[B]], %loop_b ] 348 ; CHECK-NEXT: br label %loop_exit 349 350 loop_exit: 351 %ab.phi = phi i32 [ %a, %loop_begin ], [ %b, %loop_b ] 352 ret i32 %ab.phi 353 ; CHECK: loop_exit: 354 ; CHECK-NEXT: %[[AB_PHI:.*]] = phi i32 [ %[[B_LCSSA]], %loop_exit.split ], [ %[[A_LCSSA]], %loop_exit.split.us ] 355 ; CHECK-NEXT: ret i32 %[[AB_PHI]] 356 } 357 358 ; Test a non-trivial unswitch of an exiting edge to an exit block with other 359 ; in-loop predecessors. This is the same as @test3a but with the reversed order 360 ; of successors so that the exiting edge is *not* the cloned edge. 361 define i32 @test3b(i1* %ptr, i1 %cond1, i32* %a.ptr, i32* %b.ptr) { 362 ; CHECK-LABEL: @test3b( 363 entry: 364 br label %loop_begin 365 ; CHECK-NEXT: entry: 366 ; CHECK-NEXT: br i1 %cond1, label %entry.split.us, label %entry.split 367 368 loop_begin: 369 %v = load i1, i1* %ptr 370 %a = load i32, i32* %a.ptr 371 br i1 %cond1, label %loop_b, label %loop_exit 372 ; The 'loop_b' unswitched loop. 373 ; 374 ; CHECK: entry.split.us: 375 ; CHECK-NEXT: br label %loop_begin.us 376 ; 377 ; CHECK: loop_begin.us: 378 ; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr 379 ; CHECK-NEXT: %[[A:.*]] = load i32, i32* %a.ptr 380 ; CHECK-NEXT: br label %loop_b.us 381 ; 382 ; CHECK: loop_b.us: 383 ; CHECK-NEXT: %[[B:.*]] = load i32, i32* %b.ptr 384 ; CHECK-NEXT: br i1 %[[V]], label %loop_begin.us, label %loop_exit.split.us 385 ; 386 ; CHECK: loop_exit.split.us: 387 ; CHECK-NEXT: %[[B_LCSSA:.*]] = phi i32 [ %[[B]], %loop_b.us ] 388 ; CHECK-NEXT: br label %loop_exit 389 390 loop_b: 391 %b = load i32, i32* %b.ptr 392 br i1 %v, label %loop_begin, label %loop_exit 393 ; The original loop, now non-looping due to unswitching.. 394 ; 395 ; CHECK: entry.split: 396 ; CHECK-NEXT: br label %loop_begin 397 ; 398 ; CHECK: loop_begin: 399 ; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr 400 ; CHECK-NEXT: %[[A:.*]] = load i32, i32* %a.ptr 401 ; CHECK-NEXT: br label %loop_exit.split 402 ; 403 ; CHECK: loop_exit.split: 404 ; CHECK-NEXT: br label %loop_exit 405 406 loop_exit: 407 %ab.phi = phi i32 [ %b, %loop_b ], [ %a, %loop_begin ] 408 ret i32 %ab.phi 409 ; CHECK: loop_exit: 410 ; CHECK-NEXT: %[[AB_PHI:.*]] = phi i32 [ %[[A]], %loop_exit.split ], [ %[[B_LCSSA]], %loop_exit.split.us ] 411 ; CHECK-NEXT: ret i32 %[[AB_PHI]] 412 } 413 414 ; Test a non-trivial unswitch of an exiting edge to an exit block with no other 415 ; in-loop predecessors. 416 define void @test4a(i1* %ptr, i1 %cond1, i32* %a.ptr, i32* %b.ptr) { 417 ; CHECK-LABEL: @test4a( 418 entry: 419 br label %loop_begin 420 ; CHECK-NEXT: entry: 421 ; CHECK-NEXT: br i1 %cond1, label %entry.split.us, label %entry.split 422 423 loop_begin: 424 %v = load i1, i1* %ptr 425 %a = load i32, i32* %a.ptr 426 br i1 %cond1, label %loop_exit1, label %loop_b 427 ; The 'loop_exit' clone. 428 ; 429 ; CHECK: entry.split.us: 430 ; CHECK-NEXT: br label %loop_begin.us 431 ; 432 ; CHECK: loop_begin.us: 433 ; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr 434 ; CHECK-NEXT: %[[A:.*]] = load i32, i32* %a.ptr 435 ; CHECK-NEXT: br label %loop_exit1.split.us 436 ; 437 ; CHECK: loop_exit1.split.us: 438 ; CHECK-NEXT: %[[A_LCSSA:.*]] = phi i32 [ %[[A]], %loop_begin.us ] 439 ; CHECK-NEXT: br label %loop_exit1 440 441 loop_b: 442 %b = load i32, i32* %b.ptr 443 br i1 %v, label %loop_begin, label %loop_exit2 444 ; The 'loop_b' unswitched loop. 445 ; 446 ; CHECK: entry.split: 447 ; CHECK-NEXT: br label %loop_begin 448 ; 449 ; CHECK: loop_begin: 450 ; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr 451 ; CHECK-NEXT: %[[A:.*]] = load i32, i32* %a.ptr 452 ; CHECK-NEXT: br label %loop_b 453 ; 454 ; CHECK: loop_b: 455 ; CHECK-NEXT: %[[B:.*]] = load i32, i32* %b.ptr 456 ; CHECK-NEXT: br i1 %[[V]], label %loop_begin, label %loop_exit2 457 458 loop_exit1: 459 %a.phi = phi i32 [ %a, %loop_begin ] 460 call void @sink1(i32 %a.phi) 461 ret void 462 ; CHECK: loop_exit1: 463 ; CHECK-NEXT: call void @sink1(i32 %[[A_LCSSA]]) 464 ; CHECK-NEXT: ret void 465 466 loop_exit2: 467 %b.phi = phi i32 [ %b, %loop_b ] 468 call void @sink2(i32 %b.phi) 469 ret void 470 ; CHECK: loop_exit2: 471 ; CHECK-NEXT: %[[B_LCSSA:.*]] = phi i32 [ %[[B]], %loop_b ] 472 ; CHECK-NEXT: call void @sink2(i32 %[[B_LCSSA]]) 473 ; CHECK-NEXT: ret void 474 } 475 476 ; Test a non-trivial unswitch of an exiting edge to an exit block with no other 477 ; in-loop predecessors. This is the same as @test4a but with the edges reversed 478 ; so that the exiting edge is *not* the cloned edge. 479 define void @test4b(i1* %ptr, i1 %cond1, i32* %a.ptr, i32* %b.ptr) { 480 ; CHECK-LABEL: @test4b( 481 entry: 482 br label %loop_begin 483 ; CHECK-NEXT: entry: 484 ; CHECK-NEXT: br i1 %cond1, label %entry.split.us, label %entry.split 485 486 loop_begin: 487 %v = load i1, i1* %ptr 488 %a = load i32, i32* %a.ptr 489 br i1 %cond1, label %loop_b, label %loop_exit1 490 ; The 'loop_b' clone. 491 ; 492 ; CHECK: entry.split.us: 493 ; CHECK-NEXT: br label %loop_begin.us 494 ; 495 ; CHECK: loop_begin.us: 496 ; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr 497 ; CHECK-NEXT: %[[A:.*]] = load i32, i32* %a.ptr 498 ; CHECK-NEXT: br label %loop_b.us 499 ; 500 ; CHECK: loop_b.us: 501 ; CHECK-NEXT: %[[B:.*]] = load i32, i32* %b.ptr 502 ; CHECK-NEXT: br i1 %[[V]], label %loop_begin.us, label %loop_exit2.split.us 503 ; 504 ; CHECK: loop_exit2.split.us: 505 ; CHECK-NEXT: %[[B_LCSSA:.*]] = phi i32 [ %[[B]], %loop_b.us ] 506 ; CHECK-NEXT: br label %loop_exit2 507 508 loop_b: 509 %b = load i32, i32* %b.ptr 510 br i1 %v, label %loop_begin, label %loop_exit2 511 ; The 'loop_exit' unswitched path. 512 ; 513 ; CHECK: entry.split: 514 ; CHECK-NEXT: br label %loop_begin 515 ; 516 ; CHECK: loop_begin: 517 ; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr 518 ; CHECK-NEXT: %[[A:.*]] = load i32, i32* %a.ptr 519 ; CHECK-NEXT: br label %loop_exit1 520 521 loop_exit1: 522 %a.phi = phi i32 [ %a, %loop_begin ] 523 call void @sink1(i32 %a.phi) 524 ret void 525 ; CHECK: loop_exit1: 526 ; CHECK-NEXT: %[[A_PHI:.*]] = phi i32 [ %[[A]], %loop_begin ] 527 ; CHECK-NEXT: call void @sink1(i32 %[[A_PHI]]) 528 ; CHECK-NEXT: ret void 529 530 loop_exit2: 531 %b.phi = phi i32 [ %b, %loop_b ] 532 call void @sink2(i32 %b.phi) 533 ret void 534 ; CHECK: loop_exit2: 535 ; CHECK-NEXT: call void @sink2(i32 %[[B_LCSSA]]) 536 ; CHECK-NEXT: ret void 537 } 538 539 ; Test a non-trivial unswitch of an exiting edge to an exit block with no other 540 ; in-loop predecessors. This is the same as @test4a but with a common merge 541 ; block after the independent loop exits. This requires a different structural 542 ; update to the dominator tree. 543 define void @test4c(i1* %ptr, i1 %cond1, i32* %a.ptr, i32* %b.ptr) { 544 ; CHECK-LABEL: @test4c( 545 entry: 546 br label %loop_begin 547 ; CHECK-NEXT: entry: 548 ; CHECK-NEXT: br i1 %cond1, label %entry.split.us, label %entry.split 549 550 loop_begin: 551 %v = load i1, i1* %ptr 552 %a = load i32, i32* %a.ptr 553 br i1 %cond1, label %loop_exit1, label %loop_b 554 ; The 'loop_exit' clone. 555 ; 556 ; CHECK: entry.split.us: 557 ; CHECK-NEXT: br label %loop_begin.us 558 ; 559 ; CHECK: loop_begin.us: 560 ; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr 561 ; CHECK-NEXT: %[[A:.*]] = load i32, i32* %a.ptr 562 ; CHECK-NEXT: br label %loop_exit1.split.us 563 ; 564 ; CHECK: loop_exit1.split.us: 565 ; CHECK-NEXT: %[[A_LCSSA:.*]] = phi i32 [ %[[A]], %loop_begin.us ] 566 ; CHECK-NEXT: br label %loop_exit1 567 568 loop_b: 569 %b = load i32, i32* %b.ptr 570 br i1 %v, label %loop_begin, label %loop_exit2 571 ; The 'loop_b' unswitched loop. 572 ; 573 ; CHECK: entry.split: 574 ; CHECK-NEXT: br label %loop_begin 575 ; 576 ; CHECK: loop_begin: 577 ; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr 578 ; CHECK-NEXT: %[[A:.*]] = load i32, i32* %a.ptr 579 ; CHECK-NEXT: br label %loop_b 580 ; 581 ; CHECK: loop_b: 582 ; CHECK-NEXT: %[[B:.*]] = load i32, i32* %b.ptr 583 ; CHECK-NEXT: br i1 %[[V]], label %loop_begin, label %loop_exit2 584 585 loop_exit1: 586 %a.phi = phi i32 [ %a, %loop_begin ] 587 call void @sink1(i32 %a.phi) 588 br label %exit 589 ; CHECK: loop_exit1: 590 ; CHECK-NEXT: call void @sink1(i32 %[[A_LCSSA]]) 591 ; CHECK-NEXT: br label %exit 592 593 loop_exit2: 594 %b.phi = phi i32 [ %b, %loop_b ] 595 call void @sink2(i32 %b.phi) 596 br label %exit 597 ; CHECK: loop_exit2: 598 ; CHECK-NEXT: %[[B_LCSSA:.*]] = phi i32 [ %[[B]], %loop_b ] 599 ; CHECK-NEXT: call void @sink2(i32 %[[B_LCSSA]]) 600 ; CHECK-NEXT: br label %exit 601 602 exit: 603 ret void 604 ; CHECK: exit: 605 ; CHECK-NEXT: ret void 606 } 607 608 ; Test that we can unswitch a condition out of multiple layers of a loop nest. 609 define i32 @test5(i1* %ptr, i1 %cond1, i32* %a.ptr, i32* %b.ptr) { 610 ; CHECK-LABEL: @test5( 611 entry: 612 br label %loop_begin 613 ; CHECK-NEXT: entry: 614 ; CHECK-NEXT: br i1 %cond1, label %loop_begin.split.us, label %entry.split 615 ; 616 ; CHECK: entry.split: 617 ; CHECK-NEXT: br label %loop_begin 618 ; 619 ; CHECK: loop_begin: 620 ; CHECK-NEXT: br label %loop_begin.split 621 622 loop_begin: 623 br label %inner_loop_begin 624 625 inner_loop_begin: 626 %v = load i1, i1* %ptr 627 %a = load i32, i32* %a.ptr 628 br i1 %cond1, label %loop_exit, label %inner_loop_b 629 ; The 'loop_exit' clone. 630 ; 631 ; CHECK: loop_begin.split.us: 632 ; CHECK-NEXT: br label %inner_loop_begin.us 633 ; 634 ; CHECK: inner_loop_begin.us: 635 ; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr 636 ; CHECK-NEXT: %[[A:.*]] = load i32, i32* %a.ptr 637 ; CHECK-NEXT: br label %loop_exit.loopexit.split.us 638 ; 639 ; CHECK: loop_exit.loopexit.split.us: 640 ; CHECK-NEXT: %[[A_LCSSA:.*]] = phi i32 [ %[[A]], %inner_loop_begin.us ] 641 ; CHECK-NEXT: br label %loop_exit 642 643 inner_loop_b: 644 %b = load i32, i32* %b.ptr 645 br i1 %v, label %inner_loop_begin, label %loop_latch 646 ; The 'inner_loop_b' unswitched loop. 647 ; 648 ; CHECK: loop_begin.split: 649 ; CHECK-NEXT: br label %inner_loop_begin 650 ; 651 ; CHECK: inner_loop_begin: 652 ; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr 653 ; CHECK-NEXT: %[[A:.*]] = load i32, i32* %a.ptr 654 ; CHECK-NEXT: br label %inner_loop_b 655 ; 656 ; CHECK: inner_loop_b: 657 ; CHECK-NEXT: %[[B:.*]] = load i32, i32* %b.ptr 658 ; CHECK-NEXT: br i1 %[[V]], label %inner_loop_begin, label %loop_latch 659 660 loop_latch: 661 %b.phi = phi i32 [ %b, %inner_loop_b ] 662 %v2 = load i1, i1* %ptr 663 br i1 %v2, label %loop_begin, label %loop_exit 664 ; CHECK: loop_latch: 665 ; CHECK-NEXT: %[[B_INNER_LCSSA:.*]] = phi i32 [ %[[B]], %inner_loop_b ] 666 ; CHECK-NEXT: %[[V2:.*]] = load i1, i1* %ptr 667 ; CHECK-NEXT: br i1 %[[V2]], label %loop_begin, label %loop_exit.loopexit1 668 669 loop_exit: 670 %ab.phi = phi i32 [ %a, %inner_loop_begin ], [ %b.phi, %loop_latch ] 671 ret i32 %ab.phi 672 ; CHECK: loop_exit.loopexit: 673 ; CHECK-NEXT: br label %loop_exit 674 ; 675 ; CHECK: loop_exit.loopexit1: 676 ; CHECK-NEXT: %[[B_LCSSA:.*]] = phi i32 [ %[[B_INNER_LCSSA]], %loop_latch ] 677 ; CHECK-NEXT: br label %loop_exit 678 ; 679 ; CHECK: loop_exit: 680 ; CHECK-NEXT: %[[AB_PHI:.*]] = phi i32 [ %[[A_LCSSA]], %loop_exit.loopexit ], [ %[[B_LCSSA]], %loop_exit.loopexit1 ] 681 ; CHECK-NEXT: ret i32 %[[AB_PHI]] 682 } 683 684 ; Test that we can unswitch a condition where we end up only cloning some of 685 ; the nested loops and needing to delete some of the nested loops. 686 define i32 @test6(i1* %ptr, i1 %cond1, i32* %a.ptr, i32* %b.ptr) { 687 ; CHECK-LABEL: @test6( 688 entry: 689 br label %loop_begin 690 ; CHECK-NEXT: entry: 691 ; CHECK-NEXT: br i1 %cond1, label %entry.split.us, label %entry.split 692 693 loop_begin: 694 %v = load i1, i1* %ptr 695 br i1 %cond1, label %loop_a, label %loop_b 696 697 loop_a: 698 br label %loop_a_inner 699 700 loop_a_inner: 701 %va = load i1, i1* %ptr 702 %a = load i32, i32* %a.ptr 703 br i1 %va, label %loop_a_inner, label %loop_a_inner_exit 704 705 loop_a_inner_exit: 706 %a.lcssa = phi i32 [ %a, %loop_a_inner ] 707 br label %latch 708 ; The 'loop_a' cloned loop. 709 ; 710 ; CHECK: entry.split.us: 711 ; CHECK-NEXT: br label %loop_begin.us 712 ; 713 ; CHECK: loop_begin.us: 714 ; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr 715 ; CHECK-NEXT: br label %loop_a.us 716 ; 717 ; CHECK: loop_a.us: 718 ; CHECK-NEXT: br label %loop_a_inner.us 719 ; 720 ; CHECK: loop_a_inner.us 721 ; CHECK-NEXT: %[[VA:.*]] = load i1, i1* %ptr 722 ; CHECK-NEXT: %[[A:.*]] = load i32, i32* %a.ptr 723 ; CHECK-NEXT: br i1 %[[VA]], label %loop_a_inner.us, label %loop_a_inner_exit.us 724 ; 725 ; CHECK: loop_a_inner_exit.us: 726 ; CHECK-NEXT: %[[A_INNER_LCSSA:.*]] = phi i32 [ %[[A]], %loop_a_inner.us ] 727 ; CHECK-NEXT: br label %latch.us 728 ; 729 ; CHECK: latch.us: 730 ; CHECK-NEXT: %[[A_PHI:.*]] = phi i32 [ %[[A_INNER_LCSSA]], %loop_a_inner_exit.us ] 731 ; CHECK-NEXT: br i1 %[[V]], label %loop_begin.us, label %loop_exit.split.us 732 ; 733 ; CHECK: loop_exit.split.us: 734 ; CHECK-NEXT: %[[A_LCSSA:.*]] = phi i32 [ %[[A_PHI]], %latch.us ] 735 ; CHECK-NEXT: br label %loop_exit 736 737 loop_b: 738 br label %loop_b_inner 739 740 loop_b_inner: 741 %vb = load i1, i1* %ptr 742 %b = load i32, i32* %b.ptr 743 br i1 %vb, label %loop_b_inner, label %loop_b_inner_exit 744 745 loop_b_inner_exit: 746 %b.lcssa = phi i32 [ %b, %loop_b_inner ] 747 br label %latch 748 749 latch: 750 %ab.phi = phi i32 [ %a.lcssa, %loop_a_inner_exit ], [ %b.lcssa, %loop_b_inner_exit ] 751 br i1 %v, label %loop_begin, label %loop_exit 752 ; The 'loop_b' unswitched loop. 753 ; 754 ; CHECK: entry.split: 755 ; CHECK-NEXT: br label %loop_begin 756 ; 757 ; CHECK: loop_begin: 758 ; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr 759 ; CHECK-NEXT: br label %loop_b 760 ; 761 ; CHECK: loop_b: 762 ; CHECK-NEXT: br label %loop_b_inner 763 ; 764 ; CHECK: loop_b_inner 765 ; CHECK-NEXT: %[[VB:.*]] = load i1, i1* %ptr 766 ; CHECK-NEXT: %[[B:.*]] = load i32, i32* %b.ptr 767 ; CHECK-NEXT: br i1 %[[VB]], label %loop_b_inner, label %loop_b_inner_exit 768 ; 769 ; CHECK: loop_b_inner_exit: 770 ; CHECK-NEXT: %[[B_INNER_LCSSA:.*]] = phi i32 [ %[[B]], %loop_b_inner ] 771 ; CHECK-NEXT: br label %latch 772 ; 773 ; CHECK: latch: 774 ; CHECK-NEXT: br i1 %[[V]], label %loop_begin, label %loop_exit.split 775 ; 776 ; CHECK: loop_exit.split: 777 ; CHECK-NEXT: %[[B_LCSSA:.*]] = phi i32 [ %[[B_INNER_LCSSA]], %latch ] 778 ; CHECK-NEXT: br label %loop_exit 779 780 loop_exit: 781 %ab.lcssa = phi i32 [ %ab.phi, %latch ] 782 ret i32 %ab.lcssa 783 ; CHECK: loop_exit: 784 ; CHECK-NEXT: %[[AB_PHI:.*]] = phi i32 [ %[[B_LCSSA]], %loop_exit.split ], [ %[[A_LCSSA]], %loop_exit.split.us ] 785 ; CHECK-NEXT: ret i32 %[[AB_PHI]] 786 } 787 788 ; Test that when unswitching a deeply nested loop condition in a way that 789 ; produces a non-loop clone that can reach multiple exit blocks which are part 790 ; of different outer loops we correctly divide the cloned loop blocks between 791 ; the outer loops based on reachability. 792 define i32 @test7a(i1* %ptr, i1* %cond.ptr, i32* %a.ptr, i32* %b.ptr) { 793 ; CHECK-LABEL: @test7a( 794 entry: 795 br label %loop_begin 796 ; CHECK-NEXT: entry: 797 ; CHECK-NEXT: br label %loop_begin 798 799 loop_begin: 800 %a = load i32, i32* %a.ptr 801 br label %inner_loop_begin 802 ; CHECK: loop_begin: 803 ; CHECK-NEXT: %[[A:.*]] = load i32, i32* %a.ptr 804 ; CHECK-NEXT: br label %inner_loop_begin 805 806 inner_loop_begin: 807 %a.phi = phi i32 [ %a, %loop_begin ], [ %a2, %inner_inner_loop_exit ] 808 %cond = load i1, i1* %cond.ptr 809 %b = load i32, i32* %b.ptr 810 br label %inner_inner_loop_begin 811 ; CHECK: inner_loop_begin: 812 ; CHECK-NEXT: %[[A_INNER_PHI:.*]] = phi i32 [ %[[A]], %loop_begin ], [ %[[A2:.*]], %inner_inner_loop_exit ] 813 ; CHECK-NEXT: %[[COND:.*]] = load i1, i1* %cond.ptr 814 ; CHECK-NEXT: %[[B:.*]] = load i32, i32* %b.ptr 815 ; CHECK-NEXT: br i1 %[[COND]], label %inner_loop_begin.split.us, label %inner_loop_begin.split 816 817 inner_inner_loop_begin: 818 %v1 = load i1, i1* %ptr 819 br i1 %v1, label %inner_inner_loop_a, label %inner_inner_loop_b 820 821 inner_inner_loop_a: 822 %v2 = load i1, i1* %ptr 823 br i1 %v2, label %loop_exit, label %inner_inner_loop_c 824 825 inner_inner_loop_b: 826 %v3 = load i1, i1* %ptr 827 br i1 %v3, label %inner_inner_loop_exit, label %inner_inner_loop_c 828 829 inner_inner_loop_c: 830 %v4 = load i1, i1* %ptr 831 br i1 %v4, label %inner_loop_exit, label %inner_inner_loop_d 832 833 inner_inner_loop_d: 834 br i1 %cond, label %inner_loop_exit, label %inner_inner_loop_begin 835 ; The cloned copy that always exits with the adjustments required to fix up 836 ; loop exits. 837 ; 838 ; CHECK: inner_loop_begin.split.us: 839 ; CHECK-NEXT: br label %inner_inner_loop_begin.us 840 ; 841 ; CHECK: inner_inner_loop_begin.us: 842 ; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr 843 ; CHECK-NEXT: br i1 %[[V]], label %inner_inner_loop_a.us, label %inner_inner_loop_b.us 844 ; 845 ; CHECK: inner_inner_loop_b.us: 846 ; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr 847 ; CHECK-NEXT: br i1 %[[V]], label %inner_inner_loop_exit.split.us, label %inner_inner_loop_c.us.loopexit 848 ; 849 ; CHECK: inner_inner_loop_a.us: 850 ; CHECK-NEXT: %[[A_NEW_LCSSA:.*]] = phi i32 [ %[[A_INNER_PHI]], %inner_inner_loop_begin.us ] 851 ; CHECK-NEXT: %[[B_NEW_LCSSA:.*]] = phi i32 [ %[[B]], %inner_inner_loop_begin.us ] 852 ; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr 853 ; CHECK-NEXT: br i1 %[[V]], label %loop_exit.split.us, label %inner_inner_loop_c.us 854 ; 855 ; CHECK: inner_inner_loop_c.us.loopexit: 856 ; CHECK-NEXT: br label %inner_inner_loop_c.us 857 ; 858 ; CHECK: inner_inner_loop_c.us: 859 ; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr 860 ; CHECK-NEXT: br i1 %[[V]], label %inner_loop_exit.loopexit.split.us, label %inner_inner_loop_d.us 861 ; 862 ; CHECK: inner_inner_loop_d.us: 863 ; CHECK-NEXT: br label %inner_loop_exit.loopexit.split 864 ; 865 ; CHECK: inner_inner_loop_exit.split.us: 866 ; CHECK-NEXT: br label %inner_inner_loop_exit 867 ; 868 ; CHECK: loop_exit.split.us: 869 ; CHECK-NEXT: %[[A_LCSSA_US:.*]] = phi i32 [ %[[A_NEW_LCSSA]], %inner_inner_loop_a.us ] 870 ; CHECK-NEXT: %[[B_LCSSA_US:.*]] = phi i32 [ %[[B_NEW_LCSSA]], %inner_inner_loop_a.us ] 871 ; CHECK-NEXT: br label %loop_exit 872 ; 873 ; CHECK: inner_loop_exit.loopexit.split.us: 874 ; CHECK-NEXT: br label %inner_loop_exit.loopexit 875 ; 876 ; The original copy that continues to loop. 877 ; 878 ; CHECK: inner_loop_begin.split: 879 ; CHECK-NEXT: br label %inner_inner_loop_begin 880 ; 881 ; CHECK: inner_inner_loop_begin: 882 ; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr 883 ; CHECK-NEXT: br i1 %[[V]], label %inner_inner_loop_a, label %inner_inner_loop_b 884 ; 885 ; CHECK: inner_inner_loop_a: 886 ; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr 887 ; CHECK-NEXT: br i1 %[[V]], label %loop_exit.split, label %inner_inner_loop_c 888 ; 889 ; CHECK: inner_inner_loop_b: 890 ; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr 891 ; CHECK-NEXT: br i1 %[[V]], label %inner_inner_loop_exit.split, label %inner_inner_loop_c 892 ; 893 ; CHECK: inner_inner_loop_c: 894 ; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr 895 ; CHECK-NEXT: br i1 %[[V]], label %inner_loop_exit.loopexit.split, label %inner_inner_loop_d 896 ; 897 ; CHECK: inner_inner_loop_d: 898 ; CHECK-NEXT: br label %inner_inner_loop_begin 899 ; 900 ; CHECK: inner_inner_loop_exit.split: 901 ; CHECK-NEXT: br label %inner_inner_loop_exit 902 903 inner_inner_loop_exit: 904 %a2 = load i32, i32* %a.ptr 905 %v5 = load i1, i1* %ptr 906 br i1 %v5, label %inner_loop_exit, label %inner_loop_begin 907 ; CHECK: inner_inner_loop_exit: 908 ; CHECK-NEXT: %[[A2]] = load i32, i32* %a.ptr 909 ; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr 910 ; CHECK-NEXT: br i1 %[[V]], label %inner_loop_exit.loopexit1, label %inner_loop_begin 911 912 inner_loop_exit: 913 br label %loop_begin 914 ; CHECK: inner_loop_exit.loopexit.split: 915 ; CHECK-NEXT: br label %inner_loop_exit.loopexit 916 ; 917 ; CHECK: inner_loop_exit.loopexit: 918 ; CHECK-NEXT: br label %inner_loop_exit 919 ; 920 ; CHECK: inner_loop_exit.loopexit1: 921 ; CHECK-NEXT: br label %inner_loop_exit 922 ; 923 ; CHECK: inner_loop_exit: 924 ; CHECK-NEXT: br label %loop_begin 925 926 loop_exit: 927 %a.lcssa = phi i32 [ %a.phi, %inner_inner_loop_a ] 928 %b.lcssa = phi i32 [ %b, %inner_inner_loop_a ] 929 %result = add i32 %a.lcssa, %b.lcssa 930 ret i32 %result 931 ; CHECK: loop_exit.split: 932 ; CHECK-NEXT: %[[A_LCSSA:.*]] = phi i32 [ %[[A_INNER_PHI]], %inner_inner_loop_a ] 933 ; CHECK-NEXT: %[[B_LCSSA:.*]] = phi i32 [ %[[B]], %inner_inner_loop_a ] 934 ; CHECK-NEXT: br label %loop_exit 935 ; 936 ; CHECK: loop_exit: 937 ; CHECK-NEXT: %[[A_PHI:.*]] = phi i32 [ %[[A_LCSSA]], %loop_exit.split ], [ %[[A_LCSSA_US]], %loop_exit.split.us ] 938 ; CHECK-NEXT: %[[B_PHI:.*]] = phi i32 [ %[[B_LCSSA]], %loop_exit.split ], [ %[[B_LCSSA_US]], %loop_exit.split.us ] 939 ; CHECK-NEXT: %[[RESULT:.*]] = add i32 %[[A_PHI]], %[[B_PHI]] 940 ; CHECK-NEXT: ret i32 %[[RESULT]] 941 } 942 943 ; Same pattern as @test7a but here the original loop becomes a non-loop that 944 ; can reach multiple exit blocks which are part of different outer loops. 945 define i32 @test7b(i1* %ptr, i1* %cond.ptr, i32* %a.ptr, i32* %b.ptr) { 946 ; CHECK-LABEL: @test7b( 947 entry: 948 br label %loop_begin 949 ; CHECK-NEXT: entry: 950 ; CHECK-NEXT: br label %loop_begin 951 952 loop_begin: 953 %a = load i32, i32* %a.ptr 954 br label %inner_loop_begin 955 ; CHECK: loop_begin: 956 ; CHECK-NEXT: %[[A:.*]] = load i32, i32* %a.ptr 957 ; CHECK-NEXT: br label %inner_loop_begin 958 959 inner_loop_begin: 960 %a.phi = phi i32 [ %a, %loop_begin ], [ %a2, %inner_inner_loop_exit ] 961 %cond = load i1, i1* %cond.ptr 962 %b = load i32, i32* %b.ptr 963 br label %inner_inner_loop_begin 964 ; CHECK: inner_loop_begin: 965 ; CHECK-NEXT: %[[A_INNER_PHI:.*]] = phi i32 [ %[[A]], %loop_begin ], [ %[[A2:.*]], %inner_inner_loop_exit ] 966 ; CHECK-NEXT: %[[COND:.*]] = load i1, i1* %cond.ptr 967 ; CHECK-NEXT: %[[B:.*]] = load i32, i32* %b.ptr 968 ; CHECK-NEXT: br i1 %[[COND]], label %inner_loop_begin.split.us, label %inner_loop_begin.split 969 970 inner_inner_loop_begin: 971 %v1 = load i1, i1* %ptr 972 br i1 %v1, label %inner_inner_loop_a, label %inner_inner_loop_b 973 974 inner_inner_loop_a: 975 %v2 = load i1, i1* %ptr 976 br i1 %v2, label %loop_exit, label %inner_inner_loop_c 977 978 inner_inner_loop_b: 979 %v3 = load i1, i1* %ptr 980 br i1 %v3, label %inner_inner_loop_exit, label %inner_inner_loop_c 981 982 inner_inner_loop_c: 983 %v4 = load i1, i1* %ptr 984 br i1 %v4, label %inner_loop_exit, label %inner_inner_loop_d 985 986 inner_inner_loop_d: 987 br i1 %cond, label %inner_inner_loop_begin, label %inner_loop_exit 988 ; The cloned copy that continues looping. 989 ; 990 ; CHECK: inner_loop_begin.split.us: 991 ; CHECK-NEXT: br label %inner_inner_loop_begin.us 992 ; 993 ; CHECK: inner_inner_loop_begin.us: 994 ; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr 995 ; CHECK-NEXT: br i1 %[[V]], label %inner_inner_loop_a.us, label %inner_inner_loop_b.us 996 ; 997 ; CHECK: inner_inner_loop_b.us: 998 ; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr 999 ; CHECK-NEXT: br i1 %[[V]], label %inner_inner_loop_exit.split.us, label %inner_inner_loop_c.us 1000 ; 1001 ; CHECK: inner_inner_loop_a.us: 1002 ; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr 1003 ; CHECK-NEXT: br i1 %[[V]], label %loop_exit.split.us, label %inner_inner_loop_c.us 1004 ; 1005 ; CHECK: inner_inner_loop_c.us: 1006 ; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr 1007 ; CHECK-NEXT: br i1 %[[V]], label %inner_loop_exit.loopexit.split.us, label %inner_inner_loop_d.us 1008 ; 1009 ; CHECK: inner_inner_loop_d.us: 1010 ; CHECK-NEXT: br label %inner_inner_loop_begin.us 1011 ; 1012 ; CHECK: inner_inner_loop_exit.split.us: 1013 ; CHECK-NEXT: br label %inner_inner_loop_exit 1014 ; 1015 ; CHECK: loop_exit.split.us: 1016 ; CHECK-NEXT: %[[A_LCSSA_US:.*]] = phi i32 [ %[[A_INNER_PHI]], %inner_inner_loop_a.us ] 1017 ; CHECK-NEXT: %[[B_LCSSA_US:.*]] = phi i32 [ %[[B]], %inner_inner_loop_a.us ] 1018 ; CHECK-NEXT: br label %loop_exit 1019 ; 1020 ; CHECK: inner_loop_exit.loopexit.split.us: 1021 ; CHECK-NEXT: br label %inner_loop_exit.loopexit 1022 ; 1023 ; The original copy that now always exits and needs adjustments for exit 1024 ; blocks. 1025 ; 1026 ; CHECK: inner_loop_begin.split: 1027 ; CHECK-NEXT: br label %inner_inner_loop_begin 1028 ; 1029 ; CHECK: inner_inner_loop_begin: 1030 ; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr 1031 ; CHECK-NEXT: br i1 %[[V]], label %inner_inner_loop_a, label %inner_inner_loop_b 1032 ; 1033 ; CHECK: inner_inner_loop_a: 1034 ; CHECK-NEXT: %[[A_NEW_LCSSA:.*]] = phi i32 [ %[[A_INNER_PHI]], %inner_inner_loop_begin ] 1035 ; CHECK-NEXT: %[[B_NEW_LCSSA:.*]] = phi i32 [ %[[B]], %inner_inner_loop_begin ] 1036 ; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr 1037 ; CHECK-NEXT: br i1 %[[V]], label %loop_exit.split, label %inner_inner_loop_c 1038 ; 1039 ; CHECK: inner_inner_loop_b: 1040 ; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr 1041 ; CHECK-NEXT: br i1 %[[V]], label %inner_inner_loop_exit.split, label %inner_inner_loop_c.loopexit 1042 ; 1043 ; CHECK: inner_inner_loop_c.loopexit: 1044 ; CHECK-NEXT: br label %inner_inner_loop_c 1045 ; 1046 ; CHECK: inner_inner_loop_c: 1047 ; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr 1048 ; CHECK-NEXT: br i1 %[[V]], label %inner_loop_exit.loopexit.split, label %inner_inner_loop_d 1049 ; 1050 ; CHECK: inner_inner_loop_d: 1051 ; CHECK-NEXT: br label %inner_loop_exit.loopexit.split 1052 ; 1053 ; CHECK: inner_inner_loop_exit.split: 1054 ; CHECK-NEXT: br label %inner_inner_loop_exit 1055 1056 inner_inner_loop_exit: 1057 %a2 = load i32, i32* %a.ptr 1058 %v5 = load i1, i1* %ptr 1059 br i1 %v5, label %inner_loop_exit, label %inner_loop_begin 1060 ; CHECK: inner_inner_loop_exit: 1061 ; CHECK-NEXT: %[[A2]] = load i32, i32* %a.ptr 1062 ; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr 1063 ; CHECK-NEXT: br i1 %[[V]], label %inner_loop_exit.loopexit1, label %inner_loop_begin 1064 1065 inner_loop_exit: 1066 br label %loop_begin 1067 ; CHECK: inner_loop_exit.loopexit.split: 1068 ; CHECK-NEXT: br label %inner_loop_exit.loopexit 1069 ; 1070 ; CHECK: inner_loop_exit.loopexit: 1071 ; CHECK-NEXT: br label %inner_loop_exit 1072 ; 1073 ; CHECK: inner_loop_exit.loopexit1: 1074 ; CHECK-NEXT: br label %inner_loop_exit 1075 ; 1076 ; CHECK: inner_loop_exit: 1077 ; CHECK-NEXT: br label %loop_begin 1078 1079 loop_exit: 1080 %a.lcssa = phi i32 [ %a.phi, %inner_inner_loop_a ] 1081 %b.lcssa = phi i32 [ %b, %inner_inner_loop_a ] 1082 %result = add i32 %a.lcssa, %b.lcssa 1083 ret i32 %result 1084 ; CHECK: loop_exit.split: 1085 ; CHECK-NEXT: %[[A_LCSSA:.*]] = phi i32 [ %[[A_NEW_LCSSA]], %inner_inner_loop_a ] 1086 ; CHECK-NEXT: %[[B_LCSSA:.*]] = phi i32 [ %[[B_NEW_LCSSA]], %inner_inner_loop_a ] 1087 ; CHECK-NEXT: br label %loop_exit 1088 ; 1089 ; CHECK: loop_exit: 1090 ; CHECK-NEXT: %[[A_PHI:.*]] = phi i32 [ %[[A_LCSSA]], %loop_exit.split ], [ %[[A_LCSSA_US]], %loop_exit.split.us ] 1091 ; CHECK-NEXT: %[[B_PHI:.*]] = phi i32 [ %[[B_LCSSA]], %loop_exit.split ], [ %[[B_LCSSA_US]], %loop_exit.split.us ] 1092 ; CHECK-NEXT: %[[RESULT:.*]] = add i32 %[[A_PHI]], %[[B_PHI]] 1093 ; CHECK-NEXT: ret i32 %[[RESULT]] 1094 } 1095 1096 ; Test that when the exit block set of an inner loop changes to start at a less 1097 ; high level of the loop nest we correctly hoist the loop up the nest. 1098 define i32 @test8a(i1* %ptr, i1* %cond.ptr, i32* %a.ptr, i32* %b.ptr) { 1099 ; CHECK-LABEL: @test8a( 1100 entry: 1101 br label %loop_begin 1102 ; CHECK-NEXT: entry: 1103 ; CHECK-NEXT: br label %loop_begin 1104 1105 loop_begin: 1106 %a = load i32, i32* %a.ptr 1107 br label %inner_loop_begin 1108 ; CHECK: loop_begin: 1109 ; CHECK-NEXT: %[[A:.*]] = load i32, i32* %a.ptr 1110 ; CHECK-NEXT: br label %inner_loop_begin 1111 1112 inner_loop_begin: 1113 %a.phi = phi i32 [ %a, %loop_begin ], [ %a2, %inner_inner_loop_exit ] 1114 %cond = load i1, i1* %cond.ptr 1115 %b = load i32, i32* %b.ptr 1116 br label %inner_inner_loop_begin 1117 ; CHECK: inner_loop_begin: 1118 ; CHECK-NEXT: %[[A_INNER_PHI:.*]] = phi i32 [ %[[A]], %loop_begin ], [ %[[A2:.*]], %inner_inner_loop_exit ] 1119 ; CHECK-NEXT: %[[COND:.*]] = load i1, i1* %cond.ptr 1120 ; CHECK-NEXT: %[[B:.*]] = load i32, i32* %b.ptr 1121 ; CHECK-NEXT: br i1 %[[COND]], label %inner_loop_begin.split.us, label %inner_loop_begin.split 1122 1123 inner_inner_loop_begin: 1124 %v1 = load i1, i1* %ptr 1125 br i1 %v1, label %inner_inner_loop_a, label %inner_inner_loop_b 1126 1127 inner_inner_loop_a: 1128 %v2 = load i1, i1* %ptr 1129 br i1 %v2, label %inner_inner_loop_latch, label %inner_loop_exit 1130 1131 inner_inner_loop_b: 1132 br i1 %cond, label %inner_inner_loop_latch, label %inner_inner_loop_exit 1133 1134 inner_inner_loop_latch: 1135 br label %inner_inner_loop_begin 1136 ; The cloned region is now an exit from the inner loop. 1137 ; 1138 ; CHECK: inner_loop_begin.split.us: 1139 ; CHECK-NEXT: %[[A_INNER_INNER_LCSSA:.*]] = phi i32 [ %[[A_INNER_PHI]], %inner_loop_begin ] 1140 ; CHECK-NEXT: br label %inner_inner_loop_begin.us 1141 ; 1142 ; CHECK: inner_inner_loop_begin.us: 1143 ; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr 1144 ; CHECK-NEXT: br i1 %[[V]], label %inner_inner_loop_a.us, label %inner_inner_loop_b.us 1145 ; 1146 ; CHECK: inner_inner_loop_b.us: 1147 ; CHECK-NEXT: br label %inner_inner_loop_latch.us 1148 ; 1149 ; CHECK: inner_inner_loop_a.us: 1150 ; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr 1151 ; CHECK-NEXT: br i1 %[[V]], label %inner_inner_loop_latch.us, label %inner_loop_exit.loopexit.split.us 1152 ; 1153 ; CHECK: inner_inner_loop_latch.us: 1154 ; CHECK-NEXT: br label %inner_inner_loop_begin.us 1155 ; 1156 ; CHECK: inner_loop_exit.loopexit.split.us: 1157 ; CHECK-NEXT: %[[A_INNER_LCSSA_US:.*]] = phi i32 [ %[[A_INNER_INNER_LCSSA]], %inner_inner_loop_a.us ] 1158 ; CHECK-NEXT: br label %inner_loop_exit.loopexit 1159 ; 1160 ; The original region exits the loop earlier. 1161 ; 1162 ; CHECK: inner_loop_begin.split: 1163 ; CHECK-NEXT: br label %inner_inner_loop_begin 1164 ; 1165 ; CHECK: inner_inner_loop_begin: 1166 ; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr 1167 ; CHECK-NEXT: br i1 %[[V]], label %inner_inner_loop_a, label %inner_inner_loop_b 1168 ; 1169 ; CHECK: inner_inner_loop_a: 1170 ; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr 1171 ; CHECK-NEXT: br i1 %[[V]], label %inner_inner_loop_latch, label %inner_loop_exit.loopexit.split 1172 ; 1173 ; CHECK: inner_inner_loop_b: 1174 ; CHECK-NEXT: br label %inner_inner_loop_exit 1175 ; 1176 ; CHECK: inner_inner_loop_latch: 1177 ; CHECK-NEXT: br label %inner_inner_loop_begin 1178 1179 inner_inner_loop_exit: 1180 %a2 = load i32, i32* %a.ptr 1181 %v4 = load i1, i1* %ptr 1182 br i1 %v4, label %inner_loop_exit, label %inner_loop_begin 1183 ; CHECK: inner_inner_loop_exit: 1184 ; CHECK-NEXT: %[[A2]] = load i32, i32* %a.ptr 1185 ; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr 1186 ; CHECK-NEXT: br i1 %[[V]], label %inner_loop_exit.loopexit1, label %inner_loop_begin 1187 1188 inner_loop_exit: 1189 %v5 = load i1, i1* %ptr 1190 br i1 %v5, label %loop_exit, label %loop_begin 1191 ; CHECK: inner_loop_exit.loopexit.split: 1192 ; CHECK-NEXT: %[[A_INNER_LCSSA:.*]] = phi i32 [ %[[A_INNER_PHI]], %inner_inner_loop_a ] 1193 ; CHECK-NEXT: br label %inner_loop_exit.loopexit 1194 ; 1195 ; CHECK: inner_loop_exit.loopexit: 1196 ; CHECK-NEXT: %[[A_INNER_US_PHI:.*]] = phi i32 [ %[[A_INNER_LCSSA]], %inner_loop_exit.loopexit.split ], [ %[[A_INNER_LCSSA_US]], %inner_loop_exit.loopexit.split.us ] 1197 ; CHECK-NEXT: br label %inner_loop_exit 1198 ; 1199 ; CHECK: inner_loop_exit.loopexit1: 1200 ; CHECK-NEXT: %[[A_INNER_LCSSA2:.*]] = phi i32 [ %[[A_INNER_PHI]], %inner_inner_loop_exit ] 1201 ; CHECK-NEXT: br label %inner_loop_exit 1202 ; 1203 ; CHECK: inner_loop_exit: 1204 ; CHECK-NEXT: %[[A_INNER_PHI:.*]] = phi i32 [ %[[A_INNER_LCSSA2]], %inner_loop_exit.loopexit1 ], [ %[[A_INNER_US_PHI]], %inner_loop_exit.loopexit ] 1205 ; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr 1206 ; CHECK-NEXT: br i1 %[[V]], label %loop_exit, label %loop_begin 1207 1208 loop_exit: 1209 %a.lcssa = phi i32 [ %a.phi, %inner_loop_exit ] 1210 ret i32 %a.lcssa 1211 ; CHECK: loop_exit: 1212 ; CHECK-NEXT: %[[A_LCSSA:.*]] = phi i32 [ %[[A_INNER_PHI]], %inner_loop_exit ] 1213 ; CHECK-NEXT: ret i32 %[[A_LCSSA]] 1214 } 1215 1216 ; Same pattern as @test8a but where the original loop looses an exit block and 1217 ; needs to be hoisted up the nest. 1218 define i32 @test8b(i1* %ptr, i1* %cond.ptr, i32* %a.ptr, i32* %b.ptr) { 1219 ; CHECK-LABEL: @test8b( 1220 entry: 1221 br label %loop_begin 1222 ; CHECK-NEXT: entry: 1223 ; CHECK-NEXT: br label %loop_begin 1224 1225 loop_begin: 1226 %a = load i32, i32* %a.ptr 1227 br label %inner_loop_begin 1228 ; CHECK: loop_begin: 1229 ; CHECK-NEXT: %[[A:.*]] = load i32, i32* %a.ptr 1230 ; CHECK-NEXT: br label %inner_loop_begin 1231 1232 inner_loop_begin: 1233 %a.phi = phi i32 [ %a, %loop_begin ], [ %a2, %inner_inner_loop_exit ] 1234 %cond = load i1, i1* %cond.ptr 1235 %b = load i32, i32* %b.ptr 1236 br label %inner_inner_loop_begin 1237 ; CHECK: inner_loop_begin: 1238 ; CHECK-NEXT: %[[A_INNER_PHI:.*]] = phi i32 [ %[[A]], %loop_begin ], [ %[[A2:.*]], %inner_inner_loop_exit ] 1239 ; CHECK-NEXT: %[[COND:.*]] = load i1, i1* %cond.ptr 1240 ; CHECK-NEXT: %[[B:.*]] = load i32, i32* %b.ptr 1241 ; CHECK-NEXT: br i1 %[[COND]], label %inner_loop_begin.split.us, label %inner_loop_begin.split 1242 1243 inner_inner_loop_begin: 1244 %v1 = load i1, i1* %ptr 1245 br i1 %v1, label %inner_inner_loop_a, label %inner_inner_loop_b 1246 1247 inner_inner_loop_a: 1248 %v2 = load i1, i1* %ptr 1249 br i1 %v2, label %inner_inner_loop_latch, label %inner_loop_exit 1250 1251 inner_inner_loop_b: 1252 br i1 %cond, label %inner_inner_loop_exit, label %inner_inner_loop_latch 1253 1254 inner_inner_loop_latch: 1255 br label %inner_inner_loop_begin 1256 ; The cloned region is similar to before but with one earlier exit. 1257 ; 1258 ; CHECK: inner_loop_begin.split.us: 1259 ; CHECK-NEXT: br label %inner_inner_loop_begin.us 1260 ; 1261 ; CHECK: inner_inner_loop_begin.us: 1262 ; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr 1263 ; CHECK-NEXT: br i1 %[[V]], label %inner_inner_loop_a.us, label %inner_inner_loop_b.us 1264 ; 1265 ; CHECK: inner_inner_loop_b.us: 1266 ; CHECK-NEXT: br label %inner_inner_loop_exit.split.us 1267 ; 1268 ; CHECK: inner_inner_loop_a.us: 1269 ; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr 1270 ; CHECK-NEXT: br i1 %[[V]], label %inner_inner_loop_latch.us, label %inner_loop_exit.loopexit.split.us 1271 ; 1272 ; CHECK: inner_inner_loop_latch.us: 1273 ; CHECK-NEXT: br label %inner_inner_loop_begin.us 1274 ; 1275 ; CHECK: inner_inner_loop_exit.split.us: 1276 ; CHECK-NEXT: br label %inner_inner_loop_exit 1277 ; 1278 ; CHECK: inner_loop_exit.loopexit.split.us: 1279 ; CHECK-NEXT: %[[A_INNER_LCSSA_US:.*]] = phi i32 [ %[[A_INNER_PHI]], %inner_inner_loop_a.us ] 1280 ; CHECK-NEXT: br label %inner_loop_exit.loopexit 1281 ; 1282 ; The original region is now an exit in the preheader. 1283 ; 1284 ; CHECK: inner_loop_begin.split: 1285 ; CHECK-NEXT: %[[A_INNER_INNER_LCSSA:.*]] = phi i32 [ %[[A_INNER_PHI]], %inner_loop_begin ] 1286 ; CHECK-NEXT: br label %inner_inner_loop_begin 1287 ; 1288 ; CHECK: inner_inner_loop_begin: 1289 ; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr 1290 ; CHECK-NEXT: br i1 %[[V]], label %inner_inner_loop_a, label %inner_inner_loop_b 1291 ; 1292 ; CHECK: inner_inner_loop_a: 1293 ; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr 1294 ; CHECK-NEXT: br i1 %[[V]], label %inner_inner_loop_latch, label %inner_loop_exit.loopexit.split 1295 ; 1296 ; CHECK: inner_inner_loop_b: 1297 ; CHECK-NEXT: br label %inner_inner_loop_latch 1298 ; 1299 ; CHECK: inner_inner_loop_latch: 1300 ; CHECK-NEXT: br label %inner_inner_loop_begin 1301 1302 inner_inner_loop_exit: 1303 %a2 = load i32, i32* %a.ptr 1304 %v4 = load i1, i1* %ptr 1305 br i1 %v4, label %inner_loop_exit, label %inner_loop_begin 1306 ; CHECK: inner_inner_loop_exit: 1307 ; CHECK-NEXT: %[[A2]] = load i32, i32* %a.ptr 1308 ; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr 1309 ; CHECK-NEXT: br i1 %[[V]], label %inner_loop_exit.loopexit1, label %inner_loop_begin 1310 1311 inner_loop_exit: 1312 %v5 = load i1, i1* %ptr 1313 br i1 %v5, label %loop_exit, label %loop_begin 1314 ; CHECK: inner_loop_exit.loopexit.split: 1315 ; CHECK-NEXT: %[[A_INNER_LCSSA:.*]] = phi i32 [ %[[A_INNER_INNER_LCSSA]], %inner_inner_loop_a ] 1316 ; CHECK-NEXT: br label %inner_loop_exit.loopexit 1317 ; 1318 ; CHECK: inner_loop_exit.loopexit: 1319 ; CHECK-NEXT: %[[A_INNER_US_PHI:.*]] = phi i32 [ %[[A_INNER_LCSSA]], %inner_loop_exit.loopexit.split ], [ %[[A_INNER_LCSSA_US]], %inner_loop_exit.loopexit.split.us ] 1320 ; CHECK-NEXT: br label %inner_loop_exit 1321 ; 1322 ; CHECK: inner_loop_exit.loopexit1: 1323 ; CHECK-NEXT: %[[A_INNER_LCSSA2:.*]] = phi i32 [ %[[A_INNER_PHI]], %inner_inner_loop_exit ] 1324 ; CHECK-NEXT: br label %inner_loop_exit 1325 ; 1326 ; CHECK: inner_loop_exit: 1327 ; CHECK-NEXT: %[[A_INNER_PHI:.*]] = phi i32 [ %[[A_INNER_LCSSA2]], %inner_loop_exit.loopexit1 ], [ %[[A_INNER_US_PHI]], %inner_loop_exit.loopexit ] 1328 ; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr 1329 ; CHECK-NEXT: br i1 %[[V]], label %loop_exit, label %loop_begin 1330 1331 loop_exit: 1332 %a.lcssa = phi i32 [ %a.phi, %inner_loop_exit ] 1333 ret i32 %a.lcssa 1334 ; CHECK: loop_exit: 1335 ; CHECK-NEXT: %[[A_LCSSA:.*]] = phi i32 [ %[[A_INNER_PHI]], %inner_loop_exit ] 1336 ; CHECK-NEXT: ret i32 %[[A_LCSSA]] 1337 } 1338 1339 ; Test for when unswitching produces a clone of an inner loop but 1340 ; the clone no longer has an exiting edge *at all* and loops infinitely. 1341 ; Because it doesn't ever exit to the outer loop it is no longer an inner loop 1342 ; but needs to be hoisted up the nest to be a top-level loop. 1343 define i32 @test9a(i1* %ptr, i1* %cond.ptr, i32* %a.ptr, i32* %b.ptr) { 1344 ; CHECK-LABEL: @test9a( 1345 entry: 1346 br label %loop_begin 1347 ; CHECK-NEXT: entry: 1348 ; CHECK-NEXT: br label %loop_begin 1349 1350 loop_begin: 1351 %b = load i32, i32* %b.ptr 1352 %cond = load i1, i1* %cond.ptr 1353 br label %inner_loop_begin 1354 ; CHECK: loop_begin: 1355 ; CHECK-NEXT: %[[B:.*]] = load i32, i32* %b.ptr 1356 ; CHECK-NEXT: %[[COND:.*]] = load i1, i1* %cond.ptr 1357 ; CHECK-NEXT: br i1 %[[COND]], label %loop_begin.split.us, label %loop_begin.split 1358 1359 inner_loop_begin: 1360 %a = load i32, i32* %a.ptr 1361 br i1 %cond, label %inner_loop_latch, label %inner_loop_exit 1362 1363 inner_loop_latch: 1364 call void @sink1(i32 %b) 1365 br label %inner_loop_begin 1366 ; The cloned inner loop ends up as an infinite loop and thus being a top-level 1367 ; loop with the preheader as an exit block of the outer loop. 1368 ; 1369 ; CHECK: loop_begin.split.us 1370 ; CHECK-NEXT: %[[B_LCSSA:.*]] = phi i32 [ %[[B]], %loop_begin ] 1371 ; CHECK-NEXT: br label %inner_loop_begin.us 1372 ; 1373 ; CHECK: inner_loop_begin.us: 1374 ; CHECK-NEXT: %[[A:.*]] = load i32, i32* %a.ptr 1375 ; CHECK-NEXT: br label %inner_loop_latch.us 1376 ; 1377 ; CHECK: inner_loop_latch.us: 1378 ; CHECK-NEXT: call void @sink1(i32 %[[B_LCSSA]]) 1379 ; CHECK-NEXT: br label %inner_loop_begin.us 1380 ; 1381 ; The original loop becomes boring non-loop code. 1382 ; 1383 ; CHECK: loop_begin.split 1384 ; CHECK-NEXT: br label %inner_loop_begin 1385 ; 1386 ; CHECK: inner_loop_begin: 1387 ; CHECK-NEXT: %[[A:.*]] = load i32, i32* %a.ptr 1388 ; CHECK-NEXT: br label %inner_loop_exit 1389 1390 inner_loop_exit: 1391 %a.inner_lcssa = phi i32 [ %a, %inner_loop_begin ] 1392 %v = load i1, i1* %ptr 1393 br i1 %v, label %loop_begin, label %loop_exit 1394 ; CHECK: inner_loop_exit: 1395 ; CHECK-NEXT: %[[A_INNER_LCSSA:.*]] = phi i32 [ %[[A]], %inner_loop_begin ] 1396 ; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr 1397 ; CHECK-NEXT: br i1 %[[V]], label %loop_begin, label %loop_exit 1398 1399 loop_exit: 1400 %a.lcssa = phi i32 [ %a.inner_lcssa, %inner_loop_exit ] 1401 ret i32 %a.lcssa 1402 ; CHECK: loop_exit: 1403 ; CHECK-NEXT: %[[A_LCSSA:.*]] = phi i32 [ %[[A_INNER_LCSSA]], %inner_loop_exit ] 1404 ; CHECK-NEXT: ret i32 %[[A_LCSSA]] 1405 } 1406 1407 ; The same core pattern as @test9a, but instead of the cloned loop becoming an 1408 ; infinite loop, the original loop has its only exit unswitched and the 1409 ; original loop becomes infinite and must be hoisted out of the loop nest. 1410 define i32 @test9b(i1* %ptr, i1* %cond.ptr, i32* %a.ptr, i32* %b.ptr) { 1411 ; CHECK-LABEL: @test9b( 1412 entry: 1413 br label %loop_begin 1414 ; CHECK-NEXT: entry: 1415 ; CHECK-NEXT: br label %loop_begin 1416 1417 loop_begin: 1418 %b = load i32, i32* %b.ptr 1419 %cond = load i1, i1* %cond.ptr 1420 br label %inner_loop_begin 1421 ; CHECK: loop_begin: 1422 ; CHECK-NEXT: %[[B:.*]] = load i32, i32* %b.ptr 1423 ; CHECK-NEXT: %[[COND:.*]] = load i1, i1* %cond.ptr 1424 ; CHECK-NEXT: br i1 %[[COND]], label %loop_begin.split.us, label %loop_begin.split 1425 1426 inner_loop_begin: 1427 %a = load i32, i32* %a.ptr 1428 br i1 %cond, label %inner_loop_exit, label %inner_loop_latch 1429 1430 inner_loop_latch: 1431 call void @sink1(i32 %b) 1432 br label %inner_loop_begin 1433 ; The cloned inner loop becomes a boring non-loop. 1434 ; 1435 ; CHECK: loop_begin.split.us 1436 ; CHECK-NEXT: br label %inner_loop_begin.us 1437 ; 1438 ; CHECK: inner_loop_begin.us: 1439 ; CHECK-NEXT: %[[A:.*]] = load i32, i32* %a.ptr 1440 ; CHECK-NEXT: br label %inner_loop_exit.split.us 1441 ; 1442 ; CHECK: inner_loop_exit.split.us 1443 ; CHECK-NEXT: %[[A_INNER_LCSSA_US:.*]] = phi i32 [ %[[A]], %inner_loop_begin.us ] 1444 ; CHECK-NEXT: br label %inner_loop_exit 1445 ; 1446 ; The original loop becomes an infinite loop and thus a top-level loop with the 1447 ; preheader as an exit block for the outer loop. 1448 ; 1449 ; CHECK: loop_begin.split 1450 ; CHECK-NEXT: %[[B_LCSSA:.*]] = phi i32 [ %[[B]], %loop_begin ] 1451 ; CHECK-NEXT: br label %inner_loop_begin 1452 ; 1453 ; CHECK: inner_loop_begin: 1454 ; CHECK-NEXT: %[[A:.*]] = load i32, i32* %a.ptr 1455 ; CHECK-NEXT: br label %inner_loop_latch 1456 ; 1457 ; CHECK: inner_loop_latch: 1458 ; CHECK-NEXT: call void @sink1(i32 %[[B_LCSSA]]) 1459 ; CHECK-NEXT: br label %inner_loop_begin 1460 1461 inner_loop_exit: 1462 %a.inner_lcssa = phi i32 [ %a, %inner_loop_begin ] 1463 %v = load i1, i1* %ptr 1464 br i1 %v, label %loop_begin, label %loop_exit 1465 ; CHECK: inner_loop_exit: 1466 ; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr 1467 ; CHECK-NEXT: br i1 %[[V]], label %loop_begin, label %loop_exit 1468 1469 loop_exit: 1470 %a.lcssa = phi i32 [ %a.inner_lcssa, %inner_loop_exit ] 1471 ret i32 %a.lcssa 1472 ; CHECK: loop_exit: 1473 ; CHECK-NEXT: %[[A_LCSSA:.*]] = phi i32 [ %[[A_INNER_LCSSA_US]], %inner_loop_exit ] 1474 ; CHECK-NEXT: ret i32 %[[A_LCSSA]] 1475 } 1476 1477 ; Test that requires re-forming dedicated exits for the cloned loop. 1478 define i32 @test10a(i1* %ptr, i1 %cond, i32* %a.ptr) { 1479 ; CHECK-LABEL: @test10a( 1480 entry: 1481 br label %loop_begin 1482 ; CHECK-NEXT: entry: 1483 ; CHECK-NEXT: br i1 %cond, label %entry.split.us, label %entry.split 1484 1485 loop_begin: 1486 %a = load i32, i32* %a.ptr 1487 %v1 = load i1, i1* %ptr 1488 br i1 %v1, label %loop_a, label %loop_b 1489 1490 loop_a: 1491 %v2 = load i1, i1* %ptr 1492 br i1 %v2, label %loop_exit, label %loop_begin 1493 1494 loop_b: 1495 br i1 %cond, label %loop_exit, label %loop_begin 1496 ; The cloned loop with one edge as a direct exit. 1497 ; 1498 ; CHECK: entry.split.us: 1499 ; CHECK-NEXT: br label %loop_begin.us 1500 ; 1501 ; CHECK: loop_begin.us: 1502 ; CHECK-NEXT: %[[A:.*]] = load i32, i32* %a.ptr 1503 ; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr 1504 ; CHECK-NEXT: br i1 %[[V]], label %loop_a.us, label %loop_b.us 1505 ; 1506 ; CHECK: loop_b.us: 1507 ; CHECK-NEXT: %[[A_LCSSA_B:.*]] = phi i32 [ %[[A]], %loop_begin.us ] 1508 ; CHECK-NEXT: br label %loop_exit.split.us 1509 ; 1510 ; CHECK: loop_a.us: 1511 ; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr 1512 ; CHECK-NEXT: br i1 %[[V]], label %loop_exit.split.us.loopexit, label %loop_begin.backedge.us 1513 ; 1514 ; CHECK: loop_begin.backedge.us: 1515 ; CHECK-NEXT: br label %loop_begin.us 1516 ; 1517 ; CHECK: loop_exit.split.us.loopexit: 1518 ; CHECK-NEXT: %[[A_LCSSA_A:.*]] = phi i32 [ %[[A]], %loop_a.us ] 1519 ; CHECK-NEXT: br label %loop_exit 1520 ; 1521 ; CHECK: loop_exit.split.us: 1522 ; CHECK-NEXT: %[[A_PHI_US:.*]] = phi i32 [ %[[A_LCSSA_B]], %loop_b.us ], [ %[[A_LCSSA_A]], %loop_exit.split.us.loopexit ] 1523 ; CHECK-NEXT: br label %loop_exit 1524 1525 ; The original loop without one 'loop_exit' edge. 1526 ; 1527 ; CHECK: entry.split: 1528 ; CHECK-NEXT: br label %loop_begin 1529 ; 1530 ; CHECK: loop_begin: 1531 ; CHECK-NEXT: %[[A:.*]] = load i32, i32* %a.ptr 1532 ; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr 1533 ; CHECK-NEXT: br i1 %[[V]], label %loop_a, label %loop_b 1534 ; 1535 ; CHECK: loop_a: 1536 ; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr 1537 ; CHECK-NEXT: br i1 %[[V]], label %loop_exit.split, label %loop_begin.backedge 1538 ; 1539 ; CHECK: loop_begin.backedge: 1540 ; CHECK-NEXT: br label %loop_begin 1541 ; 1542 ; CHECK: loop_b: 1543 ; CHECK-NEXT: br label %loop_begin.backedge 1544 ; 1545 ; CHECK: loop_exit.split: 1546 ; CHECK-NEXT: %[[A_LCSSA:.*]] = phi i32 [ %[[A]], %loop_a ] 1547 ; CHECK-NEXT: br label %loop_exit 1548 1549 loop_exit: 1550 %a.lcssa = phi i32 [ %a, %loop_a ], [ %a, %loop_b ] 1551 ret i32 %a.lcssa 1552 ; CHECK: loop_exit: 1553 ; CHECK-NEXT: %[[A_PHI:.*]] = phi i32 [ %[[A_LCSSA]], %loop_exit.split ], [ %[[A_PHI_US]], %loop_exit.split.us ] 1554 ; CHECK-NEXT: ret i32 %[[A_PHI]] 1555 } 1556 1557 ; Test that requires re-forming dedicated exits for the original loop. 1558 define i32 @test10b(i1* %ptr, i1 %cond, i32* %a.ptr) { 1559 ; CHECK-LABEL: @test10b( 1560 entry: 1561 br label %loop_begin 1562 ; CHECK-NEXT: entry: 1563 ; CHECK-NEXT: br i1 %cond, label %entry.split.us, label %entry.split 1564 1565 loop_begin: 1566 %a = load i32, i32* %a.ptr 1567 %v1 = load i1, i1* %ptr 1568 br i1 %v1, label %loop_a, label %loop_b 1569 1570 loop_a: 1571 %v2 = load i1, i1* %ptr 1572 br i1 %v2, label %loop_begin, label %loop_exit 1573 1574 loop_b: 1575 br i1 %cond, label %loop_begin, label %loop_exit 1576 ; The cloned loop without one of the exits. 1577 ; 1578 ; CHECK: entry.split.us: 1579 ; CHECK-NEXT: br label %loop_begin.us 1580 ; 1581 ; CHECK: loop_begin.us: 1582 ; CHECK-NEXT: %[[A:.*]] = load i32, i32* %a.ptr 1583 ; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr 1584 ; CHECK-NEXT: br i1 %[[V]], label %loop_a.us, label %loop_b.us 1585 ; 1586 ; CHECK: loop_b.us: 1587 ; CHECK-NEXT: br label %loop_begin.backedge.us 1588 ; 1589 ; CHECK: loop_a.us: 1590 ; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr 1591 ; CHECK-NEXT: br i1 %[[V]], label %loop_begin.backedge.us, label %loop_exit.split.us 1592 ; 1593 ; CHECK: loop_begin.backedge.us: 1594 ; CHECK-NEXT: br label %loop_begin.us 1595 ; 1596 ; CHECK: loop_exit.split.us: 1597 ; CHECK-NEXT: %[[A_LCSSA_US:.*]] = phi i32 [ %[[A]], %loop_a.us ] 1598 ; CHECK-NEXT: br label %loop_exit 1599 1600 ; The original loop without one 'loop_exit' edge. 1601 ; 1602 ; CHECK: entry.split: 1603 ; CHECK-NEXT: br label %loop_begin 1604 ; 1605 ; CHECK: loop_begin: 1606 ; CHECK-NEXT: %[[A:.*]] = load i32, i32* %a.ptr 1607 ; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr 1608 ; CHECK-NEXT: br i1 %[[V]], label %loop_a, label %loop_b 1609 ; 1610 ; CHECK: loop_a: 1611 ; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr 1612 ; CHECK-NEXT: br i1 %[[V]], label %loop_begin.backedge, label %loop_exit.split.loopexit 1613 ; 1614 ; CHECK: loop_begin.backedge: 1615 ; CHECK-NEXT: br label %loop_begin 1616 ; 1617 ; CHECK: loop_b: 1618 ; CHECK-NEXT: %[[A_LCSSA_B:.*]] = phi i32 [ %[[A]], %loop_begin ] 1619 ; CHECK-NEXT: br label %loop_exit.split 1620 ; 1621 ; CHECK: loop_exit.split.loopexit: 1622 ; CHECK-NEXT: %[[A_LCSSA_A:.*]] = phi i32 [ %[[A]], %loop_a ] 1623 ; CHECK-NEXT: br label %loop_exit.split 1624 ; 1625 ; CHECK: loop_exit.split: 1626 ; CHECK-NEXT: %[[A_PHI_SPLIT:.*]] = phi i32 [ %[[A_LCSSA_B]], %loop_b ], [ %[[A_LCSSA_A]], %loop_exit.split.loopexit ] 1627 ; CHECK-NEXT: br label %loop_exit 1628 1629 loop_exit: 1630 %a.lcssa = phi i32 [ %a, %loop_a ], [ %a, %loop_b ] 1631 ret i32 %a.lcssa 1632 ; CHECK: loop_exit: 1633 ; CHECK-NEXT: %[[A_PHI:.*]] = phi i32 [ %[[A_PHI_SPLIT]], %loop_exit.split ], [ %[[A_LCSSA_US]], %loop_exit.split.us ] 1634 ; CHECK-NEXT: ret i32 %[[A_PHI]] 1635 } 1636 1637 ; Check that if a cloned inner loop after unswitching doesn't loop and directly 1638 ; exits even an outer loop, we don't add the cloned preheader to the outer 1639 ; loop and do add the needed LCSSA phi nodes for the new exit block from the 1640 ; outer loop. 1641 define i32 @test11a(i1* %ptr, i1* %cond.ptr, i32* %a.ptr, i32* %b.ptr) { 1642 ; CHECK-LABEL: @test11a( 1643 entry: 1644 br label %loop_begin 1645 ; CHECK-NEXT: entry: 1646 ; CHECK-NEXT: br label %loop_begin 1647 1648 loop_begin: 1649 %b = load i32, i32* %b.ptr 1650 %v1 = load i1, i1* %ptr 1651 br i1 %v1, label %loop_latch, label %inner_loop_ph 1652 ; CHECK: loop_begin: 1653 ; CHECK-NEXT: %[[B:.*]] = load i32, i32* %b.ptr 1654 ; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr 1655 ; CHECK-NEXT: br i1 %[[V]], label %loop_latch, label %inner_loop_ph 1656 1657 inner_loop_ph: 1658 %cond = load i1, i1* %cond.ptr 1659 br label %inner_loop_begin 1660 ; CHECK: inner_loop_ph: 1661 ; CHECK-NEXT: %[[COND:.*]] = load i1, i1* %cond.ptr 1662 ; CHECK-NEXT: br i1 %[[COND]], label %inner_loop_ph.split.us, label %inner_loop_ph.split 1663 1664 inner_loop_begin: 1665 call void @sink1(i32 %b) 1666 %a = load i32, i32* %a.ptr 1667 br i1 %cond, label %loop_exit, label %inner_loop_a 1668 1669 inner_loop_a: 1670 %v2 = load i1, i1* %ptr 1671 br i1 %v2, label %inner_loop_exit, label %inner_loop_begin 1672 ; The cloned path doesn't actually loop and is an exit from the outer loop as 1673 ; well. 1674 ; 1675 ; CHECK: inner_loop_ph.split.us: 1676 ; CHECK-NEXT: %[[B_LCSSA:.*]] = phi i32 [ %[[B]], %inner_loop_ph ] 1677 ; CHECK-NEXT: br label %inner_loop_begin.us 1678 ; 1679 ; CHECK: inner_loop_begin.us: 1680 ; CHECK-NEXT: call void @sink1(i32 %[[B_LCSSA]]) 1681 ; CHECK-NEXT: %[[A:.*]] = load i32, i32* %a.ptr 1682 ; CHECK-NEXT: br label %loop_exit.loopexit.split.us 1683 ; 1684 ; CHECK: loop_exit.loopexit.split.us: 1685 ; CHECK-NEXT: %[[A_INNER_LCSSA_US:.*]] = phi i32 [ %[[A]], %inner_loop_begin.us ] 1686 ; CHECK-NEXT: br label %loop_exit.loopexit 1687 ; 1688 ; The original remains a loop losing the exit edge. 1689 ; 1690 ; CHECK: inner_loop_ph.split: 1691 ; CHECK-NEXT: br label %inner_loop_begin 1692 ; 1693 ; CHECK: inner_loop_begin: 1694 ; CHECK-NEXT: call void @sink1(i32 %[[B]]) 1695 ; CHECK-NEXT: %[[A:.*]] = load i32, i32* %a.ptr 1696 ; CHECK-NEXT: br label %inner_loop_a 1697 ; 1698 ; CHECK: inner_loop_a: 1699 ; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr 1700 ; CHECK-NEXT: br i1 %[[V]], label %inner_loop_exit, label %inner_loop_begin 1701 1702 inner_loop_exit: 1703 %a.inner_lcssa = phi i32 [ %a, %inner_loop_a ] 1704 %v3 = load i1, i1* %ptr 1705 br i1 %v3, label %loop_latch, label %loop_exit 1706 ; CHECK: inner_loop_exit: 1707 ; CHECK-NEXT: %[[A_INNER_LCSSA:.*]] = phi i32 [ %[[A]], %inner_loop_a ] 1708 ; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr 1709 ; CHECK-NEXT: br i1 %[[V]], label %loop_latch, label %loop_exit.loopexit1 1710 1711 loop_latch: 1712 br label %loop_begin 1713 ; CHECK: loop_latch: 1714 ; CHECK-NEXT: br label %loop_begin 1715 1716 loop_exit: 1717 %a.lcssa = phi i32 [ %a, %inner_loop_begin ], [ %a.inner_lcssa, %inner_loop_exit ] 1718 ret i32 %a.lcssa 1719 ; CHECK: loop_exit.loopexit: 1720 ; CHECK-NEXT: br label %loop_exit 1721 ; 1722 ; CHECK: loop_exit.loopexit1: 1723 ; CHECK-NEXT: %[[A_LCSSA:.*]] = phi i32 [ %[[A_INNER_LCSSA]], %inner_loop_exit ] 1724 ; CHECK-NEXT: br label %loop_exit 1725 ; 1726 ; CHECK: loop_exit: 1727 ; CHECK-NEXT: %[[A_PHI:.*]] = phi i32 [ %[[A_INNER_LCSSA_US]], %loop_exit.loopexit ], [ %[[A_LCSSA]], %loop_exit.loopexit1 ] 1728 ; CHECK-NEXT: ret i32 %[[A_PHI]] 1729 } 1730 1731 ; Check that if the original inner loop after unswitching doesn't loop and 1732 ; directly exits even an outer loop, we remove the original preheader from the 1733 ; outer loop and add needed LCSSA phi nodes for the new exit block from the 1734 ; outer loop. 1735 define i32 @test11b(i1* %ptr, i1* %cond.ptr, i32* %a.ptr, i32* %b.ptr) { 1736 ; CHECK-LABEL: @test11b( 1737 entry: 1738 br label %loop_begin 1739 ; CHECK-NEXT: entry: 1740 ; CHECK-NEXT: br label %loop_begin 1741 1742 loop_begin: 1743 %b = load i32, i32* %b.ptr 1744 %v1 = load i1, i1* %ptr 1745 br i1 %v1, label %loop_latch, label %inner_loop_ph 1746 ; CHECK: loop_begin: 1747 ; CHECK-NEXT: %[[B:.*]] = load i32, i32* %b.ptr 1748 ; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr 1749 ; CHECK-NEXT: br i1 %[[V]], label %loop_latch, label %inner_loop_ph 1750 1751 inner_loop_ph: 1752 %cond = load i1, i1* %cond.ptr 1753 br label %inner_loop_begin 1754 ; CHECK: inner_loop_ph: 1755 ; CHECK-NEXT: %[[COND:.*]] = load i1, i1* %cond.ptr 1756 ; CHECK-NEXT: br i1 %[[COND]], label %inner_loop_ph.split.us, label %inner_loop_ph.split 1757 1758 inner_loop_begin: 1759 call void @sink1(i32 %b) 1760 %a = load i32, i32* %a.ptr 1761 br i1 %cond, label %inner_loop_a, label %loop_exit 1762 1763 inner_loop_a: 1764 %v2 = load i1, i1* %ptr 1765 br i1 %v2, label %inner_loop_exit, label %inner_loop_begin 1766 ; The cloned path continues to loop without the exit out of the entire nest. 1767 ; 1768 ; CHECK: inner_loop_ph.split.us: 1769 ; CHECK-NEXT: br label %inner_loop_begin.us 1770 ; 1771 ; CHECK: inner_loop_begin.us: 1772 ; CHECK-NEXT: call void @sink1(i32 %[[B]]) 1773 ; CHECK-NEXT: %[[A:.*]] = load i32, i32* %a.ptr 1774 ; CHECK-NEXT: br label %inner_loop_a.us 1775 ; 1776 ; CHECK: inner_loop_a.us: 1777 ; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr 1778 ; CHECK-NEXT: br i1 %[[V]], label %inner_loop_exit.split.us, label %inner_loop_begin.us 1779 ; 1780 ; CHECK: inner_loop_exit.split.us: 1781 ; CHECK-NEXT: %[[A_INNER_LCSSA_US:.*]] = phi i32 [ %[[A]], %inner_loop_a.us ] 1782 ; CHECK-NEXT: br label %inner_loop_exit 1783 ; 1784 ; The original remains a loop losing the exit edge. 1785 ; 1786 ; CHECK: inner_loop_ph.split: 1787 ; CHECK-NEXT: %[[B_LCSSA:.*]] = phi i32 [ %[[B]], %inner_loop_ph ] 1788 ; CHECK-NEXT: br label %inner_loop_begin 1789 ; 1790 ; CHECK: inner_loop_begin: 1791 ; CHECK-NEXT: call void @sink1(i32 %[[B_LCSSA]]) 1792 ; CHECK-NEXT: %[[A:.*]] = load i32, i32* %a.ptr 1793 ; CHECK-NEXT: br label %loop_exit.loopexit 1794 1795 inner_loop_exit: 1796 %a.inner_lcssa = phi i32 [ %a, %inner_loop_a ] 1797 %v3 = load i1, i1* %ptr 1798 br i1 %v3, label %loop_latch, label %loop_exit 1799 ; CHECK: inner_loop_exit: 1800 ; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr 1801 ; CHECK-NEXT: br i1 %[[V]], label %loop_latch, label %loop_exit.loopexit1 1802 1803 loop_latch: 1804 br label %loop_begin 1805 ; CHECK: loop_latch: 1806 ; CHECK-NEXT: br label %loop_begin 1807 1808 loop_exit: 1809 %a.lcssa = phi i32 [ %a, %inner_loop_begin ], [ %a.inner_lcssa, %inner_loop_exit ] 1810 ret i32 %a.lcssa 1811 ; CHECK: loop_exit.loopexit: 1812 ; CHECK-NEXT: %[[A_LCSSA:.*]] = phi i32 [ %[[A]], %inner_loop_begin ] 1813 ; CHECK-NEXT: br label %loop_exit 1814 ; 1815 ; CHECK: loop_exit.loopexit1: 1816 ; CHECK-NEXT: %[[A_LCSSA_US:.*]] = phi i32 [ %[[A_INNER_LCSSA_US]], %inner_loop_exit ] 1817 ; CHECK-NEXT: br label %loop_exit 1818 ; 1819 ; CHECK: loop_exit: 1820 ; CHECK-NEXT: %[[A_PHI:.*]] = phi i32 [ %[[A_LCSSA]], %loop_exit.loopexit ], [ %[[A_LCSSA_US]], %loop_exit.loopexit1 ] 1821 ; CHECK-NEXT: ret i32 %[[A_PHI]] 1822 } 1823 1824 ; Like test11a, but checking that when the whole thing is wrapped in yet 1825 ; another loop, we correctly attribute the cloned preheader to that outermost 1826 ; loop rather than only handling the case where the preheader is not in any loop 1827 ; at all. 1828 define i32 @test12a(i1* %ptr, i1* %cond.ptr, i32* %a.ptr, i32* %b.ptr) { 1829 ; CHECK-LABEL: @test12a( 1830 entry: 1831 br label %loop_begin 1832 ; CHECK-NEXT: entry: 1833 ; CHECK-NEXT: br label %loop_begin 1834 1835 loop_begin: 1836 br label %inner_loop_begin 1837 ; CHECK: loop_begin: 1838 ; CHECK-NEXT: br label %inner_loop_begin 1839 1840 inner_loop_begin: 1841 %b = load i32, i32* %b.ptr 1842 %v1 = load i1, i1* %ptr 1843 br i1 %v1, label %inner_loop_latch, label %inner_inner_loop_ph 1844 ; CHECK: inner_loop_begin: 1845 ; CHECK-NEXT: %[[B:.*]] = load i32, i32* %b.ptr 1846 ; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr 1847 ; CHECK-NEXT: br i1 %[[V]], label %inner_loop_latch, label %inner_inner_loop_ph 1848 1849 inner_inner_loop_ph: 1850 %cond = load i1, i1* %cond.ptr 1851 br label %inner_inner_loop_begin 1852 ; CHECK: inner_inner_loop_ph: 1853 ; CHECK-NEXT: %[[COND:.*]] = load i1, i1* %cond.ptr 1854 ; CHECK-NEXT: br i1 %[[COND]], label %inner_inner_loop_ph.split.us, label %inner_inner_loop_ph.split 1855 1856 inner_inner_loop_begin: 1857 call void @sink1(i32 %b) 1858 %a = load i32, i32* %a.ptr 1859 br i1 %cond, label %inner_loop_exit, label %inner_inner_loop_a 1860 1861 inner_inner_loop_a: 1862 %v2 = load i1, i1* %ptr 1863 br i1 %v2, label %inner_inner_loop_exit, label %inner_inner_loop_begin 1864 ; The cloned path doesn't actually loop and is an exit from the outer loop as 1865 ; well. 1866 ; 1867 ; CHECK: inner_inner_loop_ph.split.us: 1868 ; CHECK-NEXT: %[[B_LCSSA:.*]] = phi i32 [ %[[B]], %inner_inner_loop_ph ] 1869 ; CHECK-NEXT: br label %inner_inner_loop_begin.us 1870 ; 1871 ; CHECK: inner_inner_loop_begin.us: 1872 ; CHECK-NEXT: call void @sink1(i32 %[[B_LCSSA]]) 1873 ; CHECK-NEXT: %[[A:.*]] = load i32, i32* %a.ptr 1874 ; CHECK-NEXT: br label %inner_loop_exit.loopexit.split.us 1875 ; 1876 ; CHECK: inner_loop_exit.loopexit.split.us: 1877 ; CHECK-NEXT: %[[A_INNER_INNER_LCSSA_US:.*]] = phi i32 [ %[[A]], %inner_inner_loop_begin.us ] 1878 ; CHECK-NEXT: br label %inner_loop_exit.loopexit 1879 ; 1880 ; The original remains a loop losing the exit edge. 1881 ; 1882 ; CHECK: inner_inner_loop_ph.split: 1883 ; CHECK-NEXT: br label %inner_inner_loop_begin 1884 ; 1885 ; CHECK: inner_inner_loop_begin: 1886 ; CHECK-NEXT: call void @sink1(i32 %[[B]]) 1887 ; CHECK-NEXT: %[[A:.*]] = load i32, i32* %a.ptr 1888 ; CHECK-NEXT: br label %inner_inner_loop_a 1889 ; 1890 ; CHECK: inner_inner_loop_a: 1891 ; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr 1892 ; CHECK-NEXT: br i1 %[[V]], label %inner_inner_loop_exit, label %inner_inner_loop_begin 1893 1894 inner_inner_loop_exit: 1895 %a.inner_inner_lcssa = phi i32 [ %a, %inner_inner_loop_a ] 1896 %v3 = load i1, i1* %ptr 1897 br i1 %v3, label %inner_loop_latch, label %inner_loop_exit 1898 ; CHECK: inner_inner_loop_exit: 1899 ; CHECK-NEXT: %[[A_INNER_INNER_LCSSA:.*]] = phi i32 [ %[[A]], %inner_inner_loop_a ] 1900 ; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr 1901 ; CHECK-NEXT: br i1 %[[V]], label %inner_loop_latch, label %inner_loop_exit.loopexit1 1902 1903 inner_loop_latch: 1904 br label %inner_loop_begin 1905 ; CHECK: inner_loop_latch: 1906 ; CHECK-NEXT: br label %inner_loop_begin 1907 1908 inner_loop_exit: 1909 %a.inner_lcssa = phi i32 [ %a, %inner_inner_loop_begin ], [ %a.inner_inner_lcssa, %inner_inner_loop_exit ] 1910 %v4 = load i1, i1* %ptr 1911 br i1 %v4, label %loop_begin, label %loop_exit 1912 ; CHECK: inner_loop_exit.loopexit: 1913 ; CHECK-NEXT: br label %inner_loop_exit 1914 ; 1915 ; CHECK: inner_loop_exit.loopexit1: 1916 ; CHECK-NEXT: %[[A_INNER_LCSSA:.*]] = phi i32 [ %[[A_INNER_INNER_LCSSA]], %inner_inner_loop_exit ] 1917 ; CHECK-NEXT: br label %inner_loop_exit 1918 ; 1919 ; CHECK: inner_loop_exit: 1920 ; CHECK-NEXT: %[[A_INNER_PHI:.*]] = phi i32 [ %[[A_INNER_INNER_LCSSA_US]], %inner_loop_exit.loopexit ], [ %[[A_INNER_LCSSA]], %inner_loop_exit.loopexit1 ] 1921 ; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr 1922 ; CHECK-NEXT: br i1 %[[V]], label %loop_begin, label %loop_exit 1923 1924 loop_exit: 1925 %a.lcssa = phi i32 [ %a.inner_lcssa, %inner_loop_exit ] 1926 ret i32 %a.lcssa 1927 ; CHECK: loop_exit: 1928 ; CHECK-NEXT: %[[A_LCSSA:.*]] = phi i32 [ %[[A_INNER_PHI]], %inner_loop_exit ] 1929 ; CHECK-NEXT: ret i32 %[[A_LCSSA]] 1930 } 1931 1932 ; Like test11b, but checking that when the whole thing is wrapped in yet 1933 ; another loop, we correctly sink the preheader to the outermost loop rather 1934 ; than only handling the case where the preheader is completely removed from 1935 ; a loop. 1936 define i32 @test12b(i1* %ptr, i1* %cond.ptr, i32* %a.ptr, i32* %b.ptr) { 1937 ; CHECK-LABEL: @test12b( 1938 entry: 1939 br label %loop_begin 1940 ; CHECK-NEXT: entry: 1941 ; CHECK-NEXT: br label %loop_begin 1942 1943 loop_begin: 1944 br label %inner_loop_begin 1945 ; CHECK: loop_begin: 1946 ; CHECK-NEXT: br label %inner_loop_begin 1947 1948 inner_loop_begin: 1949 %b = load i32, i32* %b.ptr 1950 %v1 = load i1, i1* %ptr 1951 br i1 %v1, label %inner_loop_latch, label %inner_inner_loop_ph 1952 ; CHECK: inner_loop_begin: 1953 ; CHECK-NEXT: %[[B:.*]] = load i32, i32* %b.ptr 1954 ; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr 1955 ; CHECK-NEXT: br i1 %[[V]], label %inner_loop_latch, label %inner_inner_loop_ph 1956 1957 inner_inner_loop_ph: 1958 %cond = load i1, i1* %cond.ptr 1959 br label %inner_inner_loop_begin 1960 ; CHECK: inner_inner_loop_ph: 1961 ; CHECK-NEXT: %[[COND:.*]] = load i1, i1* %cond.ptr 1962 ; CHECK-NEXT: br i1 %[[COND]], label %inner_inner_loop_ph.split.us, label %inner_inner_loop_ph.split 1963 1964 inner_inner_loop_begin: 1965 call void @sink1(i32 %b) 1966 %a = load i32, i32* %a.ptr 1967 br i1 %cond, label %inner_inner_loop_a, label %inner_loop_exit 1968 1969 inner_inner_loop_a: 1970 %v2 = load i1, i1* %ptr 1971 br i1 %v2, label %inner_inner_loop_exit, label %inner_inner_loop_begin 1972 ; The cloned path continues to loop without the exit out of the entire nest. 1973 ; 1974 ; CHECK: inner_inner_loop_ph.split.us: 1975 ; CHECK-NEXT: br label %inner_inner_loop_begin.us 1976 ; 1977 ; CHECK: inner_inner_loop_begin.us: 1978 ; CHECK-NEXT: call void @sink1(i32 %[[B]]) 1979 ; CHECK-NEXT: %[[A:.*]] = load i32, i32* %a.ptr 1980 ; CHECK-NEXT: br label %inner_inner_loop_a.us 1981 ; 1982 ; CHECK: inner_inner_loop_a.us: 1983 ; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr 1984 ; CHECK-NEXT: br i1 %[[V]], label %inner_inner_loop_exit.split.us, label %inner_inner_loop_begin.us 1985 ; 1986 ; CHECK: inner_inner_loop_exit.split.us: 1987 ; CHECK-NEXT: %[[A_INNER_INNER_LCSSA_US:.*]] = phi i32 [ %[[A]], %inner_inner_loop_a.us ] 1988 ; CHECK-NEXT: br label %inner_inner_loop_exit 1989 ; 1990 ; The original remains a loop losing the exit edge. 1991 ; 1992 ; CHECK: inner_inner_loop_ph.split: 1993 ; CHECK-NEXT: %[[B_LCSSA:.*]] = phi i32 [ %[[B]], %inner_inner_loop_ph ] 1994 ; CHECK-NEXT: br label %inner_inner_loop_begin 1995 ; 1996 ; CHECK: inner_inner_loop_begin: 1997 ; CHECK-NEXT: call void @sink1(i32 %[[B_LCSSA]]) 1998 ; CHECK-NEXT: %[[A:.*]] = load i32, i32* %a.ptr 1999 ; CHECK-NEXT: br label %inner_loop_exit.loopexit 2000 2001 inner_inner_loop_exit: 2002 %a.inner_inner_lcssa = phi i32 [ %a, %inner_inner_loop_a ] 2003 %v3 = load i1, i1* %ptr 2004 br i1 %v3, label %inner_loop_latch, label %inner_loop_exit 2005 ; CHECK: inner_inner_loop_exit: 2006 ; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr 2007 ; CHECK-NEXT: br i1 %[[V]], label %inner_loop_latch, label %inner_loop_exit.loopexit1 2008 2009 inner_loop_latch: 2010 br label %inner_loop_begin 2011 ; CHECK: inner_loop_latch: 2012 ; CHECK-NEXT: br label %inner_loop_begin 2013 2014 inner_loop_exit: 2015 %a.inner_lcssa = phi i32 [ %a, %inner_inner_loop_begin ], [ %a.inner_inner_lcssa, %inner_inner_loop_exit ] 2016 %v4 = load i1, i1* %ptr 2017 br i1 %v4, label %loop_begin, label %loop_exit 2018 ; CHECK: inner_loop_exit.loopexit: 2019 ; CHECK-NEXT: %[[A_INNER_LCSSA:.*]] = phi i32 [ %[[A]], %inner_inner_loop_begin ] 2020 ; CHECK-NEXT: br label %inner_loop_exit 2021 ; 2022 ; CHECK: inner_loop_exit.loopexit1: 2023 ; CHECK-NEXT: %[[A_INNER_LCSSA_US:.*]] = phi i32 [ %[[A_INNER_INNER_LCSSA_US]], %inner_inner_loop_exit ] 2024 ; CHECK-NEXT: br label %inner_loop_exit 2025 ; 2026 ; CHECK: inner_loop_exit: 2027 ; CHECK-NEXT: %[[A_INNER_PHI:.*]] = phi i32 [ %[[A_INNER_LCSSA]], %inner_loop_exit.loopexit ], [ %[[A_INNER_LCSSA_US]], %inner_loop_exit.loopexit1 ] 2028 ; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr 2029 ; CHECK-NEXT: br i1 %[[V]], label %loop_begin, label %loop_exit 2030 2031 loop_exit: 2032 %a.lcssa = phi i32 [ %a.inner_lcssa, %inner_loop_exit ] 2033 ret i32 %a.lcssa 2034 ; CHECK: loop_exit: 2035 ; CHECK-NEXT: %[[A_LCSSA:.*]] = phi i32 [ %[[A_INNER_PHI]], %inner_loop_exit ] 2036 ; CHECK-NEXT: ret i32 %[[A_LCSSA]] 2037 } 2038 2039 ; Test where the cloned loop has an inner loop that has to be traversed to form 2040 ; the cloned loop, and where this inner loop has multiple blocks, and where the 2041 ; exiting block that connects the inner loop to the cloned loop is not the header 2042 ; block. This ensures that we correctly handle interesting corner cases of 2043 ; traversing back to the header when establishing the cloned loop. 2044 define i32 @test13a(i1* %ptr, i1 %cond, i32* %a.ptr, i32* %b.ptr) { 2045 ; CHECK-LABEL: @test13a( 2046 entry: 2047 br label %loop_begin 2048 ; CHECK-NEXT: entry: 2049 ; CHECK-NEXT: br i1 %cond, label %entry.split.us, label %entry.split 2050 2051 loop_begin: 2052 %a = load i32, i32* %a.ptr 2053 %v1 = load i1, i1* %ptr 2054 br i1 %v1, label %loop_a, label %loop_b 2055 2056 loop_a: 2057 %v2 = load i1, i1* %ptr 2058 br i1 %v2, label %loop_exit, label %loop_latch 2059 2060 loop_b: 2061 %b = load i32, i32* %b.ptr 2062 br i1 %cond, label %loop_b_inner_ph, label %loop_exit 2063 2064 loop_b_inner_ph: 2065 br label %loop_b_inner_header 2066 2067 loop_b_inner_header: 2068 %v3 = load i1, i1* %ptr 2069 br i1 %v3, label %loop_b_inner_latch, label %loop_b_inner_body 2070 2071 loop_b_inner_body: 2072 %v4 = load i1, i1* %ptr 2073 br i1 %v4, label %loop_b_inner_latch, label %loop_b_inner_exit 2074 2075 loop_b_inner_latch: 2076 br label %loop_b_inner_header 2077 2078 loop_b_inner_exit: 2079 br label %loop_latch 2080 2081 loop_latch: 2082 br label %loop_begin 2083 ; The cloned loop contains an inner loop within it. 2084 ; 2085 ; CHECK: entry.split.us: 2086 ; CHECK-NEXT: br label %loop_begin.us 2087 ; 2088 ; CHECK: loop_begin.us: 2089 ; CHECK-NEXT: %[[A:.*]] = load i32, i32* %a.ptr 2090 ; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr 2091 ; CHECK-NEXT: br i1 %[[V]], label %loop_a.us, label %loop_b.us 2092 ; 2093 ; CHECK: loop_b.us: 2094 ; CHECK-NEXT: %[[B:.*]] = load i32, i32* %b.ptr 2095 ; CHECK-NEXT: br label %loop_b_inner_ph.us 2096 ; 2097 ; CHECK: loop_b_inner_ph.us: 2098 ; CHECK-NEXT: br label %loop_b_inner_header.us 2099 ; 2100 ; CHECK: loop_b_inner_header.us: 2101 ; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr 2102 ; CHECK-NEXT: br i1 %[[V]], label %loop_b_inner_latch.us, label %loop_b_inner_body.us 2103 ; 2104 ; CHECK: loop_b_inner_body.us: 2105 ; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr 2106 ; CHECK-NEXT: br i1 %[[V]], label %loop_b_inner_latch.us, label %loop_b_inner_exit.us 2107 ; 2108 ; CHECK: loop_b_inner_exit.us: 2109 ; CHECK-NEXT: br label %loop_latch.us 2110 ; 2111 ; CHECK: loop_b_inner_latch.us: 2112 ; CHECK-NEXT: br label %loop_b_inner_header.us 2113 ; 2114 ; CHECK: loop_a.us: 2115 ; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr 2116 ; CHECK-NEXT: br i1 %[[V]], label %loop_exit.split.us, label %loop_latch.us 2117 ; 2118 ; CHECK: loop_latch.us: 2119 ; CHECK-NEXT: br label %loop_begin.us 2120 ; 2121 ; CHECK: loop_exit.split.us: 2122 ; CHECK-NEXT: %[[A_LCSSA_US:.*]] = phi i32 [ %[[A]], %loop_a.us ] 2123 ; CHECK-NEXT: br label %loop_exit 2124 ; 2125 ; And the original loop no longer contains an inner loop. 2126 ; 2127 ; CHECK: entry.split: 2128 ; CHECK-NEXT: br label %loop_begin 2129 ; 2130 ; CHECK: loop_begin: 2131 ; CHECK-NEXT: %[[A:.*]] = load i32, i32* %a.ptr 2132 ; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr 2133 ; CHECK-NEXT: br i1 %[[V]], label %loop_a, label %loop_b 2134 ; 2135 ; CHECK: loop_a: 2136 ; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr 2137 ; CHECK-NEXT: br i1 %[[V]], label %loop_exit.split.loopexit, label %loop_latch 2138 ; 2139 ; CHECK: loop_b: 2140 ; CHECK-NEXT: %[[B:.*]] = load i32, i32* %b.ptr 2141 ; CHECK-NEXT: br label %loop_exit.split 2142 ; 2143 ; CHECK: loop_latch: 2144 ; CHECK-NEXT: br label %loop_begin 2145 2146 loop_exit: 2147 %lcssa = phi i32 [ %a, %loop_a ], [ %b, %loop_b ] 2148 ret i32 %lcssa 2149 ; CHECK: loop_exit.split.loopexit: 2150 ; CHECK-NEXT: %[[A_LCSSA:.*]] = phi i32 [ %[[A]], %loop_a ] 2151 ; CHECK-NEXT: br label %loop_exit.split 2152 ; 2153 ; CHECK: loop_exit.split: 2154 ; CHECK-NEXT: %[[AB_PHI:.*]] = phi i32 [ %[[B]], %loop_b ], [ %[[A_LCSSA]], %loop_exit.split.loopexit ] 2155 ; CHECK-NEXT: br label %loop_exit 2156 ; 2157 ; CHECK: loop_exit: 2158 ; CHECK-NEXT: %[[AB_PHI_US:.*]] = phi i32 [ %[[AB_PHI]], %loop_exit.split ], [ %[[A_LCSSA_US]], %loop_exit.split.us ] 2159 ; CHECK-NEXT: ret i32 %[[AB_PHI_US]] 2160 } 2161 2162 ; Test where the original loop has an inner loop that has to be traversed to 2163 ; rebuild the loop, and where this inner loop has multiple blocks, and where 2164 ; the exiting block that connects the inner loop to the original loop is not 2165 ; the header block. This ensures that we correctly handle interesting corner 2166 ; cases of traversing back to the header when re-establishing the original loop 2167 ; still exists after unswitching. 2168 define i32 @test13b(i1* %ptr, i1 %cond, i32* %a.ptr, i32* %b.ptr) { 2169 ; CHECK-LABEL: @test13b( 2170 entry: 2171 br label %loop_begin 2172 ; CHECK-NEXT: entry: 2173 ; CHECK-NEXT: br i1 %cond, label %entry.split.us, label %entry.split 2174 2175 loop_begin: 2176 %a = load i32, i32* %a.ptr 2177 %v1 = load i1, i1* %ptr 2178 br i1 %v1, label %loop_a, label %loop_b 2179 2180 loop_a: 2181 %v2 = load i1, i1* %ptr 2182 br i1 %v2, label %loop_exit, label %loop_latch 2183 2184 loop_b: 2185 %b = load i32, i32* %b.ptr 2186 br i1 %cond, label %loop_exit, label %loop_b_inner_ph 2187 2188 loop_b_inner_ph: 2189 br label %loop_b_inner_header 2190 2191 loop_b_inner_header: 2192 %v3 = load i1, i1* %ptr 2193 br i1 %v3, label %loop_b_inner_latch, label %loop_b_inner_body 2194 2195 loop_b_inner_body: 2196 %v4 = load i1, i1* %ptr 2197 br i1 %v4, label %loop_b_inner_latch, label %loop_b_inner_exit 2198 2199 loop_b_inner_latch: 2200 br label %loop_b_inner_header 2201 2202 loop_b_inner_exit: 2203 br label %loop_latch 2204 2205 loop_latch: 2206 br label %loop_begin 2207 ; The cloned loop doesn't contain an inner loop. 2208 ; 2209 ; CHECK: entry.split.us: 2210 ; CHECK-NEXT: br label %loop_begin.us 2211 ; 2212 ; CHECK: loop_begin.us: 2213 ; CHECK-NEXT: %[[A:.*]] = load i32, i32* %a.ptr 2214 ; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr 2215 ; CHECK-NEXT: br i1 %[[V]], label %loop_a.us, label %loop_b.us 2216 ; 2217 ; CHECK: loop_b.us: 2218 ; CHECK-NEXT: %[[B:.*]] = load i32, i32* %b.ptr 2219 ; CHECK-NEXT: br label %loop_exit.split.us 2220 ; 2221 ; CHECK: loop_a.us: 2222 ; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr 2223 ; CHECK-NEXT: br i1 %[[V]], label %loop_exit.split.us.loopexit, label %loop_latch.us 2224 ; 2225 ; CHECK: loop_latch.us: 2226 ; CHECK-NEXT: br label %loop_begin.us 2227 ; 2228 ; CHECK: loop_exit.split.us.loopexit: 2229 ; CHECK-NEXT: %[[A_LCSSA_US:.*]] = phi i32 [ %[[A]], %loop_a.us ] 2230 ; CHECK-NEXT: br label %loop_exit.split.us 2231 ; 2232 ; CHECK: loop_exit.split.us: 2233 ; CHECK-NEXT: %[[AB_PHI_US:.*]] = phi i32 [ %[[B]], %loop_b.us ], [ %[[A_LCSSA_US]], %loop_exit.split.us.loopexit ] 2234 ; CHECK-NEXT: br label %loop_exit 2235 ; 2236 ; But the original loop contains an inner loop that must be traversed.; 2237 ; 2238 ; CHECK: entry.split: 2239 ; CHECK-NEXT: br label %loop_begin 2240 ; 2241 ; CHECK: loop_begin: 2242 ; CHECK-NEXT: %[[A:.*]] = load i32, i32* %a.ptr 2243 ; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr 2244 ; CHECK-NEXT: br i1 %[[V]], label %loop_a, label %loop_b 2245 ; 2246 ; CHECK: loop_a: 2247 ; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr 2248 ; CHECK-NEXT: br i1 %[[V]], label %loop_exit.split, label %loop_latch 2249 ; 2250 ; CHECK: loop_b: 2251 ; CHECK-NEXT: %[[B:.*]] = load i32, i32* %b.ptr 2252 ; CHECK-NEXT: br label %loop_b_inner_ph 2253 ; 2254 ; CHECK: loop_b_inner_ph: 2255 ; CHECK-NEXT: br label %loop_b_inner_header 2256 ; 2257 ; CHECK: loop_b_inner_header: 2258 ; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr 2259 ; CHECK-NEXT: br i1 %[[V]], label %loop_b_inner_latch, label %loop_b_inner_body 2260 ; 2261 ; CHECK: loop_b_inner_body: 2262 ; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr 2263 ; CHECK-NEXT: br i1 %[[V]], label %loop_b_inner_latch, label %loop_b_inner_exit 2264 ; 2265 ; CHECK: loop_b_inner_latch: 2266 ; CHECK-NEXT: br label %loop_b_inner_header 2267 ; 2268 ; CHECK: loop_b_inner_exit: 2269 ; CHECK-NEXT: br label %loop_latch 2270 ; 2271 ; CHECK: loop_latch: 2272 ; CHECK-NEXT: br label %loop_begin 2273 2274 loop_exit: 2275 %lcssa = phi i32 [ %a, %loop_a ], [ %b, %loop_b ] 2276 ret i32 %lcssa 2277 ; CHECK: loop_exit.split: 2278 ; CHECK-NEXT: %[[A_LCSSA:.*]] = phi i32 [ %[[A]], %loop_a ] 2279 ; CHECK-NEXT: br label %loop_exit 2280 ; 2281 ; CHECK: loop_exit: 2282 ; CHECK-NEXT: %[[AB_PHI:.*]] = phi i32 [ %[[A_LCSSA]], %loop_exit.split ], [ %[[AB_PHI_US]], %loop_exit.split.us ] 2283 ; CHECK-NEXT: ret i32 %[[AB_PHI]] 2284 } 2285 2286 define i32 @test20(i32* %var, i32 %cond1, i32 %cond2) { 2287 ; CHECK-LABEL: @test20( 2288 entry: 2289 br label %loop_begin 2290 ; CHECK-NEXT: entry: 2291 ; CHECK-NEXT: switch i32 %cond2, label %[[ENTRY_SPLIT_EXIT:.*]] [ 2292 ; CHECK-NEXT: i32 0, label %[[ENTRY_SPLIT_A:.*]] 2293 ; CHECK-NEXT: i32 1, label %[[ENTRY_SPLIT_A]] 2294 ; CHECK-NEXT: i32 13, label %[[ENTRY_SPLIT_B:.*]] 2295 ; CHECK-NEXT: i32 2, label %[[ENTRY_SPLIT_A]] 2296 ; CHECK-NEXT: i32 42, label %[[ENTRY_SPLIT_C:.*]] 2297 ; CHECK-NEXT: ] 2298 2299 loop_begin: 2300 %var_val = load i32, i32* %var 2301 switch i32 %cond2, label %loop_exit [ 2302 i32 0, label %loop_a 2303 i32 1, label %loop_a 2304 i32 13, label %loop_b 2305 i32 2, label %loop_a 2306 i32 42, label %loop_c 2307 ] 2308 2309 loop_a: 2310 call i32 @a() 2311 br label %loop_latch 2312 ; Unswitched 'a' loop. 2313 ; 2314 ; CHECK: [[ENTRY_SPLIT_A]]: 2315 ; CHECK-NEXT: br label %[[LOOP_BEGIN_A:.*]] 2316 ; 2317 ; CHECK: [[LOOP_BEGIN_A]]: 2318 ; CHECK-NEXT: %{{.*}} = load i32, i32* %var 2319 ; CHECK-NEXT: br label %[[LOOP_A:.*]] 2320 ; 2321 ; CHECK: [[LOOP_A]]: 2322 ; CHECK-NEXT: call i32 @a() 2323 ; CHECK-NEXT: br label %[[LOOP_LATCH_A:.*]] 2324 ; 2325 ; CHECK: [[LOOP_LATCH_A]]: 2326 ; CHECK: br label %[[LOOP_BEGIN_A]] 2327 2328 loop_b: 2329 call i32 @b() 2330 br label %loop_latch 2331 ; Unswitched 'b' loop. 2332 ; 2333 ; CHECK: [[ENTRY_SPLIT_B]]: 2334 ; CHECK-NEXT: br label %[[LOOP_BEGIN_B:.*]] 2335 ; 2336 ; CHECK: [[LOOP_BEGIN_B]]: 2337 ; CHECK-NEXT: %{{.*}} = load i32, i32* %var 2338 ; CHECK-NEXT: br label %[[LOOP_B:.*]] 2339 ; 2340 ; CHECK: [[LOOP_B]]: 2341 ; CHECK-NEXT: call i32 @b() 2342 ; CHECK-NEXT: br label %[[LOOP_LATCH_B:.*]] 2343 ; 2344 ; CHECK: [[LOOP_LATCH_B]]: 2345 ; CHECK: br label %[[LOOP_BEGIN_B]] 2346 2347 loop_c: 2348 call i32 @c() noreturn nounwind 2349 br label %loop_latch 2350 ; Unswitched 'c' loop. 2351 ; 2352 ; CHECK: [[ENTRY_SPLIT_C]]: 2353 ; CHECK-NEXT: br label %[[LOOP_BEGIN_C:.*]] 2354 ; 2355 ; CHECK: [[LOOP_BEGIN_C]]: 2356 ; CHECK-NEXT: %{{.*}} = load i32, i32* %var 2357 ; CHECK-NEXT: br label %[[LOOP_C:.*]] 2358 ; 2359 ; CHECK: [[LOOP_C]]: 2360 ; CHECK-NEXT: call i32 @c() 2361 ; CHECK-NEXT: br label %[[LOOP_LATCH_C:.*]] 2362 ; 2363 ; CHECK: [[LOOP_LATCH_C]]: 2364 ; CHECK: br label %[[LOOP_BEGIN_C]] 2365 2366 loop_latch: 2367 br label %loop_begin 2368 2369 loop_exit: 2370 %lcssa = phi i32 [ %var_val, %loop_begin ] 2371 ret i32 %lcssa 2372 ; Unswitched exit edge (no longer a loop). 2373 ; 2374 ; CHECK: [[ENTRY_SPLIT_EXIT]]: 2375 ; CHECK-NEXT: br label %loop_begin 2376 ; 2377 ; CHECK: loop_begin: 2378 ; CHECK-NEXT: %[[V:.*]] = load i32, i32* %var 2379 ; CHECK-NEXT: br label %loop_exit 2380 ; 2381 ; CHECK: loop_exit: 2382 ; CHECK-NEXT: %[[LCSSA:.*]] = phi i32 [ %[[V]], %loop_begin ] 2383 ; CHECK-NEXT: ret i32 %[[LCSSA]] 2384 } 2385 2386 ; Negative test: we do not switch when the loop contains unstructured control 2387 ; flows as it would significantly complicate the process as novel loops might 2388 ; be formed, etc. 2389 define void @test_no_unswitch_unstructured_cfg(i1* %ptr, i1 %cond) { 2390 ; CHECK-LABEL: @test_no_unswitch_unstructured_cfg( 2391 entry: 2392 br label %loop_begin 2393 2394 loop_begin: 2395 br i1 %cond, label %loop_left, label %loop_right 2396 2397 loop_left: 2398 %v1 = load i1, i1* %ptr 2399 br i1 %v1, label %loop_right, label %loop_merge 2400 2401 loop_right: 2402 %v2 = load i1, i1* %ptr 2403 br i1 %v2, label %loop_left, label %loop_merge 2404 2405 loop_merge: 2406 %v3 = load i1, i1* %ptr 2407 br i1 %v3, label %loop_latch, label %loop_exit 2408 2409 loop_latch: 2410 br label %loop_begin 2411 2412 loop_exit: 2413 ret void 2414 } 2415 2416 ; A test reduced out of 403.gcc with interesting nested loops that trigger 2417 ; multiple unswitches. A key component of this test is that there are multiple 2418 ; paths to reach an inner loop after unswitching, and one of them is via the 2419 ; predecessors of the unswitched loop header. That can allow us to find the loop 2420 ; through multiple different paths. 2421 define void @test21(i1 %a, i1 %b) { 2422 ; CHECK-LABEL: @test21( 2423 bb: 2424 br label %bb3 2425 ; CHECK-NOT: br i1 %a 2426 ; 2427 ; CHECK: br i1 %a, label %[[BB_SPLIT_US:.*]], label %[[BB_SPLIT:.*]] 2428 ; 2429 ; CHECK-NOT: br i1 %a 2430 ; CHECK-NOT: br i1 %b 2431 ; 2432 ; CHECK: [[BB_SPLIT]]: 2433 ; CHECK: br i1 %b 2434 ; 2435 ; CHECK-NOT: br i1 %a 2436 ; CHECK-NOT: br i1 %b 2437 2438 bb3: 2439 %tmp1.0 = phi i32 [ 0, %bb ], [ %tmp1.3, %bb23 ] 2440 br label %bb7 2441 2442 bb7: 2443 %tmp.0 = phi i1 [ true, %bb3 ], [ false, %bb19 ] 2444 %tmp1.1 = phi i32 [ %tmp1.0, %bb3 ], [ %tmp1.2.lcssa, %bb19 ] 2445 br i1 %tmp.0, label %bb11.preheader, label %bb23 2446 2447 bb11.preheader: 2448 br i1 %a, label %bb19, label %bb14.lr.ph 2449 2450 bb14.lr.ph: 2451 br label %bb14 2452 2453 bb14: 2454 %tmp2.02 = phi i32 [ 0, %bb14.lr.ph ], [ 1, %bb14 ] 2455 br i1 %b, label %bb11.bb19_crit_edge, label %bb14 2456 2457 bb11.bb19_crit_edge: 2458 %split = phi i32 [ %tmp2.02, %bb14 ] 2459 br label %bb19 2460 2461 bb19: 2462 %tmp1.2.lcssa = phi i32 [ %split, %bb11.bb19_crit_edge ], [ %tmp1.1, %bb11.preheader ] 2463 %tmp21 = icmp eq i32 %tmp1.2.lcssa, 0 2464 br i1 %tmp21, label %bb23, label %bb7 2465 2466 bb23: 2467 %tmp1.3 = phi i32 [ %tmp1.2.lcssa, %bb19 ], [ %tmp1.1, %bb7 ] 2468 br label %bb3 2469 } 2470 2471 ; A test reduced out of 400.perlbench that when unswitching the `%stop` 2472 ; condition clones a loop nest outside of a containing loop. This excercises a 2473 ; different cloning path from our other test cases and in turn verifying the 2474 ; resulting structure can catch any failures to correctly clone these nested 2475 ; loops. 2476 declare void @f() 2477 declare void @g() 2478 declare i32 @h(i32 %arg) 2479 define void @test22(i32 %arg) { 2480 ; CHECK-LABEL: define void @test22( 2481 entry: 2482 br label %loop1.header 2483 2484 loop1.header: 2485 %stop = phi i1 [ true, %loop1.latch ], [ false, %entry ] 2486 %i = phi i32 [ %i.lcssa, %loop1.latch ], [ %arg, %entry ] 2487 ; CHECK: %[[I:.*]] = phi i32 [ %{{.*}}, %loop1.latch ], [ %arg, %entry ] 2488 br i1 %stop, label %loop1.exit, label %loop1.body.loop2.ph 2489 ; CHECK: br i1 %stop, label %loop1.exit, label %loop1.body.loop2.ph 2490 2491 loop1.body.loop2.ph: 2492 br label %loop2.header 2493 ; Just check that the we unswitched the key condition and that leads to the 2494 ; inner loop header. 2495 ; 2496 ; CHECK: loop1.body.loop2.ph: 2497 ; CHECK-NEXT: br i1 %stop, label %[[SPLIT_US:.*]], label %[[SPLIT:.*]] 2498 ; 2499 ; CHECK: [[SPLIT_US]]: 2500 ; CHECK-NEXT: br label %[[LOOP2_HEADER_US:.*]] 2501 ; 2502 ; CHECK: [[LOOP2_HEADER_US]]: 2503 ; CHECK-NEXT: %{{.*}} = phi i32 [ %[[I]], %[[SPLIT_US]] ] 2504 ; 2505 ; CHECK: [[SPLIT]]: 2506 ; CHECK-NEXT: br label %[[LOOP2_HEADER:.*]] 2507 ; 2508 ; CHECK: [[LOOP2_HEADER]]: 2509 ; CHECK-NEXT: %{{.*}} = phi i32 [ %[[I]], %[[SPLIT]] ] 2510 2511 loop2.header: 2512 %i.inner = phi i32 [ %i, %loop1.body.loop2.ph ], [ %i.next, %loop2.latch ] 2513 br label %loop3.header 2514 2515 loop3.header: 2516 %sw = call i32 @h(i32 %i.inner) 2517 switch i32 %sw, label %loop3.exit [ 2518 i32 32, label %loop3.header 2519 i32 59, label %loop2.latch 2520 i32 36, label %loop1.latch 2521 ] 2522 2523 loop2.latch: 2524 %i.next = add i32 %i.inner, 1 2525 br i1 %stop, label %loop2.exit, label %loop2.header 2526 2527 loop1.latch: 2528 %i.lcssa = phi i32 [ %i.inner, %loop3.header ] 2529 br label %loop1.header 2530 2531 loop3.exit: 2532 call void @f() 2533 ret void 2534 2535 loop2.exit: 2536 call void @g() 2537 ret void 2538 2539 loop1.exit: 2540 call void @g() 2541 ret void 2542 } 2543 2544 ; Test that when we are unswitching and need to rebuild the loop block set we 2545 ; correctly skip past inner loops. We want to use the inner loop to efficiently 2546 ; skip whole subregions of the outer loop blocks but just because the header of 2547 ; the outer loop is also the preheader of an inner loop shouldn't confuse this 2548 ; walk. 2549 define void @test23(i1 %arg, i1* %ptr) { 2550 ; CHECK-LABEL: define void @test23( 2551 entry: 2552 br label %outer.header 2553 ; CHECK: entry: 2554 ; CHECK-NEXT: br i1 %arg, 2555 ; 2556 ; Just verify that we unswitched the correct bits. We should call `@f` twice in 2557 ; one unswitch and `@f` and then `@g` in the other. 2558 ; CHECK: call void 2559 ; CHECK-SAME: @f 2560 ; CHECK: call void 2561 ; CHECK-SAME: @f 2562 ; 2563 ; CHECK: call void 2564 ; CHECK-SAME: @f 2565 ; CHECK: call void 2566 ; CHECK-SAME: @g 2567 2568 outer.header: 2569 br label %inner.header 2570 2571 inner.header: 2572 call void @f() 2573 br label %inner.latch 2574 2575 inner.latch: 2576 %inner.cond = load i1, i1* %ptr 2577 br i1 %inner.cond, label %inner.header, label %outer.body 2578 2579 outer.body: 2580 br i1 %arg, label %outer.body.left, label %outer.body.right 2581 2582 outer.body.left: 2583 call void @f() 2584 br label %outer.latch 2585 2586 outer.body.right: 2587 call void @g() 2588 br label %outer.latch 2589 2590 outer.latch: 2591 %outer.cond = load i1, i1* %ptr 2592 br i1 %outer.cond, label %outer.header, label %exit 2593 2594 exit: 2595 ret void 2596 } 2597 2598 ; Non-trivial loop unswitching where there are two invariant conditions, but the 2599 ; second one is only in the cloned copy of the loop after unswitching. 2600 define i32 @test24(i1* %ptr, i1 %cond1, i1 %cond2) { 2601 ; CHECK-LABEL: @test24( 2602 entry: 2603 br label %loop_begin 2604 ; CHECK-NEXT: entry: 2605 ; CHECK-NEXT: br i1 %cond1, label %entry.split.us, label %entry.split 2606 2607 loop_begin: 2608 br i1 %cond1, label %loop_a, label %loop_b 2609 2610 loop_a: 2611 br i1 %cond2, label %loop_a_a, label %loop_a_c 2612 ; The second unswitched condition. 2613 ; 2614 ; CHECK: entry.split.us: 2615 ; CHECK-NEXT: br i1 %cond2, label %entry.split.us.split.us, label %entry.split.us.split 2616 2617 loop_a_a: 2618 call i32 @a() 2619 br label %latch 2620 ; The 'loop_a_a' unswitched loop. 2621 ; 2622 ; CHECK: entry.split.us.split.us: 2623 ; CHECK-NEXT: br label %loop_begin.us.us 2624 ; 2625 ; CHECK: loop_begin.us.us: 2626 ; CHECK-NEXT: br label %loop_a.us.us 2627 ; 2628 ; CHECK: loop_a.us.us: 2629 ; CHECK-NEXT: br label %loop_a_a.us.us 2630 ; 2631 ; CHECK: loop_a_a.us.us: 2632 ; CHECK-NEXT: call i32 @a() 2633 ; CHECK-NEXT: br label %latch.us.us 2634 ; 2635 ; CHECK: latch.us.us: 2636 ; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr 2637 ; CHECK-NEXT: br i1 %[[V]], label %loop_begin.us.us, label %loop_exit.split.us.split.us 2638 ; 2639 ; CHECK: loop_exit.split.us.split.us: 2640 ; CHECK-NEXT: br label %loop_exit.split 2641 2642 loop_a_c: 2643 call i32 @c() 2644 br label %latch 2645 ; The 'loop_a_c' unswitched loop. 2646 ; 2647 ; CHECK: entry.split.us.split: 2648 ; CHECK-NEXT: br label %loop_begin.us 2649 ; 2650 ; CHECK: loop_begin.us: 2651 ; CHECK-NEXT: br label %loop_a.us 2652 ; 2653 ; CHECK: loop_a.us: 2654 ; CHECK-NEXT: br label %loop_a_c.us 2655 ; 2656 ; CHECK: loop_a_c.us: 2657 ; CHECK-NEXT: call i32 @c() 2658 ; CHECK-NEXT: br label %latch 2659 ; 2660 ; CHECK: latch.us: 2661 ; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr 2662 ; CHECK-NEXT: br i1 %[[V]], label %loop_begin.us, label %loop_exit.split.us.split 2663 ; 2664 ; CHECK: loop_exit.split.us.split: 2665 ; CHECK-NEXT: br label %loop_exit.split 2666 2667 loop_b: 2668 call i32 @b() 2669 br label %latch 2670 ; The 'loop_b' unswitched loop. 2671 ; 2672 ; CHECK: entry.split: 2673 ; CHECK-NEXT: br label %loop_begin 2674 ; 2675 ; CHECK: loop_begin: 2676 ; CHECK-NEXT: br label %loop_b 2677 ; 2678 ; CHECK: loop_b: 2679 ; CHECK-NEXT: call i32 @b() 2680 ; CHECK-NEXT: br label %latch 2681 ; 2682 ; CHECK: latch: 2683 ; CHECK-NEXT: %[[V:.*]] = load i1, i1* %ptr 2684 ; CHECK-NEXT: br i1 %[[V]], label %loop_begin, label %loop_exit.split 2685 ; 2686 ; CHECK: loop_exit.split: 2687 ; CHECK-NEXT: br label %loop_exit 2688 2689 latch: 2690 %v = load i1, i1* %ptr 2691 br i1 %v, label %loop_begin, label %loop_exit 2692 2693 loop_exit: 2694 ret i32 0 2695 ; CHECK: loop_exit: 2696 ; CHECK-NEXT: ret 2697 } 2698 2699 ; Non-trivial partial loop unswitching of an invariant input to an 'or'. 2700 define i32 @test25(i1* %ptr, i1 %cond) { 2701 ; CHECK-LABEL: @test25( 2702 entry: 2703 br label %loop_begin 2704 ; CHECK-NEXT: entry: 2705 ; CHECK-NEXT: br i1 %cond, label %entry.split.us, label %entry.split 2706 2707 loop_begin: 2708 %v1 = load i1, i1* %ptr 2709 %cond_or = or i1 %v1, %cond 2710 br i1 %cond_or, label %loop_a, label %loop_b 2711 2712 loop_a: 2713 call i32 @a() 2714 br label %latch 2715 ; The 'loop_a' unswitched loop. 2716 ; 2717 ; CHECK: entry.split.us: 2718 ; CHECK-NEXT: br label %loop_begin.us 2719 ; 2720 ; CHECK: loop_begin.us: 2721 ; CHECK-NEXT: %[[V1_US:.*]] = load i1, i1* %ptr 2722 ; CHECK-NEXT: %[[OR_US:.*]] = or i1 %[[V1_US]], true 2723 ; CHECK-NEXT: br label %loop_a.us 2724 ; 2725 ; CHECK: loop_a.us: 2726 ; CHECK-NEXT: call i32 @a() 2727 ; CHECK-NEXT: br label %latch.us 2728 ; 2729 ; CHECK: latch.us: 2730 ; CHECK-NEXT: %[[V2_US:.*]] = load i1, i1* %ptr 2731 ; CHECK-NEXT: br i1 %[[V2_US]], label %loop_begin.us, label %loop_exit.split.us 2732 ; 2733 ; CHECK: loop_exit.split.us: 2734 ; CHECK-NEXT: br label %loop_exit 2735 2736 loop_b: 2737 call i32 @b() 2738 br label %latch 2739 ; The original loop. 2740 ; 2741 ; CHECK: entry.split: 2742 ; CHECK-NEXT: br label %loop_begin 2743 ; 2744 ; CHECK: loop_begin: 2745 ; CHECK-NEXT: %[[V1:.*]] = load i1, i1* %ptr 2746 ; CHECK-NEXT: %[[OR:.*]] = or i1 %[[V1]], false 2747 ; CHECK-NEXT: br i1 %[[OR]], label %loop_a, label %loop_b 2748 ; 2749 ; CHECK: loop_a: 2750 ; CHECK-NEXT: call i32 @a() 2751 ; CHECK-NEXT: br label %latch 2752 ; 2753 ; CHECK: loop_b: 2754 ; CHECK-NEXT: call i32 @b() 2755 ; CHECK-NEXT: br label %latch 2756 2757 latch: 2758 %v2 = load i1, i1* %ptr 2759 br i1 %v2, label %loop_begin, label %loop_exit 2760 ; CHECK: latch: 2761 ; CHECK-NEXT: %[[V2:.*]] = load i1, i1* %ptr 2762 ; CHECK-NEXT: br i1 %[[V2]], label %loop_begin, label %loop_exit.split 2763 2764 loop_exit: 2765 ret i32 0 2766 ; CHECK: loop_exit.split: 2767 ; CHECK-NEXT: br label %loop_exit 2768 ; 2769 ; CHECK: loop_exit: 2770 ; CHECK-NEXT: ret 2771 } 2772 2773 ; Non-trivial partial loop unswitching of multiple invariant inputs to an `and` 2774 ; chain. 2775 define i32 @test26(i1* %ptr1, i1* %ptr2, i1* %ptr3, i1 %cond1, i1 %cond2, i1 %cond3) { 2776 ; CHECK-LABEL: @test26( 2777 entry: 2778 br label %loop_begin 2779 ; CHECK-NEXT: entry: 2780 ; CHECK-NEXT: %[[INV_AND:.*]] = and i1 %cond3, %cond1 2781 ; CHECK-NEXT: br i1 %[[INV_AND]], label %entry.split, label %entry.split.us 2782 2783 loop_begin: 2784 %v1 = load i1, i1* %ptr1 2785 %v2 = load i1, i1* %ptr2 2786 %cond_and1 = and i1 %v1, %cond1 2787 %cond_or1 = or i1 %v2, %cond2 2788 %cond_and2 = and i1 %cond_and1, %cond_or1 2789 %cond_and3 = and i1 %cond_and2, %cond3 2790 br i1 %cond_and3, label %loop_a, label %loop_b 2791 ; The 'loop_b' unswitched loop. 2792 ; 2793 ; CHECK: entry.split.us: 2794 ; CHECK-NEXT: br label %loop_begin.us 2795 ; 2796 ; CHECK: loop_begin.us: 2797 ; CHECK-NEXT: %[[V1_US:.*]] = load i1, i1* %ptr1 2798 ; CHECK-NEXT: %[[V2_US:.*]] = load i1, i1* %ptr2 2799 ; CHECK-NEXT: %[[AND1_US:.*]] = and i1 %[[V1_US]], false 2800 ; CHECK-NEXT: %[[OR1_US:.*]] = or i1 %[[V2_US]], %cond2 2801 ; CHECK-NEXT: %[[AND2_US:.*]] = and i1 %[[AND1_US]], %[[OR1_US]] 2802 ; CHECK-NEXT: %[[AND3_US:.*]] = and i1 %[[AND2_US]], false 2803 ; CHECK-NEXT: br label %loop_b.us 2804 ; 2805 ; CHECK: loop_b.us: 2806 ; CHECK-NEXT: call i32 @b() 2807 ; CHECK-NEXT: br label %latch.us 2808 ; 2809 ; CHECK: latch.us: 2810 ; CHECK-NEXT: %[[V3_US:.*]] = load i1, i1* %ptr3 2811 ; CHECK-NEXT: br i1 %[[V3_US]], label %loop_begin.us, label %loop_exit.split.us 2812 ; 2813 ; CHECK: loop_exit.split.us: 2814 ; CHECK-NEXT: br label %loop_exit 2815 2816 ; The original loop. 2817 ; 2818 ; CHECK: entry.split: 2819 ; CHECK-NEXT: br label %loop_begin 2820 ; 2821 ; CHECK: loop_begin: 2822 ; CHECK-NEXT: %[[V1:.*]] = load i1, i1* %ptr1 2823 ; CHECK-NEXT: %[[V2:.*]] = load i1, i1* %ptr2 2824 ; CHECK-NEXT: %[[AND1:.*]] = and i1 %[[V1]], true 2825 ; CHECK-NEXT: %[[OR1:.*]] = or i1 %[[V2]], %cond2 2826 ; CHECK-NEXT: %[[AND2:.*]] = and i1 %[[AND1]], %[[OR1]] 2827 ; CHECK-NEXT: %[[AND3:.*]] = and i1 %[[AND2]], true 2828 ; CHECK-NEXT: br i1 %[[AND3]], label %loop_a, label %loop_b 2829 2830 loop_a: 2831 call i32 @a() 2832 br label %latch 2833 ; CHECK: loop_a: 2834 ; CHECK-NEXT: call i32 @a() 2835 ; CHECK-NEXT: br label %latch 2836 2837 loop_b: 2838 call i32 @b() 2839 br label %latch 2840 ; CHECK: loop_b: 2841 ; CHECK-NEXT: call i32 @b() 2842 ; CHECK-NEXT: br label %latch 2843 2844 latch: 2845 %v3 = load i1, i1* %ptr3 2846 br i1 %v3, label %loop_begin, label %loop_exit 2847 ; CHECK: latch: 2848 ; CHECK-NEXT: %[[V3:.*]] = load i1, i1* %ptr3 2849 ; CHECK-NEXT: br i1 %[[V3]], label %loop_begin, label %loop_exit.split 2850 2851 loop_exit: 2852 ret i32 0 2853 ; CHECK: loop_exit.split: 2854 ; CHECK-NEXT: br label %loop_exit 2855 ; 2856 ; CHECK: loop_exit: 2857 ; CHECK-NEXT: ret 2858 } 2859 2860 ; Non-trivial unswitching of a switch. 2861 define i32 @test27(i1* %ptr, i32 %cond) { 2862 ; CHECK-LABEL: @test27( 2863 entry: 2864 br label %loop_begin 2865 ; CHECK-NEXT: entry: 2866 ; CHECK-NEXT: switch i32 %cond, label %[[ENTRY_SPLIT_LATCH:.*]] [ 2867 ; CHECK-NEXT: i32 0, label %[[ENTRY_SPLIT_A:.*]] 2868 ; CHECK-NEXT: i32 1, label %[[ENTRY_SPLIT_B:.*]] 2869 ; CHECK-NEXT: i32 2, label %[[ENTRY_SPLIT_C:.*]] 2870 ; CHECK-NEXT: ] 2871 2872 loop_begin: 2873 switch i32 %cond, label %latch [ 2874 i32 0, label %loop_a 2875 i32 1, label %loop_b 2876 i32 2, label %loop_c 2877 ] 2878 2879 loop_a: 2880 call i32 @a() 2881 br label %latch 2882 ; Unswitched 'a' loop. 2883 ; 2884 ; CHECK: [[ENTRY_SPLIT_A]]: 2885 ; CHECK-NEXT: br label %[[LOOP_BEGIN_A:.*]] 2886 ; 2887 ; CHECK: [[LOOP_BEGIN_A]]: 2888 ; CHECK-NEXT: br label %[[LOOP_A:.*]] 2889 ; 2890 ; CHECK: [[LOOP_A]]: 2891 ; CHECK-NEXT: call i32 @a() 2892 ; CHECK-NEXT: br label %[[LOOP_LATCH_A:.*]] 2893 ; 2894 ; CHECK: [[LOOP_LATCH_A]]: 2895 ; CHECK-NEXT: %[[V_A:.*]] = load i1, i1* %ptr 2896 ; CHECK: br i1 %[[V_A]], label %[[LOOP_BEGIN_A]], label %[[LOOP_EXIT_A:.*]] 2897 ; 2898 ; CHECK: [[LOOP_EXIT_A]]: 2899 ; CHECK-NEXT: br label %loop_exit 2900 2901 loop_b: 2902 call i32 @b() 2903 br label %latch 2904 ; Unswitched 'b' loop. 2905 ; 2906 ; CHECK: [[ENTRY_SPLIT_B]]: 2907 ; CHECK-NEXT: br label %[[LOOP_BEGIN_B:.*]] 2908 ; 2909 ; CHECK: [[LOOP_BEGIN_B]]: 2910 ; CHECK-NEXT: br label %[[LOOP_B:.*]] 2911 ; 2912 ; CHECK: [[LOOP_B]]: 2913 ; CHECK-NEXT: call i32 @b() 2914 ; CHECK-NEXT: br label %[[LOOP_LATCH_B:.*]] 2915 ; 2916 ; CHECK: [[LOOP_LATCH_B]]: 2917 ; CHECK-NEXT: %[[V_B:.*]] = load i1, i1* %ptr 2918 ; CHECK: br i1 %[[V_B]], label %[[LOOP_BEGIN_B]], label %[[LOOP_EXIT_B:.*]] 2919 ; 2920 ; CHECK: [[LOOP_EXIT_B]]: 2921 ; CHECK-NEXT: br label %loop_exit 2922 2923 loop_c: 2924 call i32 @c() 2925 br label %latch 2926 ; Unswitched 'c' loop. 2927 ; 2928 ; CHECK: [[ENTRY_SPLIT_C]]: 2929 ; CHECK-NEXT: br label %[[LOOP_BEGIN_C:.*]] 2930 ; 2931 ; CHECK: [[LOOP_BEGIN_C]]: 2932 ; CHECK-NEXT: br label %[[LOOP_C:.*]] 2933 ; 2934 ; CHECK: [[LOOP_C]]: 2935 ; CHECK-NEXT: call i32 @c() 2936 ; CHECK-NEXT: br label %[[LOOP_LATCH_C:.*]] 2937 ; 2938 ; CHECK: [[LOOP_LATCH_C]]: 2939 ; CHECK-NEXT: %[[V_C:.*]] = load i1, i1* %ptr 2940 ; CHECK: br i1 %[[V_C]], label %[[LOOP_BEGIN_C]], label %[[LOOP_EXIT_C:.*]] 2941 ; 2942 ; CHECK: [[LOOP_EXIT_C]]: 2943 ; CHECK-NEXT: br label %loop_exit 2944 2945 latch: 2946 %v = load i1, i1* %ptr 2947 br i1 %v, label %loop_begin, label %loop_exit 2948 ; Unswitched the 'latch' only loop. 2949 ; 2950 ; CHECK: [[ENTRY_SPLIT_LATCH]]: 2951 ; CHECK-NEXT: br label %[[LOOP_BEGIN_LATCH:.*]] 2952 ; 2953 ; CHECK: [[LOOP_BEGIN_LATCH]]: 2954 ; CHECK-NEXT: br label %[[LOOP_LATCH_LATCH:.*]] 2955 ; 2956 ; CHECK: [[LOOP_LATCH_LATCH]]: 2957 ; CHECK-NEXT: %[[V_LATCH:.*]] = load i1, i1* %ptr 2958 ; CHECK: br i1 %[[V_LATCH]], label %[[LOOP_BEGIN_LATCH]], label %[[LOOP_EXIT_LATCH:.*]] 2959 ; 2960 ; CHECK: [[LOOP_EXIT_LATCH]]: 2961 ; CHECK-NEXT: br label %loop_exit 2962 2963 loop_exit: 2964 ret i32 0 2965 ; CHECK: loop_exit: 2966 ; CHECK-NEXT: ret i32 0 2967 } 2968 2969 ; A test case designed to exercise unusual properties of switches: they 2970 ; can introduce multiple edges to successors. These need lots of special case 2971 ; handling as they get collapsed in many cases (domtree, the unswitch itself) 2972 ; but not in all cases (the PHI node operands). 2973 define i32 @test28(i32 %arg) { 2974 ; CHECK-LABEL: @test28( 2975 entry: 2976 br label %header 2977 ; CHECK-NEXT: entry: 2978 ; CHECK-NEXT: switch i32 %arg, label %[[ENTRY_SPLIT_C:.*]] [ 2979 ; CHECK-NEXT: i32 0, label %[[ENTRY_SPLIT_A:.*]] 2980 ; CHECK-NEXT: i32 1, label %[[ENTRY_SPLIT_A]] 2981 ; CHECK-NEXT: i32 2, label %[[ENTRY_SPLIT_B:.*]] 2982 ; CHECK-NEXT: i32 3, label %[[ENTRY_SPLIT_C]] 2983 ; CHECK-NEXT: ] 2984 2985 header: 2986 %tmp = call i32 @d() 2987 %cmp1 = icmp eq i32 %tmp, 0 2988 ; We set up a chain through all the successors of the switch that doesn't 2989 ; involve the switch so that we can have interesting PHI nodes in them. 2990 br i1 %cmp1, label %body.a, label %dispatch 2991 2992 dispatch: 2993 ; Switch with multiple successors. We arrange the last successor to be the 2994 ; default to make the test case easier to read. This has a duplicate edge 2995 ; both to the default destination (which is completely superfluous but 2996 ; technically valid IR) and to a regular successor. 2997 switch i32 %arg, label %body.c [ 2998 i32 0, label %body.a 2999 i32 1, label %body.a 3000 i32 2, label %body.b 3001 i32 3, label %body.c 3002 ] 3003 3004 body.a: 3005 %tmp.a.phi = phi i32 [ 0, %header ], [ %tmp, %dispatch ], [ %tmp, %dispatch ] 3006 %tmp.a = call i32 @a() 3007 %tmp.a.sum = add i32 %tmp.a.phi, %tmp.a 3008 br label %body.b 3009 ; Unswitched 'a' loop. 3010 ; 3011 ; CHECK: [[ENTRY_SPLIT_A]]: 3012 ; CHECK-NEXT: br label %[[HEADER_A:.*]] 3013 ; 3014 ; CHECK: [[HEADER_A]]: 3015 ; CHECK-NEXT: %[[TMP_A:.*]] = call i32 @d() 3016 ; CHECK-NEXT: %[[CMP1_A:.*]] = icmp eq i32 %[[TMP_A]], 0 3017 ; CHECK-NEXT: br i1 %[[CMP1_A]], label %[[BODY_A_A:.*]], label %[[DISPATCH_A:.*]] 3018 ; 3019 ; CHECK: [[DISPATCH_A]]: 3020 ; CHECK-NEXT: br label %[[BODY_A_A]] 3021 ; 3022 ; CHECK: [[BODY_A_A]]: 3023 ; CHECK-NEXT: %[[TMP_A_PHI_A:.*]] = phi i32 [ 0, %[[HEADER_A]] ], [ %[[TMP_A]], %[[DISPATCH_A]] ] 3024 ; CHECK-NEXT: %[[TMP_A_A:.*]] = call i32 @a() 3025 ; CHECK-NEXT: %[[TMP_A_SUM_A:.*]] = add i32 %[[TMP_A_PHI_A]], %[[TMP_A_A]] 3026 ; CHECK-NEXT: br label %[[BODY_B_A:.*]] 3027 ; 3028 ; CHECK: [[BODY_B_A]]: 3029 ; CHECK-NEXT: %[[TMP_B_PHI_A:.*]] = phi i32 [ %[[TMP_A_SUM_A]], %[[BODY_A_A]] ] 3030 ; CHECK-NEXT: %[[TMP_B_A:.*]] = call i32 @b() 3031 ; CHECK-NEXT: %[[TMP_B_SUM_A:.*]] = add i32 %[[TMP_B_PHI_A]], %[[TMP_B_A]] 3032 ; CHECK-NEXT: br label %[[BODY_C_A:.*]] 3033 ; 3034 ; CHECK: [[BODY_C_A]]: 3035 ; CHECK-NEXT: %[[TMP_C_PHI_A:.*]] = phi i32 [ %[[TMP_B_SUM_A]], %[[BODY_B_A]] ] 3036 ; CHECK-NEXT: %[[TMP_C_A:.*]] = call i32 @c() 3037 ; CHECK-NEXT: %[[TMP_C_SUM_A:.*]] = add i32 %[[TMP_C_PHI_A]], %[[TMP_C_A]] 3038 ; CHECK-NEXT: br label %[[LATCH_A:.*]] 3039 ; 3040 ; CHECK: [[LATCH_A]]: 3041 ; CHECK-NEXT: %[[CMP2_A:.*]] = icmp slt i32 %[[TMP_C_SUM_A]], 42 3042 ; CHECK: br i1 %[[CMP2_A]], label %[[HEADER_A]], label %[[LOOP_EXIT_A:.*]] 3043 ; 3044 ; CHECK: [[LOOP_EXIT_A]]: 3045 ; CHECK-NEXT: %[[LCSSA_A:.*]] = phi i32 [ %[[TMP_C_SUM_A]], %[[LATCH_A]] ] 3046 ; CHECK-NEXT: br label %exit 3047 3048 body.b: 3049 %tmp.b.phi = phi i32 [ %tmp, %dispatch ], [ %tmp.a.sum, %body.a ] 3050 %tmp.b = call i32 @b() 3051 %tmp.b.sum = add i32 %tmp.b.phi, %tmp.b 3052 br label %body.c 3053 ; Unswitched 'b' loop. 3054 ; 3055 ; CHECK: [[ENTRY_SPLIT_B]]: 3056 ; CHECK-NEXT: br label %[[HEADER_B:.*]] 3057 ; 3058 ; CHECK: [[HEADER_B]]: 3059 ; CHECK-NEXT: %[[TMP_B:.*]] = call i32 @d() 3060 ; CHECK-NEXT: %[[CMP1_B:.*]] = icmp eq i32 %[[TMP_B]], 0 3061 ; CHECK-NEXT: br i1 %[[CMP1_B]], label %[[BODY_A_B:.*]], label %[[DISPATCH_B:.*]] 3062 ; 3063 ; CHECK: [[DISPATCH_B]]: 3064 ; CHECK-NEXT: br label %[[BODY_B_B:.*]] 3065 ; 3066 ; CHECK: [[BODY_A_B]]: 3067 ; CHECK-NEXT: %[[TMP_A_PHI_B:.*]] = phi i32 [ 0, %[[HEADER_B]] ] 3068 ; CHECK-NEXT: %[[TMP_A_B:.*]] = call i32 @a() 3069 ; CHECK-NEXT: %[[TMP_A_SUM_B:.*]] = add i32 %[[TMP_A_PHI_B]], %[[TMP_A_B]] 3070 ; CHECK-NEXT: br label %[[BODY_B_B:.*]] 3071 ; 3072 ; CHECK: [[BODY_B_B]]: 3073 ; CHECK-NEXT: %[[TMP_B_PHI_B:.*]] = phi i32 [ %[[TMP_B]], %[[DISPATCH_B]] ], [ %[[TMP_A_SUM_B]], %[[BODY_A_B]] ] 3074 ; CHECK-NEXT: %[[TMP_B_B:.*]] = call i32 @b() 3075 ; CHECK-NEXT: %[[TMP_B_SUM_B:.*]] = add i32 %[[TMP_B_PHI_B]], %[[TMP_B_B]] 3076 ; CHECK-NEXT: br label %[[BODY_C_B:.*]] 3077 ; 3078 ; CHECK: [[BODY_C_B]]: 3079 ; CHECK-NEXT: %[[TMP_C_PHI_B:.*]] = phi i32 [ %[[TMP_B_SUM_B]], %[[BODY_B_B]] ] 3080 ; CHECK-NEXT: %[[TMP_C_B:.*]] = call i32 @c() 3081 ; CHECK-NEXT: %[[TMP_C_SUM_B:.*]] = add i32 %[[TMP_C_PHI_B]], %[[TMP_C_B]] 3082 ; CHECK-NEXT: br label %[[LATCH_B:.*]] 3083 ; 3084 ; CHECK: [[LATCH_B]]: 3085 ; CHECK-NEXT: %[[CMP2_B:.*]] = icmp slt i32 %[[TMP_C_SUM_B]], 42 3086 ; CHECK: br i1 %[[CMP2_B]], label %[[HEADER_B]], label %[[LOOP_EXIT_B:.*]] 3087 ; 3088 ; CHECK: [[LOOP_EXIT_B]]: 3089 ; CHECK-NEXT: %[[LCSSA_B:.*]] = phi i32 [ %[[TMP_C_SUM_B]], %[[LATCH_B]] ] 3090 ; CHECK-NEXT: br label %[[EXIT_SPLIT:.*]] 3091 3092 body.c: 3093 %tmp.c.phi = phi i32 [ %tmp, %dispatch ], [ %tmp, %dispatch ], [ %tmp.b.sum, %body.b ] 3094 %tmp.c = call i32 @c() 3095 %tmp.c.sum = add i32 %tmp.c.phi, %tmp.c 3096 br label %latch 3097 ; Unswitched 'c' loop. 3098 ; 3099 ; CHECK: [[ENTRY_SPLIT_C]]: 3100 ; CHECK-NEXT: br label %[[HEADER_C:.*]] 3101 ; 3102 ; CHECK: [[HEADER_C]]: 3103 ; CHECK-NEXT: %[[TMP_C:.*]] = call i32 @d() 3104 ; CHECK-NEXT: %[[CMP1_C:.*]] = icmp eq i32 %[[TMP_C]], 0 3105 ; CHECK-NEXT: br i1 %[[CMP1_C]], label %[[BODY_A_C:.*]], label %[[DISPATCH_C:.*]] 3106 ; 3107 ; CHECK: [[DISPATCH_C]]: 3108 ; CHECK-NEXT: br label %[[BODY_C_C:.*]] 3109 ; 3110 ; CHECK: [[BODY_A_C]]: 3111 ; CHECK-NEXT: %[[TMP_A_PHI_C:.*]] = phi i32 [ 0, %[[HEADER_C]] ] 3112 ; CHECK-NEXT: %[[TMP_A_C:.*]] = call i32 @a() 3113 ; CHECK-NEXT: %[[TMP_A_SUM_C:.*]] = add i32 %[[TMP_A_PHI_C]], %[[TMP_A_C]] 3114 ; CHECK-NEXT: br label %[[BODY_B_C:.*]] 3115 ; 3116 ; CHECK: [[BODY_B_C]]: 3117 ; CHECK-NEXT: %[[TMP_B_PHI_C:.*]] = phi i32 [ %[[TMP_A_SUM_C]], %[[BODY_A_C]] ] 3118 ; CHECK-NEXT: %[[TMP_B_C:.*]] = call i32 @b() 3119 ; CHECK-NEXT: %[[TMP_B_SUM_C:.*]] = add i32 %[[TMP_B_PHI_C]], %[[TMP_B_C]] 3120 ; CHECK-NEXT: br label %[[BODY_C_C:.*]] 3121 ; 3122 ; CHECK: [[BODY_C_C]]: 3123 ; CHECK-NEXT: %[[TMP_C_PHI_C:.*]] = phi i32 [ %[[TMP_C]], %[[DISPATCH_C]] ], [ %[[TMP_B_SUM_C]], %[[BODY_B_C]] ] 3124 ; CHECK-NEXT: %[[TMP_C_C:.*]] = call i32 @c() 3125 ; CHECK-NEXT: %[[TMP_C_SUM_C:.*]] = add i32 %[[TMP_C_PHI_C]], %[[TMP_C_C]] 3126 ; CHECK-NEXT: br label %[[LATCH_C:.*]] 3127 ; 3128 ; CHECK: [[LATCH_C]]: 3129 ; CHECK-NEXT: %[[CMP2_C:.*]] = icmp slt i32 %[[TMP_C_SUM_C]], 42 3130 ; CHECK: br i1 %[[CMP2_C]], label %[[HEADER_C]], label %[[LOOP_EXIT_C:.*]] 3131 ; 3132 ; CHECK: [[LOOP_EXIT_C]]: 3133 ; CHECK-NEXT: %[[LCSSA_C:.*]] = phi i32 [ %[[TMP_C_SUM_C]], %[[LATCH_C]] ] 3134 ; CHECK-NEXT: br label %[[EXIT_SPLIT]] 3135 3136 latch: 3137 %cmp2 = icmp slt i32 %tmp.c.sum, 42 3138 br i1 %cmp2, label %header, label %exit 3139 3140 exit: 3141 %lcssa.phi = phi i32 [ %tmp.c.sum, %latch ] 3142 ret i32 %lcssa.phi 3143 ; CHECK: [[EXIT_SPLIT]]: 3144 ; CHECK-NEXT: %[[EXIT_PHI1:.*]] = phi i32 [ %[[LCSSA_C]], %[[LOOP_EXIT_C]] ], [ %[[LCSSA_B]], %[[LOOP_EXIT_B]] ] 3145 ; CHECK-NEXT: br label %exit 3146 3147 ; CHECK: exit: 3148 ; CHECK-NEXT: %[[EXIT_PHI2:.*]] = phi i32 [ %[[EXIT_PHI1]], %[[EXIT_SPLIT]] ], [ %[[LCSSA_A]], %[[LOOP_EXIT_A]] ] 3149 ; CHECK-NEXT: ret i32 %[[EXIT_PHI2]] 3150 } 3151 3152 ; Similar to @test28 but designed to have one of the duplicate edges be 3153 ; a loop exit edge as those can in some cases be special. Among other things, 3154 ; this includes an LCSSA phi with multiple entries despite being a dedicated 3155 ; exit block. 3156 define i32 @test29(i32 %arg) { 3157 ; CHECK-LABEL: define i32 @test29( 3158 entry: 3159 br label %header 3160 ; CHECK-NEXT: entry: 3161 ; CHECK-NEXT: switch i32 %arg, label %[[ENTRY_SPLIT_EXIT:.*]] [ 3162 ; CHECK-NEXT: i32 -1, label %[[ENTRY_SPLIT_EXIT]] 3163 ; CHECK-NEXT: i32 0, label %[[ENTRY_SPLIT_A:.*]] 3164 ; CHECK-NEXT: i32 1, label %[[ENTRY_SPLIT_B:.*]] 3165 ; CHECK-NEXT: i32 2, label %[[ENTRY_SPLIT_B]] 3166 ; CHECK-NEXT: ] 3167 3168 header: 3169 %tmp = call i32 @d() 3170 %cmp1 = icmp eq i32 %tmp, 0 3171 br i1 %cmp1, label %body.a, label %dispatch 3172 3173 dispatch: 3174 switch i32 %arg, label %loop.exit1 [ 3175 i32 -1, label %loop.exit1 3176 i32 0, label %body.a 3177 i32 1, label %body.b 3178 i32 2, label %body.b 3179 ] 3180 3181 body.a: 3182 %tmp.a.phi = phi i32 [ 0, %header ], [ %tmp, %dispatch ] 3183 %tmp.a = call i32 @a() 3184 %tmp.a.sum = add i32 %tmp.a.phi, %tmp.a 3185 br label %body.b 3186 ; Unswitched 'a' loop. 3187 ; 3188 ; CHECK: [[ENTRY_SPLIT_A]]: 3189 ; CHECK-NEXT: br label %[[HEADER_A:.*]] 3190 ; 3191 ; CHECK: [[HEADER_A]]: 3192 ; CHECK-NEXT: %[[TMP_A:.*]] = call i32 @d() 3193 ; CHECK-NEXT: %[[CMP1_A:.*]] = icmp eq i32 %[[TMP_A]], 0 3194 ; CHECK-NEXT: br i1 %[[CMP1_A]], label %[[BODY_A_A:.*]], label %[[DISPATCH_A:.*]] 3195 ; 3196 ; CHECK: [[DISPATCH_A]]: 3197 ; CHECK-NEXT: br label %[[BODY_A_A]] 3198 ; 3199 ; CHECK: [[BODY_A_A]]: 3200 ; CHECK-NEXT: %[[TMP_A_PHI_A:.*]] = phi i32 [ 0, %[[HEADER_A]] ], [ %[[TMP_A]], %[[DISPATCH_A]] ] 3201 ; CHECK-NEXT: %[[TMP_A_A:.*]] = call i32 @a() 3202 ; CHECK-NEXT: %[[TMP_A_SUM_A:.*]] = add i32 %[[TMP_A_PHI_A]], %[[TMP_A_A]] 3203 ; CHECK-NEXT: br label %[[BODY_B_A:.*]] 3204 ; 3205 ; CHECK: [[BODY_B_A]]: 3206 ; CHECK-NEXT: %[[TMP_B_PHI_A:.*]] = phi i32 [ %[[TMP_A_SUM_A]], %[[BODY_A_A]] ] 3207 ; CHECK-NEXT: %[[TMP_B_A:.*]] = call i32 @b() 3208 ; CHECK-NEXT: %[[TMP_B_SUM_A:.*]] = add i32 %[[TMP_B_PHI_A]], %[[TMP_B_A]] 3209 ; CHECK-NEXT: br label %[[LATCH_A:.*]] 3210 ; 3211 ; CHECK: [[LATCH_A]]: 3212 ; CHECK-NEXT: %[[CMP2_A:.*]] = icmp slt i32 %[[TMP_B_SUM_A]], 42 3213 ; CHECK: br i1 %[[CMP2_A]], label %[[HEADER_A]], label %[[LOOP_EXIT_A:.*]] 3214 ; 3215 ; CHECK: [[LOOP_EXIT_A]]: 3216 ; CHECK-NEXT: %[[LCSSA_A:.*]] = phi i32 [ %[[TMP_B_SUM_A]], %[[LATCH_A]] ] 3217 ; CHECK-NEXT: br label %loop.exit2 3218 3219 body.b: 3220 %tmp.b.phi = phi i32 [ %tmp, %dispatch ], [ %tmp, %dispatch ], [ %tmp.a.sum, %body.a ] 3221 %tmp.b = call i32 @b() 3222 %tmp.b.sum = add i32 %tmp.b.phi, %tmp.b 3223 br label %latch 3224 ; Unswitched 'b' loop. 3225 ; 3226 ; CHECK: [[ENTRY_SPLIT_B]]: 3227 ; CHECK-NEXT: br label %[[HEADER_B:.*]] 3228 ; 3229 ; CHECK: [[HEADER_B]]: 3230 ; CHECK-NEXT: %[[TMP_B:.*]] = call i32 @d() 3231 ; CHECK-NEXT: %[[CMP1_B:.*]] = icmp eq i32 %[[TMP_B]], 0 3232 ; CHECK-NEXT: br i1 %[[CMP1_B]], label %[[BODY_A_B:.*]], label %[[DISPATCH_B:.*]] 3233 ; 3234 ; CHECK: [[DISPATCH_B]]: 3235 ; CHECK-NEXT: br label %[[BODY_B_B]] 3236 ; 3237 ; CHECK: [[BODY_A_B]]: 3238 ; CHECK-NEXT: %[[TMP_A_PHI_B:.*]] = phi i32 [ 0, %[[HEADER_B]] ] 3239 ; CHECK-NEXT: %[[TMP_A_B:.*]] = call i32 @a() 3240 ; CHECK-NEXT: %[[TMP_A_SUM_B:.*]] = add i32 %[[TMP_A_PHI_B]], %[[TMP_A_B]] 3241 ; CHECK-NEXT: br label %[[BODY_B_B:.*]] 3242 ; 3243 ; CHECK: [[BODY_B_B]]: 3244 ; CHECK-NEXT: %[[TMP_B_PHI_B:.*]] = phi i32 [ %[[TMP_B]], %[[DISPATCH_B]] ], [ %[[TMP_A_SUM_B]], %[[BODY_A_B]] ] 3245 ; CHECK-NEXT: %[[TMP_B_B:.*]] = call i32 @b() 3246 ; CHECK-NEXT: %[[TMP_B_SUM_B:.*]] = add i32 %[[TMP_B_PHI_B]], %[[TMP_B_B]] 3247 ; CHECK-NEXT: br label %[[LATCH_B:.*]] 3248 ; 3249 ; CHECK: [[LATCH_B]]: 3250 ; CHECK-NEXT: %[[CMP2_B:.*]] = icmp slt i32 %[[TMP_B_SUM_B]], 42 3251 ; CHECK: br i1 %[[CMP2_B]], label %[[HEADER_B]], label %[[LOOP_EXIT_B:.*]] 3252 ; 3253 ; CHECK: [[LOOP_EXIT_B]]: 3254 ; CHECK-NEXT: %[[LCSSA_B:.*]] = phi i32 [ %[[TMP_B_SUM_B]], %[[LATCH_B]] ] 3255 ; CHECK-NEXT: br label %[[LOOP_EXIT2_SPLIT:.*]] 3256 3257 latch: 3258 %cmp2 = icmp slt i32 %tmp.b.sum, 42 3259 br i1 %cmp2, label %header, label %loop.exit2 3260 3261 loop.exit1: 3262 %l1.phi = phi i32 [ %tmp, %dispatch ], [ %tmp, %dispatch ] 3263 br label %exit 3264 ; Unswitched 'exit' loop. 3265 ; 3266 ; CHECK: [[ENTRY_SPLIT_EXIT]]: 3267 ; CHECK-NEXT: br label %[[HEADER_EXIT:.*]] 3268 ; 3269 ; CHECK: [[HEADER_EXIT]]: 3270 ; CHECK-NEXT: %[[TMP_EXIT:.*]] = call i32 @d() 3271 ; CHECK-NEXT: %[[CMP1_EXIT:.*]] = icmp eq i32 %[[TMP_EXIT]], 0 3272 ; CHECK-NEXT: br i1 %[[CMP1_EXIT]], label %[[BODY_A_EXIT:.*]], label %[[DISPATCH_EXIT:.*]] 3273 ; 3274 ; CHECK: [[DISPATCH_EXIT]]: 3275 ; CHECK-NEXT: %[[TMP_LCSSA:.*]] = phi i32 [ %[[TMP_EXIT]], %[[HEADER_EXIT]] ] 3276 ; CHECK-NEXT: br label %loop.exit1 3277 ; 3278 ; CHECK: [[BODY_A_EXIT]]: 3279 ; CHECK-NEXT: %[[TMP_A_PHI_EXIT:.*]] = phi i32 [ 0, %[[HEADER_EXIT]] ] 3280 ; CHECK-NEXT: %[[TMP_A_EXIT:.*]] = call i32 @a() 3281 ; CHECK-NEXT: %[[TMP_A_SUM_EXIT:.*]] = add i32 %[[TMP_A_PHI_EXIT]], %[[TMP_A_EXIT]] 3282 ; CHECK-NEXT: br label %[[BODY_B_EXIT:.*]] 3283 ; 3284 ; CHECK: [[BODY_B_EXIT]]: 3285 ; CHECK-NEXT: %[[TMP_B_PHI_EXIT:.*]] = phi i32 [ %[[TMP_A_SUM_EXIT]], %[[BODY_A_EXIT]] ] 3286 ; CHECK-NEXT: %[[TMP_B_EXIT:.*]] = call i32 @b() 3287 ; CHECK-NEXT: %[[TMP_B_SUM_EXIT:.*]] = add i32 %[[TMP_B_PHI_EXIT]], %[[TMP_B_EXIT]] 3288 ; CHECK-NEXT: br label %[[LATCH_EXIT:.*]] 3289 ; 3290 ; CHECK: [[LATCH_EXIT]]: 3291 ; CHECK-NEXT: %[[CMP2_EXIT:.*]] = icmp slt i32 %[[TMP_B_SUM_EXIT]], 42 3292 ; CHECK: br i1 %[[CMP2_EXIT]], label %[[HEADER_EXIT]], label %[[LOOP_EXIT_EXIT:.*]] 3293 ; 3294 ; CHECK: loop.exit1: 3295 ; CHECK-NEXT: %[[L1_PHI:.*]] = phi i32 [ %[[TMP_LCSSA]], %[[DISPATCH_EXIT]] ] 3296 ; CHECK-NEXT: br label %exit 3297 ; 3298 ; CHECK: [[LOOP_EXIT_EXIT]]: 3299 ; CHECK-NEXT: %[[L2_PHI:.*]] = phi i32 [ %[[TMP_B_SUM_EXIT]], %[[LATCH_EXIT]] ] 3300 ; CHECK-NEXT: br label %[[LOOP_EXIT2_SPLIT]] 3301 3302 loop.exit2: 3303 %l2.phi = phi i32 [ %tmp.b.sum, %latch ] 3304 br label %exit 3305 ; CHECK: [[LOOP_EXIT2_SPLIT]]: 3306 ; CHECK-NEXT: %[[LOOP_EXIT_PHI1:.*]] = phi i32 [ %[[L2_PHI]], %[[LOOP_EXIT_EXIT]] ], [ %[[LCSSA_B]], %[[LOOP_EXIT_B]] ] 3307 ; CHECK-NEXT: br label %loop.exit2 3308 ; 3309 ; CHECK: loop.exit2: 3310 ; CHECK-NEXT: %[[LOOP_EXIT_PHI2:.*]] = phi i32 [ %[[LOOP_EXIT_PHI1]], %[[LOOP_EXIT2_SPLIT]] ], [ %[[LCSSA_A]], %[[LOOP_EXIT_A]] ] 3311 ; CHECK-NEXT: br label %exit 3312 3313 exit: 3314 %l.phi = phi i32 [ %l1.phi, %loop.exit1 ], [ %l2.phi, %loop.exit2 ] 3315 ret i32 %l.phi 3316 ; CHECK: exit: 3317 ; CHECK-NEXT: %[[EXIT_PHI:.*]] = phi i32 [ %[[L1_PHI]], %loop.exit1 ], [ %[[LOOP_EXIT_PHI2]], %loop.exit2 ] 3318 ; CHECK-NEXT: ret i32 %[[EXIT_PHI]] 3319 } 3320 3321 ; Unswitch will not actually change the loop nest from: 3322 ; A < B < C 3323 define void @hoist_inner_loop0() { 3324 ; CHECK-LABEL: define void @hoist_inner_loop0( 3325 entry: 3326 br label %a.header 3327 ; CHECK: entry: 3328 ; CHECK-NEXT: br label %a.header 3329 3330 a.header: 3331 br label %b.header 3332 ; CHECK: a.header: 3333 ; CHECK-NEXT: br label %b.header 3334 3335 b.header: 3336 %v1 = call i1 @cond() 3337 br label %c.header 3338 ; CHECK: b.header: 3339 ; CHECK-NEXT: %v1 = call i1 @cond() 3340 ; CHECK-NEXT: br i1 %v1, label %[[B_HEADER_SPLIT_US:.*]], label %[[B_HEADER_SPLIT:.*]] 3341 ; 3342 ; CHECK: [[B_HEADER_SPLIT_US]]: 3343 ; CHECK-NEXT: br label %[[C_HEADER_US:.*]] 3344 ; 3345 ; CHECK: [[C_HEADER_US]]: 3346 ; CHECK-NEXT: call i32 @c() 3347 ; CHECK-NEXT: br label %[[B_LATCH_SPLIT_US:.*]] 3348 ; 3349 ; CHECK: [[B_LATCH_SPLIT_US]]: 3350 ; CHECK-NEXT: br label %b.latch 3351 ; 3352 ; CHECK: [[B_HEADER_SPLIT]]: 3353 ; CHECK-NEXT: br label %c.header 3354 3355 c.header: 3356 call i32 @c() 3357 br i1 %v1, label %b.latch, label %c.latch 3358 ; CHECK: c.header: 3359 ; CHECK-NEXT: call i32 @c() 3360 ; CHECK-NEXT: br label %c.latch 3361 3362 c.latch: 3363 %v2 = call i1 @cond() 3364 br i1 %v2, label %c.header, label %b.latch 3365 ; CHECK: c.latch: 3366 ; CHECK-NEXT: %v2 = call i1 @cond() 3367 ; CHECK-NEXT: br i1 %v2, label %c.header, label %[[B_LATCH_SPLIT:.*]] 3368 3369 b.latch: 3370 %v3 = call i1 @cond() 3371 br i1 %v3, label %b.header, label %a.latch 3372 ; CHECK: [[B_LATCH_SPLIT]]: 3373 ; CHECK-NEXT: br label %b.latch 3374 ; 3375 ; CHECK: b.latch: 3376 ; CHECK-NEXT: %v3 = call i1 @cond() 3377 ; CHECK-NEXT: br i1 %v3, label %b.header, label %a.latch 3378 3379 a.latch: 3380 br label %a.header 3381 ; CHECK: a.latch: 3382 ; CHECK-NEXT: br label %a.header 3383 3384 exit: 3385 ret void 3386 ; CHECK: exit: 3387 ; CHECK-NEXT: ret void 3388 } 3389 3390 ; Unswitch will transform the loop nest from: 3391 ; A < B < C 3392 ; into 3393 ; A < (B, C) 3394 define void @hoist_inner_loop1(i32* %ptr) { 3395 ; CHECK-LABEL: define void @hoist_inner_loop1( 3396 entry: 3397 br label %a.header 3398 ; CHECK: entry: 3399 ; CHECK-NEXT: br label %a.header 3400 3401 a.header: 3402 %x.a = load i32, i32* %ptr 3403 br label %b.header 3404 ; CHECK: a.header: 3405 ; CHECK-NEXT: %x.a = load i32, i32* %ptr 3406 ; CHECK-NEXT: br label %b.header 3407 3408 b.header: 3409 %x.b = load i32, i32* %ptr 3410 %v1 = call i1 @cond() 3411 br label %c.header 3412 ; CHECK: b.header: 3413 ; CHECK-NEXT: %x.b = load i32, i32* %ptr 3414 ; CHECK-NEXT: %v1 = call i1 @cond() 3415 ; CHECK-NEXT: br i1 %v1, label %[[B_HEADER_SPLIT_US:.*]], label %[[B_HEADER_SPLIT:.*]] 3416 ; 3417 ; CHECK: [[B_HEADER_SPLIT_US]]: 3418 ; CHECK-NEXT: br label %[[C_HEADER_US:.*]] 3419 ; 3420 ; CHECK: [[C_HEADER_US]]: 3421 ; CHECK-NEXT: call i32 @c() 3422 ; CHECK-NEXT: br label %[[B_LATCH_US:.*]] 3423 ; 3424 ; CHECK: [[B_LATCH_US]]: 3425 ; CHECK-NEXT: br label %b.latch 3426 ; 3427 ; CHECK: [[B_HEADER_SPLIT]]: 3428 ; CHECK-NEXT: %[[X_B_LCSSA:.*]] = phi i32 [ %x.b, %b.header ] 3429 ; CHECK-NEXT: br label %c.header 3430 3431 c.header: 3432 call i32 @c() 3433 br i1 %v1, label %b.latch, label %c.latch 3434 ; CHECK: c.header: 3435 ; CHECK-NEXT: call i32 @c() 3436 ; CHECK-NEXT: br label %c.latch 3437 3438 c.latch: 3439 ; Use values from other loops to check LCSSA form. 3440 store i32 %x.a, i32* %ptr 3441 store i32 %x.b, i32* %ptr 3442 %v2 = call i1 @cond() 3443 br i1 %v2, label %c.header, label %a.exit.c 3444 ; CHECK: c.latch: 3445 ; CHECK-NEXT: store i32 %x.a, i32* %ptr 3446 ; CHECK-NEXT: store i32 %[[X_B_LCSSA]], i32* %ptr 3447 ; CHECK-NEXT: %v2 = call i1 @cond() 3448 ; CHECK-NEXT: br i1 %v2, label %c.header, label %a.exit.c 3449 3450 b.latch: 3451 %v3 = call i1 @cond() 3452 br i1 %v3, label %b.header, label %a.exit.b 3453 ; CHECK: b.latch: 3454 ; CHECK-NEXT: %v3 = call i1 @cond() 3455 ; CHECK-NEXT: br i1 %v3, label %b.header, label %a.exit.b 3456 3457 a.exit.c: 3458 br label %a.latch 3459 ; CHECK: a.exit.c 3460 ; CHECK-NEXT: br label %a.latch 3461 3462 a.exit.b: 3463 br label %a.latch 3464 ; CHECK: a.exit.b: 3465 ; CHECK-NEXT: br label %a.latch 3466 3467 a.latch: 3468 br label %a.header 3469 ; CHECK: a.latch: 3470 ; CHECK-NEXT: br label %a.header 3471 3472 exit: 3473 ret void 3474 ; CHECK: exit: 3475 ; CHECK-NEXT: ret void 3476 } 3477 3478 ; Unswitch will transform the loop nest from: 3479 ; A < B < C 3480 ; into 3481 ; (A < B), C 3482 define void @hoist_inner_loop2(i32* %ptr) { 3483 ; CHECK-LABEL: define void @hoist_inner_loop2( 3484 entry: 3485 br label %a.header 3486 ; CHECK: entry: 3487 ; CHECK-NEXT: br label %a.header 3488 3489 a.header: 3490 %x.a = load i32, i32* %ptr 3491 br label %b.header 3492 ; CHECK: a.header: 3493 ; CHECK-NEXT: %x.a = load i32, i32* %ptr 3494 ; CHECK-NEXT: br label %b.header 3495 3496 b.header: 3497 %x.b = load i32, i32* %ptr 3498 %v1 = call i1 @cond() 3499 br label %c.header 3500 ; CHECK: b.header: 3501 ; CHECK-NEXT: %x.b = load i32, i32* %ptr 3502 ; CHECK-NEXT: %v1 = call i1 @cond() 3503 ; CHECK-NEXT: br i1 %v1, label %[[B_HEADER_SPLIT_US:.*]], label %[[B_HEADER_SPLIT:.*]] 3504 ; 3505 ; CHECK: [[B_HEADER_SPLIT_US]]: 3506 ; CHECK-NEXT: br label %[[C_HEADER_US:.*]] 3507 ; 3508 ; CHECK: [[C_HEADER_US]]: 3509 ; CHECK-NEXT: call i32 @c() 3510 ; CHECK-NEXT: br label %[[B_LATCH_US:.*]] 3511 ; 3512 ; CHECK: [[B_LATCH_US]]: 3513 ; CHECK-NEXT: br label %b.latch 3514 ; 3515 ; CHECK: [[B_HEADER_SPLIT]]: 3516 ; CHECK-NEXT: %[[X_A_LCSSA:.*]] = phi i32 [ %x.a, %b.header ] 3517 ; CHECK-NEXT: %[[X_B_LCSSA:.*]] = phi i32 [ %x.b, %b.header ] 3518 ; CHECK-NEXT: br label %c.header 3519 3520 c.header: 3521 call i32 @c() 3522 br i1 %v1, label %b.latch, label %c.latch 3523 ; CHECK: c.header: 3524 ; CHECK-NEXT: call i32 @c() 3525 ; CHECK-NEXT: br label %c.latch 3526 3527 c.latch: 3528 ; Use values from other loops to check LCSSA form. 3529 store i32 %x.a, i32* %ptr 3530 store i32 %x.b, i32* %ptr 3531 %v2 = call i1 @cond() 3532 br i1 %v2, label %c.header, label %exit 3533 ; CHECK: c.latch: 3534 ; CHECK-NEXT: store i32 %[[X_A_LCSSA]], i32* %ptr 3535 ; CHECK-NEXT: store i32 %[[X_B_LCSSA]], i32* %ptr 3536 ; CHECK-NEXT: %v2 = call i1 @cond() 3537 ; CHECK-NEXT: br i1 %v2, label %c.header, label %exit 3538 3539 b.latch: 3540 %v3 = call i1 @cond() 3541 br i1 %v3, label %b.header, label %a.latch 3542 ; CHECK: b.latch: 3543 ; CHECK-NEXT: %v3 = call i1 @cond() 3544 ; CHECK-NEXT: br i1 %v3, label %b.header, label %a.latch 3545 3546 a.latch: 3547 br label %a.header 3548 ; CHECK: a.latch: 3549 ; CHECK-NEXT: br label %a.header 3550 3551 exit: 3552 ret void 3553 ; CHECK: exit: 3554 ; CHECK-NEXT: ret void 3555 } 3556 3557 ; Same as @hoist_inner_loop2 but with a nested loop inside the hoisted loop. 3558 ; Unswitch will transform the loop nest from: 3559 ; A < B < C < D 3560 ; into 3561 ; (A < B), (C < D) 3562 define void @hoist_inner_loop3(i32* %ptr) { 3563 ; CHECK-LABEL: define void @hoist_inner_loop3( 3564 entry: 3565 br label %a.header 3566 ; CHECK: entry: 3567 ; CHECK-NEXT: br label %a.header 3568 3569 a.header: 3570 %x.a = load i32, i32* %ptr 3571 br label %b.header 3572 ; CHECK: a.header: 3573 ; CHECK-NEXT: %x.a = load i32, i32* %ptr 3574 ; CHECK-NEXT: br label %b.header 3575 3576 b.header: 3577 %x.b = load i32, i32* %ptr 3578 %v1 = call i1 @cond() 3579 br label %c.header 3580 ; CHECK: b.header: 3581 ; CHECK-NEXT: %x.b = load i32, i32* %ptr 3582 ; CHECK-NEXT: %v1 = call i1 @cond() 3583 ; CHECK-NEXT: br i1 %v1, label %[[B_HEADER_SPLIT_US:.*]], label %[[B_HEADER_SPLIT:.*]] 3584 ; 3585 ; CHECK: [[B_HEADER_SPLIT_US]]: 3586 ; CHECK-NEXT: br label %[[C_HEADER_US:.*]] 3587 ; 3588 ; CHECK: [[C_HEADER_US]]: 3589 ; CHECK-NEXT: call i32 @c() 3590 ; CHECK-NEXT: br label %[[B_LATCH_US:.*]] 3591 ; 3592 ; CHECK: [[B_LATCH_US]]: 3593 ; CHECK-NEXT: br label %b.latch 3594 ; 3595 ; CHECK: [[B_HEADER_SPLIT]]: 3596 ; CHECK-NEXT: %[[X_A_LCSSA:.*]] = phi i32 [ %x.a, %b.header ] 3597 ; CHECK-NEXT: %[[X_B_LCSSA:.*]] = phi i32 [ %x.b, %b.header ] 3598 ; CHECK-NEXT: br label %c.header 3599 3600 c.header: 3601 call i32 @c() 3602 br i1 %v1, label %b.latch, label %c.body 3603 ; CHECK: c.header: 3604 ; CHECK-NEXT: call i32 @c() 3605 ; CHECK-NEXT: br label %c.body 3606 3607 c.body: 3608 %x.c = load i32, i32* %ptr 3609 br label %d.header 3610 ; CHECK: c.body: 3611 ; CHECK-NEXT: %x.c = load i32, i32* %ptr 3612 ; CHECK-NEXT: br label %d.header 3613 3614 d.header: 3615 ; Use values from other loops to check LCSSA form. 3616 store i32 %x.a, i32* %ptr 3617 store i32 %x.b, i32* %ptr 3618 store i32 %x.c, i32* %ptr 3619 %v2 = call i1 @cond() 3620 br i1 %v2, label %d.header, label %c.latch 3621 ; CHECK: d.header: 3622 ; CHECK-NEXT: store i32 %[[X_A_LCSSA]], i32* %ptr 3623 ; CHECK-NEXT: store i32 %[[X_B_LCSSA]], i32* %ptr 3624 ; CHECK-NEXT: store i32 %x.c, i32* %ptr 3625 ; CHECK-NEXT: %v2 = call i1 @cond() 3626 ; CHECK-NEXT: br i1 %v2, label %d.header, label %c.latch 3627 3628 c.latch: 3629 %v3 = call i1 @cond() 3630 br i1 %v3, label %c.header, label %exit 3631 ; CHECK: c.latch: 3632 ; CHECK-NEXT: %v3 = call i1 @cond() 3633 ; CHECK-NEXT: br i1 %v3, label %c.header, label %exit 3634 3635 b.latch: 3636 %v4 = call i1 @cond() 3637 br i1 %v4, label %b.header, label %a.latch 3638 ; CHECK: b.latch: 3639 ; CHECK-NEXT: %v4 = call i1 @cond() 3640 ; CHECK-NEXT: br i1 %v4, label %b.header, label %a.latch 3641 3642 a.latch: 3643 br label %a.header 3644 ; CHECK: a.latch: 3645 ; CHECK-NEXT: br label %a.header 3646 3647 exit: 3648 ret void 3649 ; CHECK: exit: 3650 ; CHECK-NEXT: ret void 3651 } 3652 3653 ; This test is designed to exercise checking multiple remaining exits from the 3654 ; loop being unswitched. 3655 ; Unswitch will transform the loop nest from: 3656 ; A < B < C < D 3657 ; into 3658 ; A < B < (C, D) 3659 define void @hoist_inner_loop4() { 3660 ; CHECK-LABEL: define void @hoist_inner_loop4( 3661 entry: 3662 br label %a.header 3663 ; CHECK: entry: 3664 ; CHECK-NEXT: br label %a.header 3665 3666 a.header: 3667 br label %b.header 3668 ; CHECK: a.header: 3669 ; CHECK-NEXT: br label %b.header 3670 3671 b.header: 3672 br label %c.header 3673 ; CHECK: b.header: 3674 ; CHECK-NEXT: br label %c.header 3675 3676 c.header: 3677 %v1 = call i1 @cond() 3678 br label %d.header 3679 ; CHECK: c.header: 3680 ; CHECK-NEXT: %v1 = call i1 @cond() 3681 ; CHECK-NEXT: br i1 %v1, label %[[C_HEADER_SPLIT_US:.*]], label %[[C_HEADER_SPLIT:.*]] 3682 ; 3683 ; CHECK: [[C_HEADER_SPLIT_US]]: 3684 ; CHECK-NEXT: br label %[[D_HEADER_US:.*]] 3685 ; 3686 ; CHECK: [[D_HEADER_US]]: 3687 ; CHECK-NEXT: call i32 @d() 3688 ; CHECK-NEXT: br label %[[C_LATCH_US:.*]] 3689 ; 3690 ; CHECK: [[C_LATCH_US]]: 3691 ; CHECK-NEXT: br label %c.latch 3692 ; 3693 ; CHECK: [[C_HEADER_SPLIT]]: 3694 ; CHECK-NEXT: br label %d.header 3695 3696 d.header: 3697 call i32 @d() 3698 br i1 %v1, label %c.latch, label %d.exiting1 3699 ; CHECK: d.header: 3700 ; CHECK-NEXT: call i32 @d() 3701 ; CHECK-NEXT: br label %d.exiting1 3702 3703 d.exiting1: 3704 %v2 = call i1 @cond() 3705 br i1 %v2, label %d.exiting2, label %a.latch 3706 ; CHECK: d.exiting1: 3707 ; CHECK-NEXT: %v2 = call i1 @cond() 3708 ; CHECK-NEXT: br i1 %v2, label %d.exiting2, label %a.latch 3709 3710 d.exiting2: 3711 %v3 = call i1 @cond() 3712 br i1 %v3, label %d.exiting3, label %loopexit.d 3713 ; CHECK: d.exiting2: 3714 ; CHECK-NEXT: %v3 = call i1 @cond() 3715 ; CHECK-NEXT: br i1 %v3, label %d.exiting3, label %loopexit.d 3716 3717 d.exiting3: 3718 %v4 = call i1 @cond() 3719 br i1 %v4, label %d.latch, label %b.latch 3720 ; CHECK: d.exiting3: 3721 ; CHECK-NEXT: %v4 = call i1 @cond() 3722 ; CHECK-NEXT: br i1 %v4, label %d.latch, label %b.latch 3723 3724 d.latch: 3725 br label %d.header 3726 ; CHECK: d.latch: 3727 ; CHECK-NEXT: br label %d.header 3728 3729 c.latch: 3730 %v5 = call i1 @cond() 3731 br i1 %v5, label %c.header, label %loopexit.c 3732 ; CHECK: c.latch: 3733 ; CHECK-NEXT: %v5 = call i1 @cond() 3734 ; CHECK-NEXT: br i1 %v5, label %c.header, label %loopexit.c 3735 3736 b.latch: 3737 br label %b.header 3738 ; CHECK: b.latch: 3739 ; CHECK-NEXT: br label %b.header 3740 3741 a.latch: 3742 br label %a.header 3743 ; CHECK: a.latch: 3744 ; CHECK-NEXT: br label %a.header 3745 3746 loopexit.d: 3747 br label %exit 3748 ; CHECK: loopexit.d: 3749 ; CHECK-NEXT: br label %exit 3750 3751 loopexit.c: 3752 br label %exit 3753 ; CHECK: loopexit.c: 3754 ; CHECK-NEXT: br label %exit 3755 3756 exit: 3757 ret void 3758 ; CHECK: exit: 3759 ; CHECK-NEXT: ret void 3760 } 3761 3762 ; Unswitch will transform the loop nest from: 3763 ; A < B < C < D 3764 ; into 3765 ; A < ((B < C), D) 3766 define void @hoist_inner_loop5(i32* %ptr) { 3767 ; CHECK-LABEL: define void @hoist_inner_loop5( 3768 entry: 3769 br label %a.header 3770 ; CHECK: entry: 3771 ; CHECK-NEXT: br label %a.header 3772 3773 a.header: 3774 %x.a = load i32, i32* %ptr 3775 br label %b.header 3776 ; CHECK: a.header: 3777 ; CHECK-NEXT: %x.a = load i32, i32* %ptr 3778 ; CHECK-NEXT: br label %b.header 3779 3780 b.header: 3781 %x.b = load i32, i32* %ptr 3782 br label %c.header 3783 ; CHECK: b.header: 3784 ; CHECK-NEXT: %x.b = load i32, i32* %ptr 3785 ; CHECK-NEXT: br label %c.header 3786 3787 c.header: 3788 %x.c = load i32, i32* %ptr 3789 %v1 = call i1 @cond() 3790 br label %d.header 3791 ; CHECK: c.header: 3792 ; CHECK-NEXT: %x.c = load i32, i32* %ptr 3793 ; CHECK-NEXT: %v1 = call i1 @cond() 3794 ; CHECK-NEXT: br i1 %v1, label %[[C_HEADER_SPLIT_US:.*]], label %[[C_HEADER_SPLIT:.*]] 3795 ; 3796 ; CHECK: [[C_HEADER_SPLIT_US]]: 3797 ; CHECK-NEXT: br label %[[D_HEADER_US:.*]] 3798 ; 3799 ; CHECK: [[D_HEADER_US]]: 3800 ; CHECK-NEXT: call i32 @d() 3801 ; CHECK-NEXT: br label %[[C_LATCH_US:.*]] 3802 ; 3803 ; CHECK: [[C_LATCH_US]]: 3804 ; CHECK-NEXT: br label %c.latch 3805 ; 3806 ; CHECK: [[C_HEADER_SPLIT]]: 3807 ; CHECK-NEXT: %[[X_B_LCSSA:.*]] = phi i32 [ %x.b, %c.header ] 3808 ; CHECK-NEXT: %[[X_C_LCSSA:.*]] = phi i32 [ %x.c, %c.header ] 3809 ; CHECK-NEXT: br label %d.header 3810 3811 d.header: 3812 call i32 @d() 3813 br i1 %v1, label %c.latch, label %d.latch 3814 ; CHECK: d.header: 3815 ; CHECK-NEXT: call i32 @d() 3816 ; CHECK-NEXT: br label %d.latch 3817 3818 d.latch: 3819 ; Use values from other loops to check LCSSA form. 3820 store i32 %x.a, i32* %ptr 3821 store i32 %x.b, i32* %ptr 3822 store i32 %x.c, i32* %ptr 3823 %v2 = call i1 @cond() 3824 br i1 %v2, label %d.header, label %a.latch 3825 ; CHECK: d.latch: 3826 ; CHECK-NEXT: store i32 %x.a, i32* %ptr 3827 ; CHECK-NEXT: store i32 %[[X_B_LCSSA]], i32* %ptr 3828 ; CHECK-NEXT: store i32 %[[X_C_LCSSA]], i32* %ptr 3829 ; CHECK-NEXT: %v2 = call i1 @cond() 3830 ; CHECK-NEXT: br i1 %v2, label %d.header, label %a.latch 3831 3832 c.latch: 3833 %v3 = call i1 @cond() 3834 br i1 %v3, label %c.header, label %b.latch 3835 ; CHECK: c.latch: 3836 ; CHECK-NEXT: %v3 = call i1 @cond() 3837 ; CHECK-NEXT: br i1 %v3, label %c.header, label %b.latch 3838 3839 b.latch: 3840 br label %b.header 3841 ; CHECK: b.latch: 3842 ; CHECK-NEXT: br label %b.header 3843 3844 a.latch: 3845 br label %a.header 3846 ; CHECK: a.latch: 3847 ; CHECK-NEXT: br label %a.header 3848 3849 exit: 3850 ret void 3851 ; CHECK: exit: 3852 ; CHECK-NEXT: ret void 3853 } 3854 3855 define void @hoist_inner_loop_switch(i32* %ptr) { 3856 ; CHECK-LABEL: define void @hoist_inner_loop_switch( 3857 entry: 3858 br label %a.header 3859 ; CHECK: entry: 3860 ; CHECK-NEXT: br label %a.header 3861 3862 a.header: 3863 %x.a = load i32, i32* %ptr 3864 br label %b.header 3865 ; CHECK: a.header: 3866 ; CHECK-NEXT: %x.a = load i32, i32* %ptr 3867 ; CHECK-NEXT: br label %b.header 3868 3869 b.header: 3870 %x.b = load i32, i32* %ptr 3871 %v1 = call i32 @cond.i32() 3872 br label %c.header 3873 ; CHECK: b.header: 3874 ; CHECK-NEXT: %x.b = load i32, i32* %ptr 3875 ; CHECK-NEXT: %v1 = call i32 @cond.i32() 3876 ; CHECK-NEXT: switch i32 %v1, label %[[B_HEADER_SPLIT:.*]] [ 3877 ; CHECK-NEXT: i32 1, label %[[B_HEADER_SPLIT_US:.*]] 3878 ; CHECK-NEXT: i32 2, label %[[B_HEADER_SPLIT_US]] 3879 ; CHECK-NEXT: i32 3, label %[[B_HEADER_SPLIT_US]] 3880 ; CHECK-NEXT: ] 3881 ; 3882 ; CHECK: [[B_HEADER_SPLIT_US]]: 3883 ; CHECK-NEXT: br label %[[C_HEADER_US:.*]] 3884 ; 3885 ; CHECK: [[C_HEADER_US]]: 3886 ; CHECK-NEXT: call i32 @c() 3887 ; CHECK-NEXT: br label %[[B_LATCH_US:.*]] 3888 ; 3889 ; CHECK: [[B_LATCH_US]]: 3890 ; CHECK-NEXT: br label %b.latch 3891 ; 3892 ; CHECK: [[B_HEADER_SPLIT]]: 3893 ; CHECK-NEXT: %[[X_A_LCSSA:.*]] = phi i32 [ %x.a, %b.header ] 3894 ; CHECK-NEXT: %[[X_B_LCSSA:.*]] = phi i32 [ %x.b, %b.header ] 3895 ; CHECK-NEXT: br label %c.header 3896 3897 c.header: 3898 call i32 @c() 3899 switch i32 %v1, label %c.latch [ 3900 i32 1, label %b.latch 3901 i32 2, label %b.latch 3902 i32 3, label %b.latch 3903 ] 3904 ; CHECK: c.header: 3905 ; CHECK-NEXT: call i32 @c() 3906 ; CHECK-NEXT: br label %c.latch 3907 3908 c.latch: 3909 ; Use values from other loops to check LCSSA form. 3910 store i32 %x.a, i32* %ptr 3911 store i32 %x.b, i32* %ptr 3912 %v2 = call i1 @cond() 3913 br i1 %v2, label %c.header, label %exit 3914 ; CHECK: c.latch: 3915 ; CHECK-NEXT: store i32 %[[X_A_LCSSA]], i32* %ptr 3916 ; CHECK-NEXT: store i32 %[[X_B_LCSSA]], i32* %ptr 3917 ; CHECK-NEXT: %v2 = call i1 @cond() 3918 ; CHECK-NEXT: br i1 %v2, label %c.header, label %exit 3919 3920 b.latch: 3921 %v3 = call i1 @cond() 3922 br i1 %v3, label %b.header, label %a.latch 3923 ; CHECK: b.latch: 3924 ; CHECK-NEXT: %v3 = call i1 @cond() 3925 ; CHECK-NEXT: br i1 %v3, label %b.header, label %a.latch 3926 3927 a.latch: 3928 br label %a.header 3929 ; CHECK: a.latch: 3930 ; CHECK-NEXT: br label %a.header 3931 3932 exit: 3933 ret void 3934 ; CHECK: exit: 3935 ; CHECK-NEXT: ret void 3936 } 3937 3938 ; A devilish pattern. This is a crafty, crafty test case designed to risk 3939 ; creating indirect cycles with trivial and non-trivial unswitching. The inner 3940 ; loop has a switch with a trivial exit edge that can be unswitched, but the 3941 ; rest of the switch cannot be unswitched because its cost is too high. 3942 ; However, the unswitching of the trivial edge creates a new switch in the 3943 ; outer loop. *This* switch isn't trivial, but has a low cost to unswitch. When 3944 ; we unswitch this switch from the outer loop, we will remove it completely and 3945 ; create a clone of the inner loop on one side. This clone will then again be 3946 ; viable for unswitching the inner-most loop. This lets us check that the 3947 ; unswitching doesn't end up cycling infinitely even when the cycle is 3948 ; indirect and due to revisiting a loop after cloning. 3949 define void @test30(i32 %arg) { 3950 ; CHECK-LABEL: define void @test30( 3951 entry: 3952 br label %outer.header 3953 ; CHECK-NEXT: entry: 3954 ; CHECK-NEXT: switch i32 %arg, label %[[ENTRY_SPLIT:.*]] [ 3955 ; CHECK-NEXT: i32 1, label %[[ENTRY_SPLIT_US:.*]] 3956 ; CHECK-NEXT: i32 2, label %[[ENTRY_SPLIT_US]] 3957 ; CHECK-NEXT: ] 3958 ; 3959 ; CHECK: [[ENTRY_SPLIT_US]]: 3960 ; CHECK-NEXT: switch i32 %arg, label %[[ENTRY_SPLIT_US_SPLIT:.*]] [ 3961 ; CHECK-NEXT: i32 1, label %[[ENTRY_SPLIT_US_SPLIT_US:.*]] 3962 ; CHECK-NEXT: ] 3963 3964 outer.header: 3965 br label %inner.header 3966 3967 inner.header: 3968 switch i32 %arg, label %inner.loopexit1 [ 3969 i32 1, label %inner.body1 3970 i32 2, label %inner.body2 3971 ] 3972 3973 inner.body1: 3974 %a = call i32 @a() 3975 br label %inner.latch 3976 ; The (super convoluted) fully unswitched loop around `@a`. 3977 ; 3978 ; CHECK: [[ENTRY_SPLIT_US_SPLIT_US]]: 3979 ; CHECK-NEXT: br label %[[OUTER_HEADER_US_US:.*]] 3980 ; 3981 ; CHECK: [[OUTER_HEADER_US_US]]: 3982 ; CHECK-NEXT: br label %[[OUTER_HEADER_SPLIT_US_US:.*]] 3983 ; 3984 ; CHECK: [[OUTER_LATCH_US_US:.*]]: 3985 ; CHECK-NEXT: %[[OUTER_COND_US_US:.*]] = call i1 @cond() 3986 ; CHECK-NEXT: br i1 %[[OUTER_COND_US_US]], label %[[OUTER_HEADER_US_US]], label %[[EXIT_SPLIT_US_SPLIT_US:.*]] 3987 ; 3988 ; CHECK: [[OUTER_HEADER_SPLIT_US_US]]: 3989 ; CHECK-NEXT: br label %[[OUTER_HEADER_SPLIT_SPLIT_US_US_US:.*]] 3990 ; 3991 ; CHECK: [[INNER_LOOPEXIT2_US_US:.*]]: 3992 ; CHECK-NEXT: br label %[[OUTER_LATCH_US_US]] 3993 ; 3994 ; CHECK: [[OUTER_HEADER_SPLIT_SPLIT_US_US_US]]: 3995 ; CHECK-NEXT: br label %[[INNER_HEADER_US_US_US:.*]] 3996 ; 3997 ; CHECK: [[INNER_HEADER_US_US_US]]: 3998 ; CHECK-NEXT: br label %[[INNER_BODY1_US_US_US:.*]] 3999 ; 4000 ; CHECK: [[INNER_BODY1_US_US_US]]: 4001 ; CHECK-NEXT: %[[A:.*]] = call i32 @a() 4002 ; CHECK-NEXT: br label %[[INNER_LATCH_US_US_US:.*]] 4003 ; 4004 ; CHECK: [[INNER_LATCH_US_US_US]]: 4005 ; CHECK-NEXT: %[[PHI_A:.*]] = phi i32 [ %[[A]], %[[INNER_BODY1_US_US_US]] ] 4006 ; CHECK-NEXT: call void @sink1(i32 0) 4007 ; CHECK-NEXT: call void @sink1(i32 0) 4008 ; CHECK-NEXT: call void @sink1(i32 0) 4009 ; CHECK-NEXT: call void @sink1(i32 0) 4010 ; CHECK-NEXT: call void @sink1(i32 0) 4011 ; CHECK-NEXT: call void @sink1(i32 0) 4012 ; CHECK-NEXT: call void @sink1(i32 0) 4013 ; CHECK-NEXT: call void @sink1(i32 0) 4014 ; CHECK-NEXT: call void @sink1(i32 0) 4015 ; CHECK-NEXT: call void @sink1(i32 0) 4016 ; CHECK-NEXT: call void @sink1(i32 %[[PHI_A]]) 4017 ; CHECK-NEXT: %[[INNER_COND_US_US_US:.*]] = call i1 @cond() 4018 ; CHECK-NEXT: br i1 %[[INNER_COND_US_US_US]], label %[[INNER_HEADER_US_US_US]], label %[[INNER_LOOPEXIT2_SPLIT_US_US_US:.*]] 4019 ; 4020 ; CHECK: [[INNER_LOOPEXIT2_SPLIT_US_US_US]]: 4021 ; CHECK-NEXT: br label %[[INNER_LOOPEXIT2_US_US]] 4022 ; 4023 ; CHECK: [[EXIT_SPLIT_US_SPLIT_US]]: 4024 ; CHECK-NEXT: br label %[[EXIT_SPLIT_US:.*]] 4025 4026 4027 inner.body2: 4028 %b = call i32 @b() 4029 br label %inner.latch 4030 ; The fully unswitched loop around `@b`. 4031 ; 4032 ; CHECK: [[ENTRY_SPLIT_US_SPLIT]]: 4033 ; CHECK-NEXT: br label %[[OUTER_HEADER_US:.*]] 4034 ; 4035 ; CHECK: [[OUTER_HEADER_US]]: 4036 ; CHECK-NEXT: br label %[[OUTER_HEADER_SPLIT_US:.*]] 4037 ; 4038 ; CHECK: [[INNER_HEADER_US:.*]]: 4039 ; CHECK-NEXT: br label %[[INNER_BODY2_US:.*]] 4040 ; 4041 ; CHECK: [[INNER_BODY2_US]]: 4042 ; CHECK-NEXT: %[[B:.*]] = call i32 @b() 4043 ; CHECK-NEXT: br label %[[INNER_LATCH_US:.*]] 4044 ; 4045 ; CHECK: [[INNER_LATCH_US]]: 4046 ; CHECK-NEXT: call void @sink1(i32 0) 4047 ; CHECK-NEXT: call void @sink1(i32 0) 4048 ; CHECK-NEXT: call void @sink1(i32 0) 4049 ; CHECK-NEXT: call void @sink1(i32 0) 4050 ; CHECK-NEXT: call void @sink1(i32 0) 4051 ; CHECK-NEXT: call void @sink1(i32 0) 4052 ; CHECK-NEXT: call void @sink1(i32 0) 4053 ; CHECK-NEXT: call void @sink1(i32 0) 4054 ; CHECK-NEXT: call void @sink1(i32 0) 4055 ; CHECK-NEXT: call void @sink1(i32 0) 4056 ; CHECK-NEXT: call void @sink1(i32 %[[B]]) 4057 ; CHECK-NEXT: %[[INNER_COND_US:.*]] = call i1 @cond() 4058 ; CHECK-NEXT: br i1 %[[INNER_COND_US]], label %[[INNER_HEADER_US]], label %[[INNER_LOOPEXIT2_SPLIT_US:.*]] 4059 ; 4060 ; CHECK: [[INNER_LOOPEXIT2_SPLIT_US]]: 4061 ; CHECK-NEXT: br label %[[INNER_LOOPEXIT2_US:.*]] 4062 ; 4063 ; CHECK: [[OUTER_LATCH_US:.*]]: 4064 ; CHECK-NEXT: %[[OUTER_COND_US:.*]] = call i1 @cond() 4065 ; CHECK-NEXT: br i1 %[[OUTER_COND_US]], label %[[OUTER_HEADER_US]], label %[[EXIT_SPLIT_US_SPLIT:.*]] 4066 ; 4067 ; CHECK: [[OUTER_HEADER_SPLIT_US]]: 4068 ; CHECK-NEXT: br label %[[OUTER_HEADER_SPLIT_SPLIT_US:.*]] 4069 ; 4070 ; CHECK: [[OUTER_HEADER_SPLIT_SPLIT_US]]: 4071 ; CHECK-NEXT: br label %[[INNER_HEADER_US]] 4072 ; 4073 ; CHECK: [[INNER_LOOPEXIT2_US]]: 4074 ; CHECK-NEXT: br label %[[OUTER_LATCH_US]] 4075 ; 4076 ; CHECK: [[EXIT_SPLIT_US]]: 4077 ; CHECK-NEXT: br label %exit 4078 4079 inner.latch: 4080 %phi = phi i32 [ %a, %inner.body1 ], [ %b, %inner.body2 ] 4081 ; Make 10 junk calls here to ensure we're over the "50" cost threshold of 4082 ; non-trivial unswitching for this inner switch. 4083 call void @sink1(i32 0) 4084 call void @sink1(i32 0) 4085 call void @sink1(i32 0) 4086 call void @sink1(i32 0) 4087 call void @sink1(i32 0) 4088 call void @sink1(i32 0) 4089 call void @sink1(i32 0) 4090 call void @sink1(i32 0) 4091 call void @sink1(i32 0) 4092 call void @sink1(i32 0) 4093 call void @sink1(i32 %phi) 4094 %inner.cond = call i1 @cond() 4095 br i1 %inner.cond, label %inner.header, label %inner.loopexit2 4096 4097 inner.loopexit1: 4098 br label %outer.latch 4099 ; The unswitched `loopexit1` path. 4100 ; 4101 ; CHECK: [[ENTRY_SPLIT]]: 4102 ; CHECK-NEXT: br label %[[OUTER_HEADER:.*]] 4103 ; 4104 ; CHECK: outer.header: 4105 ; CHECK-NEXT: br label %inner.loopexit1 4106 ; 4107 ; CHECK: inner.loopexit1: 4108 ; CHECK-NEXT: br label %outer.latch 4109 ; 4110 ; CHECK: outer.latch: 4111 ; CHECK-NEXT: %outer.cond = call i1 @cond() 4112 ; CHECK-NEXT: br i1 %outer.cond, label %outer.header, label %[[EXIT_SPLIT:.*]] 4113 ; 4114 ; CHECK: [[EXIT_SPLIT]]: 4115 ; CHECK-NEXT: br label %exit 4116 4117 inner.loopexit2: 4118 br label %outer.latch 4119 4120 outer.latch: 4121 %outer.cond = call i1 @cond() 4122 br i1 %outer.cond, label %outer.header, label %exit 4123 4124 exit: 4125 ret void 4126 ; CHECK: exit: 4127 ; CHECK-NEXT: ret void 4128 } 4129
