1 ; RUN: opt -o /dev/null -structurizecfg %s 2 3 ; The following function caused an infinite loop inside the structurizer's 4 ; rebuildSSA routine, where we were iterating over an instruction's uses while 5 ; modifying the use list, without taking care to do this safely. 6 7 target triple = "amdgcn--" 8 9 define amdgpu_vs void @wrapper(i32 inreg %arg, i32 %arg1) { 10 main_body: 11 %tmp = add i32 %arg1, %arg 12 %tmp2 = call <4 x float> @llvm.amdgcn.buffer.load.format.v4f32(<4 x i32> undef, i32 %tmp, i32 0, i1 false, i1 false) 13 %tmp3 = extractelement <4 x float> %tmp2, i32 1 14 %tmp4 = fptosi float %tmp3 to i32 15 %tmp5 = insertelement <2 x i32> undef, i32 %tmp4, i32 1 16 br label %loop11.i 17 18 loop11.i: ; preds = %endif46.i, %main_body 19 %tmp6 = phi i32 [ 0, %main_body ], [ %tmp14, %endif46.i ] 20 %tmp7 = icmp sgt i32 %tmp6, 999 21 br i1 %tmp7, label %main.exit, label %if16.i 22 23 if16.i: ; preds = %loop11.i 24 %tmp8 = call <4 x float> @llvm.amdgcn.image.load.v4f32.v2i32.v8i32(<2 x i32> %tmp5, <8 x i32> undef, i32 15, i1 true, i1 false, i1 false, i1 false) 25 %tmp9 = extractelement <4 x float> %tmp8, i32 0 26 %tmp10 = fcmp ult float 0.000000e+00, %tmp9 27 br i1 %tmp10, label %if28.i, label %endif46.i 28 29 if28.i: ; preds = %if16.i 30 %tmp11 = bitcast float %tmp9 to i32 31 %tmp12 = shl i32 %tmp11, 16 32 %tmp13 = bitcast i32 %tmp12 to float 33 br label %main.exit 34 35 endif46.i: ; preds = %if16.i 36 %tmp14 = add i32 %tmp6, 1 37 br label %loop11.i 38 39 main.exit: ; preds = %if28.i, %loop11.i 40 %tmp15 = phi float [ %tmp13, %if28.i ], [ 0x36F0800000000000, %loop11.i ] 41 call void @llvm.amdgcn.exp.f32(i32 32, i32 15, float %tmp15, float 0.000000e+00, float 0.000000e+00, float 0x36A0000000000000, i1 false, i1 false) #0 42 ret void 43 } 44 45 ; Function Attrs: nounwind 46 declare void @llvm.amdgcn.exp.f32(i32, i32, float, float, float, float, i1, i1) #0 47 48 ; Function Attrs: nounwind readnone 49 declare <4 x float> @llvm.amdgcn.buffer.load.format.v4f32(<4 x i32>, i32, i32, i1, i1) #2 50 51 ; Function Attrs: nounwind readonly 52 declare <4 x float> @llvm.amdgcn.image.load.v4f32.v2i32.v8i32(<2 x i32>, <8 x i32>, i32, i1, i1, i1, i1) #2 53 54 attributes #0 = { nounwind } 55 attributes #1 = { nounwind readnone } 56 attributes #2 = { nounwind readonly } 57
