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      1 /* SPDX-License-Identifier: GPL-2.0+ */
      2 /*
      3  * Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
      4  */
      5 
      6 #include <asm-offsets.h>
      7 #include <config.h>
      8 #include <linux/linkage.h>
      9 #include <asm/arcregs.h>
     10 
     11 ENTRY(_start)
     12 	/* Setup interrupt vector base that matches "__text_start" */
     13 	sr	__ivt_start, [ARC_AUX_INTR_VEC_BASE]
     14 
     15 	; Disable/enable I-cache according to configuration
     16 	lr	r5, [ARC_BCR_IC_BUILD]
     17 	breq	r5, 0, 1f		; I$ doesn't exist
     18 	lr	r5, [ARC_AUX_IC_CTRL]
     19 #ifndef CONFIG_SYS_ICACHE_OFF
     20 	bclr	r5, r5, 0		; 0 - Enable, 1 is Disable
     21 #else
     22 	bset	r5, r5, 0		; I$ exists, but is not used
     23 #endif
     24 	sr	r5, [ARC_AUX_IC_CTRL]
     25 
     26 	mov	r5, 1
     27 	sr	r5, [ARC_AUX_IC_IVIC]
     28 	; As per ARC HS databook (see chapter 5.3.3.2)
     29 	; it is required to add 3 NOPs after each write to IC_IVIC.
     30 	nop
     31 	nop
     32 	nop
     33 
     34 1:
     35 	; Disable/enable D-cache according to configuration
     36 	lr	r5, [ARC_BCR_DC_BUILD]
     37 	breq	r5, 0, 1f		; D$ doesn't exist
     38 	lr	r5, [ARC_AUX_DC_CTRL]
     39 	bclr	r5, r5, 6		; Invalidate (discard w/o wback)
     40 #ifndef CONFIG_SYS_DCACHE_OFF
     41 	bclr	r5, r5, 0		; Enable (+Inv)
     42 #else
     43 	bset	r5, r5, 0		; Disable (+Inv)
     44 #endif
     45 	sr	r5, [ARC_AUX_DC_CTRL]
     46 
     47 	mov	r5, 1
     48 	sr	r5, [ARC_AUX_DC_IVDC]
     49 
     50 
     51 1:
     52 #ifdef CONFIG_ISA_ARCV2
     53 	; Disable System-Level Cache (SLC)
     54 	lr	r5, [ARC_BCR_SLC]
     55 	breq	r5, 0, 1f		; SLC doesn't exist
     56 	lr	r5, [ARC_AUX_SLC_CTRL]
     57 	bclr	r5, r5, 6		; Invalidate (discard w/o wback)
     58 	bclr	r5, r5, 0		; Enable (+Inv)
     59 	sr	r5, [ARC_AUX_SLC_CTRL]
     60 
     61 1:
     62 #endif
     63 
     64 	/* Establish C runtime stack and frame */
     65 	mov	%sp, CONFIG_SYS_INIT_SP_ADDR
     66 	mov	%fp, %sp
     67 
     68 	/* Allocate reserved area from current top of stack */
     69 	mov	%r0, %sp
     70 	bl	board_init_f_alloc_reserve
     71 	/* Set stack below reserved area, adjust frame pointer accordingly */
     72 	mov	%sp, %r0
     73 	mov	%fp, %sp
     74 
     75 	/* Initialize reserved area - note: r0 already contains address */
     76 	bl	board_init_f_init_reserve
     77 
     78 #ifdef CONFIG_DEBUG_UART
     79 	/* Earliest point to set up early debug uart */
     80 	bl	debug_uart_init
     81 #endif
     82 
     83 	/* Zero the one and only argument of "board_init_f" */
     84 	mov_s	%r0, 0
     85 	bl	board_init_f
     86 
     87 	/* We only get here if relocation is disabled by GD_FLG_SKIP_RELOC */
     88 	/* Make sure we don't lose GD overwritten by zero new GD */
     89 	mov	%r0, %r25
     90 	mov	%r1, 0
     91 	bl	board_init_r
     92 ENDPROC(_start)
     93 
     94 /*
     95  * void board_init_f_r_trampoline(stack-pointer address)
     96  *
     97  * This "function" does not return, instead it continues in RAM
     98  * after relocating the monitor code.
     99  *
    100  * r0 = new stack-pointer
    101  */
    102 ENTRY(board_init_f_r_trampoline)
    103 	/* Set up the stack- and frame-pointers */
    104 	mov	%sp, %r0
    105 	mov	%fp, %sp
    106 
    107 	/* Update position of intterupt vector table */
    108 	lr	%r0, [ARC_AUX_INTR_VEC_BASE]
    109 	ld	%r1, [%r25, GD_RELOC_OFF]
    110 	add	%r0, %r0, %r1
    111 	sr	%r0, [ARC_AUX_INTR_VEC_BASE]
    112 
    113 	/* Re-enter U-Boot by calling board_init_f_r */
    114 	j	board_init_f_r
    115 ENDPROC(board_init_f_r_trampoline)
    116