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      1 // SPDX-License-Identifier: GPL-2.0+
      2 /*
      3  * Copyright 2016 Freescale Semiconductor, Inc.
      4  */
      5 
      6 #include <common.h>
      7 #include <asm/arch/fsl_serdes.h>
      8 #include <asm/arch/immap_lsch2.h>
      9 
     10 struct serdes_config {
     11 	u32 protocol;
     12 	u8 lanes[SRDS_MAX_LANES];
     13 };
     14 
     15 static struct serdes_config serdes1_cfg_tbl[] = {
     16 	/* SerDes 1 */
     17 	{0x3333, {SGMII_FM1_DTSEC9, SGMII_FM1_DTSEC10, SGMII_FM1_DTSEC5,
     18 		  SGMII_FM1_DTSEC6} },
     19 	{0x1133, {XFI_FM1_MAC9, XFI_FM1_MAC10, SGMII_FM1_DTSEC5,
     20 		  SGMII_FM1_DTSEC6} },
     21 	{0x1333, {XFI_FM1_MAC9, SGMII_FM1_DTSEC10, SGMII_FM1_DTSEC5,
     22 		  SGMII_FM1_DTSEC6} },
     23 	{0x2333, {SGMII_2500_FM1_DTSEC9, SGMII_FM1_DTSEC10, SGMII_FM1_DTSEC5,
     24 		  SGMII_FM1_DTSEC6} },
     25 	{0x2233, {SGMII_2500_FM1_DTSEC9, SGMII_2500_FM1_DTSEC10,
     26 		  SGMII_FM1_DTSEC5, SGMII_FM1_DTSEC6} },
     27 	{0x1040, {XFI_FM1_MAC9, NONE, QSGMII_FM1_A, NONE} },
     28 	{0x2040, {SGMII_2500_FM1_DTSEC9, NONE, QSGMII_FM1_A, NONE} },
     29 	{0x1163, {XFI_FM1_MAC9, XFI_FM1_MAC10, PCIE1, SGMII_FM1_DTSEC6} },
     30 	{0x2263, {SGMII_2500_FM1_DTSEC9, SGMII_2500_FM1_DTSEC10, PCIE1,
     31 		  SGMII_FM1_DTSEC6} },
     32 	{0x3363, {SGMII_FM1_DTSEC5, SGMII_FM1_DTSEC6, PCIE1,
     33 		  SGMII_FM1_DTSEC6} },
     34 	{0x2223, {SGMII_2500_FM1_DTSEC9, SGMII_2500_FM1_DTSEC10,
     35 		  SGMII_2500_FM1_DTSEC5, SGMII_FM1_DTSEC6} },
     36 	{}
     37 };
     38 
     39 static struct serdes_config serdes2_cfg_tbl[] = {
     40 	/* SerDes 2 */
     41 	{0x8888, {PCIE1, PCIE1, PCIE1, PCIE1} },
     42 	{0x5559, {PCIE1, PCIE2, PCIE3, SATA1} },
     43 	{0x5577, {PCIE1, PCIE2, PCIE3, PCIE3} },
     44 	{0x5506, {PCIE1, PCIE2, NONE, PCIE3} },
     45 	{0x0506, {NONE, PCIE2, NONE, PCIE3} },
     46 	{0x0559, {NONE, PCIE2, PCIE3, SATA1} },
     47 	{0x5A59, {PCIE1, SGMII_FM1_DTSEC2, PCIE3, SATA1} },
     48 	{0x5A06, {PCIE1, SGMII_FM1_DTSEC2, NONE, PCIE3} },
     49 	{}
     50 };
     51 
     52 static struct serdes_config *serdes_cfg_tbl[] = {
     53 	serdes1_cfg_tbl,
     54 	serdes2_cfg_tbl,
     55 };
     56 
     57 enum srds_prtcl serdes_get_prtcl(int serdes, int cfg, int lane)
     58 {
     59 	struct serdes_config *ptr;
     60 
     61 	if (serdes >= ARRAY_SIZE(serdes_cfg_tbl))
     62 		return 0;
     63 
     64 	ptr = serdes_cfg_tbl[serdes];
     65 	while (ptr->protocol) {
     66 		if (ptr->protocol == cfg)
     67 			return ptr->lanes[lane];
     68 		ptr++;
     69 	}
     70 
     71 	return 0;
     72 }
     73 
     74 int is_serdes_prtcl_valid(int serdes, u32 prtcl)
     75 {
     76 	int i;
     77 	struct serdes_config *ptr;
     78 
     79 	if (serdes >= ARRAY_SIZE(serdes_cfg_tbl))
     80 		return 0;
     81 
     82 	ptr = serdes_cfg_tbl[serdes];
     83 	while (ptr->protocol) {
     84 		if (ptr->protocol == prtcl)
     85 			break;
     86 		ptr++;
     87 	}
     88 
     89 	if (!ptr->protocol)
     90 		return 0;
     91 
     92 	for (i = 0; i < SRDS_MAX_LANES; i++) {
     93 		if (ptr->lanes[i] != NONE)
     94 			return 1;
     95 	}
     96 
     97 	return 0;
     98 }
     99