1 /* 2 * at91sam9260.dtsi - Device Tree Include file for AT91SAM9260 family SoC 3 * 4 * Copyright (C) 2011 Atmel, 5 * 2011 Nicolas Ferre <nicolas.ferre (at) atmel.com>, 6 * 2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj (at) jcrosoft.com> 7 * 8 * Licensed under GPLv2 or later. 9 */ 10 11 #include "skeleton.dtsi" 12 #include <dt-bindings/pinctrl/at91.h> 13 #include <dt-bindings/interrupt-controller/irq.h> 14 #include <dt-bindings/gpio/gpio.h> 15 #include <dt-bindings/clock/at91.h> 16 17 / { 18 model = "Atmel AT91SAM9260 family SoC"; 19 compatible = "atmel,at91sam9260"; 20 interrupt-parent = <&aic>; 21 22 aliases { 23 serial0 = &dbgu; 24 serial1 = &usart0; 25 serial2 = &usart1; 26 serial3 = &usart2; 27 serial4 = &usart3; 28 serial5 = &uart0; 29 serial6 = &uart1; 30 gpio0 = &pioA; 31 gpio1 = &pioB; 32 gpio2 = &pioC; 33 tcb0 = &tcb0; 34 tcb1 = &tcb1; 35 i2c0 = &i2c0; 36 ssc0 = &ssc0; 37 spi0 = &spi0; 38 }; 39 cpus { 40 #address-cells = <0>; 41 #size-cells = <0>; 42 43 cpu { 44 compatible = "arm,arm926ej-s"; 45 device_type = "cpu"; 46 }; 47 }; 48 49 memory { 50 reg = <0x20000000 0x04000000>; 51 }; 52 53 clocks { 54 slow_xtal: slow_xtal { 55 compatible = "fixed-clock"; 56 #clock-cells = <0>; 57 clock-frequency = <0>; 58 }; 59 60 main_xtal: main_xtal { 61 compatible = "fixed-clock"; 62 #clock-cells = <0>; 63 clock-frequency = <0>; 64 }; 65 66 adc_op_clk: adc_op_clk{ 67 compatible = "fixed-clock"; 68 #clock-cells = <0>; 69 clock-frequency = <5000000>; 70 }; 71 }; 72 73 sram0: sram@002ff000 { 74 compatible = "mmio-sram"; 75 reg = <0x002ff000 0x2000>; 76 }; 77 78 ahb { 79 compatible = "simple-bus"; 80 #address-cells = <1>; 81 #size-cells = <1>; 82 ranges; 83 u-boot,dm-pre-reloc; 84 85 apb { 86 compatible = "simple-bus"; 87 #address-cells = <1>; 88 #size-cells = <1>; 89 ranges; 90 u-boot,dm-pre-reloc; 91 92 aic: interrupt-controller@fffff000 { 93 #interrupt-cells = <3>; 94 compatible = "atmel,at91rm9200-aic"; 95 interrupt-controller; 96 reg = <0xfffff000 0x200>; 97 atmel,external-irqs = <29 30 31>; 98 }; 99 100 ramc0: ramc@ffffea00 { 101 compatible = "atmel,at91sam9260-sdramc"; 102 reg = <0xffffea00 0x200>; 103 }; 104 105 pmc: pmc@fffffc00 { 106 compatible = "atmel,at91sam9260-pmc", "syscon"; 107 reg = <0xfffffc00 0x100>; 108 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 109 interrupt-controller; 110 #address-cells = <1>; 111 #size-cells = <0>; 112 #interrupt-cells = <1>; 113 u-boot,dm-pre-reloc; 114 115 main_osc: main_osc { 116 compatible = "atmel,at91rm9200-clk-main-osc"; 117 #clock-cells = <0>; 118 interrupts-extended = <&pmc AT91_PMC_MOSCS>; 119 clocks = <&main_xtal>; 120 }; 121 122 main: mainck { 123 compatible = "atmel,at91rm9200-clk-main"; 124 #clock-cells = <0>; 125 clocks = <&main_osc>; 126 }; 127 128 slow_rc_osc: slow_rc_osc { 129 compatible = "fixed-clock"; 130 #clock-cells = <0>; 131 clock-frequency = <32768>; 132 clock-accuracy = <50000000>; 133 }; 134 135 clk32k: slck { 136 compatible = "atmel,at91sam9260-clk-slow"; 137 #clock-cells = <0>; 138 clocks = <&slow_rc_osc>, <&slow_xtal>; 139 }; 140 141 plla: pllack@0 { 142 compatible = "atmel,at91rm9200-clk-pll"; 143 #clock-cells = <0>; 144 interrupts-extended = <&pmc AT91_PMC_LOCKA>; 145 clocks = <&main>; 146 reg = <0>; 147 atmel,clk-input-range = <1000000 32000000>; 148 #atmel,pll-clk-output-range-cells = <4>; 149 atmel,pll-clk-output-ranges = <80000000 160000000 0 1>, 150 <150000000 240000000 2 1>; 151 }; 152 153 pllb: pllbck@1 { 154 compatible = "atmel,at91rm9200-clk-pll"; 155 #clock-cells = <0>; 156 interrupts-extended = <&pmc AT91_PMC_LOCKB>; 157 clocks = <&main>; 158 reg = <1>; 159 atmel,clk-input-range = <1000000 5000000>; 160 #atmel,pll-clk-output-range-cells = <4>; 161 atmel,pll-clk-output-ranges = <70000000 130000000 1 1>; 162 }; 163 164 mck: masterck { 165 compatible = "atmel,at91rm9200-clk-master"; 166 #clock-cells = <0>; 167 interrupts-extended = <&pmc AT91_PMC_MCKRDY>; 168 clocks = <&clk32k>, <&main>, <&plla>, <&pllb>; 169 atmel,clk-output-range = <0 105000000>; 170 atmel,clk-divisors = <1 2 4 0>; 171 u-boot,dm-pre-reloc; 172 }; 173 174 usb: usbck { 175 compatible = "atmel,at91rm9200-clk-usb"; 176 #clock-cells = <0>; 177 atmel,clk-divisors = <1 2 4 0>; 178 clocks = <&pllb>; 179 }; 180 181 prog: progck { 182 compatible = "atmel,at91rm9200-clk-programmable"; 183 #address-cells = <1>; 184 #size-cells = <0>; 185 interrupt-parent = <&pmc>; 186 clocks = <&clk32k>, <&main>, <&plla>, <&pllb>; 187 188 prog0: prog@0 { 189 #clock-cells = <0>; 190 reg = <0>; 191 interrupts = <AT91_PMC_PCKRDY(0)>; 192 }; 193 194 prog1: prog@1 { 195 #clock-cells = <0>; 196 reg = <1>; 197 interrupts = <AT91_PMC_PCKRDY(1)>; 198 }; 199 }; 200 201 systemck { 202 compatible = "atmel,at91rm9200-clk-system"; 203 #address-cells = <1>; 204 #size-cells = <0>; 205 206 uhpck: uhpck@6 { 207 #clock-cells = <0>; 208 reg = <6>; 209 clocks = <&usb>; 210 }; 211 212 udpck: udpck@7 { 213 #clock-cells = <0>; 214 reg = <7>; 215 clocks = <&usb>; 216 }; 217 218 pck0: pck0@8 { 219 #clock-cells = <0>; 220 reg = <8>; 221 clocks = <&prog0>; 222 }; 223 224 pck1: pck1@9 { 225 #clock-cells = <0>; 226 reg = <9>; 227 clocks = <&prog1>; 228 }; 229 }; 230 231 periphck { 232 compatible = "atmel,at91rm9200-clk-peripheral"; 233 #address-cells = <1>; 234 #size-cells = <0>; 235 clocks = <&mck>; 236 u-boot,dm-pre-reloc; 237 238 pioA_clk: pioA_clk@2 { 239 #clock-cells = <0>; 240 reg = <2>; 241 u-boot,dm-pre-reloc; 242 }; 243 244 pioB_clk: pioB_clk@3 { 245 #clock-cells = <0>; 246 reg = <3>; 247 u-boot,dm-pre-reloc; 248 }; 249 250 pioC_clk: pioC_clk@4 { 251 #clock-cells = <0>; 252 reg = <4>; 253 u-boot,dm-pre-reloc; 254 }; 255 256 adc_clk: adc_clk@5 { 257 #clock-cells = <0>; 258 reg = <5>; 259 }; 260 261 usart0_clk: usart0_clk@6 { 262 #clock-cells = <0>; 263 reg = <6>; 264 }; 265 266 usart1_clk: usart1_clk@7 { 267 #clock-cells = <0>; 268 reg = <7>; 269 }; 270 271 usart2_clk: usart2_clk@8 { 272 #clock-cells = <0>; 273 reg = <8>; 274 }; 275 276 mci0_clk: mci0_clk@9 { 277 #clock-cells = <0>; 278 reg = <9>; 279 }; 280 281 udc_clk: udc_clk@10 { 282 #clock-cells = <0>; 283 reg = <10>; 284 }; 285 286 twi0_clk: twi0_clk@11 { 287 reg = <11>; 288 #clock-cells = <0>; 289 }; 290 291 spi0_clk: spi0_clk@12 { 292 #clock-cells = <0>; 293 reg = <12>; 294 }; 295 296 spi1_clk: spi1_clk@13 { 297 #clock-cells = <0>; 298 reg = <13>; 299 }; 300 301 ssc0_clk: ssc0_clk@14 { 302 #clock-cells = <0>; 303 reg = <14>; 304 }; 305 306 tc0_clk: tc0_clk@17 { 307 #clock-cells = <0>; 308 reg = <17>; 309 }; 310 311 tc1_clk: tc1_clk@18 { 312 #clock-cells = <0>; 313 reg = <18>; 314 }; 315 316 tc2_clk: tc2_clk@19 { 317 #clock-cells = <0>; 318 reg = <19>; 319 }; 320 321 ohci_clk: ohci_clk@20 { 322 #clock-cells = <0>; 323 reg = <20>; 324 }; 325 326 macb0_clk: macb0_clk@21 { 327 #clock-cells = <0>; 328 reg = <21>; 329 }; 330 331 isi_clk: isi_clk@22 { 332 #clock-cells = <0>; 333 reg = <22>; 334 }; 335 336 usart3_clk: usart3_clk@23 { 337 #clock-cells = <0>; 338 reg = <23>; 339 }; 340 341 uart0_clk: uart0_clk@24 { 342 #clock-cells = <0>; 343 reg = <24>; 344 }; 345 346 uart1_clk: uart1_clk@25 { 347 #clock-cells = <0>; 348 reg = <25>; 349 }; 350 351 tc3_clk: tc3_clk@26 { 352 #clock-cells = <0>; 353 reg = <26>; 354 }; 355 356 tc4_clk: tc4_clk@27 { 357 #clock-cells = <0>; 358 reg = <27>; 359 }; 360 361 tc5_clk: tc5_clk@28 { 362 #clock-cells = <0>; 363 reg = <28>; 364 }; 365 }; 366 }; 367 368 rstc@fffffd00 { 369 compatible = "atmel,at91sam9260-rstc"; 370 reg = <0xfffffd00 0x10>; 371 clocks = <&clk32k>; 372 }; 373 374 shdwc@fffffd10 { 375 compatible = "atmel,at91sam9260-shdwc"; 376 reg = <0xfffffd10 0x10>; 377 clocks = <&clk32k>; 378 }; 379 380 pit: timer@fffffd30 { 381 compatible = "atmel,at91sam9260-pit"; 382 reg = <0xfffffd30 0xf>; 383 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 384 clocks = <&mck>; 385 }; 386 387 tcb0: timer@fffa0000 { 388 compatible = "atmel,at91rm9200-tcb"; 389 reg = <0xfffa0000 0x100>; 390 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0 391 18 IRQ_TYPE_LEVEL_HIGH 0 392 19 IRQ_TYPE_LEVEL_HIGH 0>; 393 clocks = <&tc0_clk>, <&tc1_clk>, <&tc2_clk>, <&clk32k>; 394 clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk"; 395 }; 396 397 tcb1: timer@fffdc000 { 398 compatible = "atmel,at91rm9200-tcb"; 399 reg = <0xfffdc000 0x100>; 400 interrupts = <26 IRQ_TYPE_LEVEL_HIGH 0 401 27 IRQ_TYPE_LEVEL_HIGH 0 402 28 IRQ_TYPE_LEVEL_HIGH 0>; 403 clocks = <&tc3_clk>, <&tc4_clk>, <&tc5_clk>, <&clk32k>; 404 clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk"; 405 }; 406 407 pioA: gpio@fffff400 { 408 compatible = "atmel,at91rm9200-gpio"; 409 reg = <0xfffff400 0x200>; 410 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>; 411 #gpio-cells = <2>; 412 gpio-controller; 413 interrupt-controller; 414 #interrupt-cells = <2>; 415 clocks = <&pioA_clk>; 416 u-boot,dm-pre-reloc; 417 }; 418 419 pioB: gpio@fffff600 { 420 compatible = "atmel,at91rm9200-gpio"; 421 reg = <0xfffff600 0x200>; 422 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>; 423 #gpio-cells = <2>; 424 gpio-controller; 425 interrupt-controller; 426 #interrupt-cells = <2>; 427 clocks = <&pioB_clk>; 428 u-boot,dm-pre-reloc; 429 }; 430 431 pioC: gpio@fffff800 { 432 compatible = "atmel,at91rm9200-gpio"; 433 reg = <0xfffff800 0x200>; 434 interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>; 435 #gpio-cells = <2>; 436 gpio-controller; 437 interrupt-controller; 438 #interrupt-cells = <2>; 439 clocks = <&pioC_clk>; 440 u-boot,dm-pre-reloc; 441 }; 442 443 pinctrl@fffff400 { 444 #address-cells = <1>; 445 #size-cells = <1>; 446 compatible = "atmel,at91rm9200-pinctrl", "simple-bus"; 447 ranges = <0xfffff400 0xfffff400 0x600>; 448 reg = <0xfffff400 0x200 /* pioA */ 449 0xfffff600 0x200 /* pioB */ 450 0xfffff800 0x200 /* pioC */ 451 >; 452 453 atmel,mux-mask = < 454 /* A B */ 455 0xffffffff 0xffc00c3b /* pioA */ 456 0xffffffff 0x7fff3ccf /* pioB */ 457 0xffffffff 0x007fffff /* pioC */ 458 >; 459 u-boot,dm-pre-reloc; 460 461 /* shared pinctrl settings */ 462 dbgu { 463 u-boot,dm-pre-reloc; 464 pinctrl_dbgu: dbgu-0 { 465 atmel,pins = 466 <AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB14 periph A */ 467 AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PB15 periph with pullup */ 468 }; 469 }; 470 471 usart0 { 472 pinctrl_usart0: usart0-0 { 473 atmel,pins = 474 <AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB4 periph A */ 475 AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB5 periph A */ 476 }; 477 478 pinctrl_usart0_rts: usart0_rts-0 { 479 atmel,pins = 480 <AT91_PIOB 26 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB26 periph A */ 481 }; 482 483 pinctrl_usart0_cts: usart0_cts-0 { 484 atmel,pins = 485 <AT91_PIOB 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB27 periph A */ 486 }; 487 488 pinctrl_usart0_dtr_dsr: usart0_dtr_dsr-0 { 489 atmel,pins = 490 <AT91_PIOB 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB24 periph A */ 491 AT91_PIOB 22 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB22 periph A */ 492 }; 493 494 pinctrl_usart0_dcd: usart0_dcd-0 { 495 atmel,pins = 496 <AT91_PIOB 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB23 periph A */ 497 }; 498 499 pinctrl_usart0_ri: usart0_ri-0 { 500 atmel,pins = 501 <AT91_PIOB 25 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB25 periph A */ 502 }; 503 }; 504 505 usart1 { 506 pinctrl_usart1: usart1-0 { 507 atmel,pins = 508 <AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB6 periph A with pullup */ 509 AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB7 periph A */ 510 }; 511 512 pinctrl_usart1_rts: usart1_rts-0 { 513 atmel,pins = 514 <AT91_PIOB 28 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB28 periph A */ 515 }; 516 517 pinctrl_usart1_cts: usart1_cts-0 { 518 atmel,pins = 519 <AT91_PIOB 29 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB29 periph A */ 520 }; 521 }; 522 523 usart2 { 524 pinctrl_usart2: usart2-0 { 525 atmel,pins = 526 <AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB8 periph A with pullup */ 527 AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB9 periph A */ 528 }; 529 530 pinctrl_usart2_rts: usart2_rts-0 { 531 atmel,pins = 532 <AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA4 periph A */ 533 }; 534 535 pinctrl_usart2_cts: usart2_cts-0 { 536 atmel,pins = 537 <AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA5 periph A */ 538 }; 539 }; 540 541 usart3 { 542 pinctrl_usart3: usart3-0 { 543 atmel,pins = 544 <AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB10 periph A with pullup */ 545 AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB11 periph A */ 546 }; 547 548 pinctrl_usart3_rts: usart3_rts-0 { 549 atmel,pins = 550 <AT91_PIOC 8 AT91_PERIPH_B AT91_PINCTRL_NONE>; 551 }; 552 553 pinctrl_usart3_cts: usart3_cts-0 { 554 atmel,pins = 555 <AT91_PIOC 10 AT91_PERIPH_B AT91_PINCTRL_NONE>; 556 }; 557 }; 558 559 uart0 { 560 pinctrl_uart0: uart0-0 { 561 atmel,pins = 562 <AT91_PIOA 31 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA31 periph B with pullup */ 563 AT91_PIOA 30 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA30 periph B */ 564 }; 565 }; 566 567 uart1 { 568 pinctrl_uart1: uart1-0 { 569 atmel,pins = 570 <AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB12 periph A with pullup */ 571 AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB13 periph A */ 572 }; 573 }; 574 575 nand { 576 pinctrl_nand: nand-0 { 577 atmel,pins = 578 <AT91_PIOC 13 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PC13 gpio RDY pin pull_up */ 579 AT91_PIOC 14 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; /* PC14 gpio enable pin pull_up */ 580 }; 581 }; 582 583 macb { 584 pinctrl_macb_rmii: macb_rmii-0 { 585 atmel,pins = 586 <AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA12 periph A */ 587 AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA13 periph A */ 588 AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA14 periph A */ 589 AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA15 periph A */ 590 AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA16 periph A */ 591 AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA17 periph A */ 592 AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA18 periph A */ 593 AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA19 periph A */ 594 AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA20 periph A */ 595 AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA21 periph A */ 596 }; 597 598 pinctrl_macb_rmii_mii: macb_rmii_mii-0 { 599 atmel,pins = 600 <AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA22 periph B */ 601 AT91_PIOA 23 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA23 periph B */ 602 AT91_PIOA 24 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA24 periph B */ 603 AT91_PIOA 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA25 periph B */ 604 AT91_PIOA 26 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA26 periph B */ 605 AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA27 periph B */ 606 AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA28 periph B */ 607 AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA29 periph B */ 608 }; 609 610 pinctrl_macb_rmii_mii_alt: macb_rmii_mii-1 { 611 atmel,pins = 612 <AT91_PIOA 10 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA10 periph B */ 613 AT91_PIOA 11 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA11 periph B */ 614 AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA22 periph B */ 615 AT91_PIOA 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA25 periph B */ 616 AT91_PIOA 26 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA26 periph B */ 617 AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA27 periph B */ 618 AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA28 periph B */ 619 AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA29 periph B */ 620 }; 621 }; 622 623 mmc0 { 624 pinctrl_mmc0_clk: mmc0_clk-0 { 625 atmel,pins = 626 <AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA8 periph A */ 627 }; 628 629 pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 { 630 atmel,pins = 631 <AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA7 periph A with pullup */ 632 AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA6 periph A with pullup */ 633 }; 634 635 pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 { 636 atmel,pins = 637 <AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA9 periph A with pullup */ 638 AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA10 periph A with pullup */ 639 AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA11 periph A with pullup */ 640 }; 641 642 pinctrl_mmc0_slot1_cmd_dat0: mmc0_slot1_cmd_dat0-0 { 643 atmel,pins = 644 <AT91_PIOA 1 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA1 periph B with pullup */ 645 AT91_PIOA 0 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA0 periph B with pullup */ 646 }; 647 648 pinctrl_mmc0_slot1_dat1_3: mmc0_slot1_dat1_3-0 { 649 atmel,pins = 650 <AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA5 periph B with pullup */ 651 AT91_PIOA 4 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA4 periph B with pullup */ 652 AT91_PIOA 3 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA3 periph B with pullup */ 653 }; 654 }; 655 656 ssc0 { 657 pinctrl_ssc0_tx: ssc0_tx-0 { 658 atmel,pins = 659 <AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB16 periph A */ 660 AT91_PIOB 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB17 periph A */ 661 AT91_PIOB 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB18 periph A */ 662 }; 663 664 pinctrl_ssc0_rx: ssc0_rx-0 { 665 atmel,pins = 666 <AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB19 periph A */ 667 AT91_PIOB 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB20 periph A */ 668 AT91_PIOB 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB21 periph A */ 669 }; 670 }; 671 672 spi0 { 673 pinctrl_spi0: spi0-0 { 674 atmel,pins = 675 <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA0 periph A SPI0_MISO pin */ 676 AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA1 periph A SPI0_MOSI pin */ 677 AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA2 periph A SPI0_SPCK pin */ 678 }; 679 }; 680 681 spi1 { 682 pinctrl_spi1: spi1-0 { 683 atmel,pins = 684 <AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB0 periph A SPI1_MISO pin */ 685 AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB1 periph A SPI1_MOSI pin */ 686 AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB2 periph A SPI1_SPCK pin */ 687 }; 688 }; 689 690 i2c_gpio0 { 691 pinctrl_i2c_gpio0: i2c_gpio0-0 { 692 atmel,pins = 693 <AT91_PIOA 23 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE 694 AT91_PIOA 24 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>; 695 }; 696 }; 697 698 tcb0 { 699 pinctrl_tcb0_tclk0: tcb0_tclk0-0 { 700 atmel,pins = <AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_NONE>; 701 }; 702 703 pinctrl_tcb0_tclk1: tcb0_tclk1-0 { 704 atmel,pins = <AT91_PIOB 6 AT91_PERIPH_B AT91_PINCTRL_NONE>; 705 }; 706 707 pinctrl_tcb0_tclk2: tcb0_tclk2-0 { 708 atmel,pins = <AT91_PIOB 7 AT91_PERIPH_B AT91_PINCTRL_NONE>; 709 }; 710 711 pinctrl_tcb0_tioa0: tcb0_tioa0-0 { 712 atmel,pins = <AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_NONE>; 713 }; 714 715 pinctrl_tcb0_tioa1: tcb0_tioa1-0 { 716 atmel,pins = <AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; 717 }; 718 719 pinctrl_tcb0_tioa2: tcb0_tioa2-0 { 720 atmel,pins = <AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_NONE>; 721 }; 722 723 pinctrl_tcb0_tiob0: tcb0_tiob0-0 { 724 atmel,pins = <AT91_PIOC 9 AT91_PERIPH_B AT91_PINCTRL_NONE>; 725 }; 726 727 pinctrl_tcb0_tiob1: tcb0_tiob1-0 { 728 atmel,pins = <AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE>; 729 }; 730 731 pinctrl_tcb0_tiob2: tcb0_tiob2-0 { 732 atmel,pins = <AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE>; 733 }; 734 }; 735 736 tcb1 { 737 pinctrl_tcb1_tclk0: tcb1_tclk0-0 { 738 atmel,pins = <AT91_PIOB 16 AT91_PERIPH_B AT91_PINCTRL_NONE>; 739 }; 740 741 pinctrl_tcb1_tclk1: tcb1_tclk1-0 { 742 atmel,pins = <AT91_PIOB 17 AT91_PERIPH_B AT91_PINCTRL_NONE>; 743 }; 744 745 pinctrl_tcb1_tclk2: tcb1_tclk2-0 { 746 atmel,pins = <AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE>; 747 }; 748 749 pinctrl_tcb1_tioa0: tcb1_tioa0-0 { 750 atmel,pins = <AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE>; 751 }; 752 753 pinctrl_tcb1_tioa1: tcb1_tioa1-0 { 754 atmel,pins = <AT91_PIOB 2 AT91_PERIPH_B AT91_PINCTRL_NONE>; 755 }; 756 757 pinctrl_tcb1_tioa2: tcb1_tioa2-0 { 758 atmel,pins = <AT91_PIOB 3 AT91_PERIPH_B AT91_PINCTRL_NONE>; 759 }; 760 761 pinctrl_tcb1_tiob0: tcb1_tiob0-0 { 762 atmel,pins = <AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE>; 763 }; 764 765 pinctrl_tcb1_tiob1: tcb1_tiob1-0 { 766 atmel,pins = <AT91_PIOB 18 AT91_PERIPH_B AT91_PINCTRL_NONE>; 767 }; 768 769 pinctrl_tcb1_tiob2: tcb1_tiob2-0 { 770 atmel,pins = <AT91_PIOB 19 AT91_PERIPH_B AT91_PINCTRL_NONE>; 771 }; 772 }; 773 }; 774 775 dbgu: serial@fffff200 { 776 compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart"; 777 reg = <0xfffff200 0x200>; 778 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 779 pinctrl-names = "default"; 780 pinctrl-0 = <&pinctrl_dbgu>; 781 clocks = <&mck>; 782 clock-names = "usart"; 783 status = "disabled"; 784 }; 785 786 usart0: serial@fffb0000 { 787 compatible = "atmel,at91sam9260-usart"; 788 reg = <0xfffb0000 0x200>; 789 interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>; 790 atmel,use-dma-rx; 791 atmel,use-dma-tx; 792 pinctrl-names = "default"; 793 pinctrl-0 = <&pinctrl_usart0>; 794 clocks = <&usart0_clk>; 795 clock-names = "usart"; 796 status = "disabled"; 797 }; 798 799 usart1: serial@fffb4000 { 800 compatible = "atmel,at91sam9260-usart"; 801 reg = <0xfffb4000 0x200>; 802 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>; 803 atmel,use-dma-rx; 804 atmel,use-dma-tx; 805 pinctrl-names = "default"; 806 pinctrl-0 = <&pinctrl_usart1>; 807 clocks = <&usart1_clk>; 808 clock-names = "usart"; 809 status = "disabled"; 810 }; 811 812 usart2: serial@fffb8000 { 813 compatible = "atmel,at91sam9260-usart"; 814 reg = <0xfffb8000 0x200>; 815 interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>; 816 atmel,use-dma-rx; 817 atmel,use-dma-tx; 818 pinctrl-names = "default"; 819 pinctrl-0 = <&pinctrl_usart2>; 820 clocks = <&usart2_clk>; 821 clock-names = "usart"; 822 status = "disabled"; 823 }; 824 825 usart3: serial@fffd0000 { 826 compatible = "atmel,at91sam9260-usart"; 827 reg = <0xfffd0000 0x200>; 828 interrupts = <23 IRQ_TYPE_LEVEL_HIGH 5>; 829 atmel,use-dma-rx; 830 atmel,use-dma-tx; 831 pinctrl-names = "default"; 832 pinctrl-0 = <&pinctrl_usart3>; 833 clocks = <&usart3_clk>; 834 clock-names = "usart"; 835 status = "disabled"; 836 }; 837 838 uart0: serial@fffd4000 { 839 compatible = "atmel,at91sam9260-usart"; 840 reg = <0xfffd4000 0x200>; 841 interrupts = <24 IRQ_TYPE_LEVEL_HIGH 5>; 842 atmel,use-dma-rx; 843 atmel,use-dma-tx; 844 pinctrl-names = "default"; 845 pinctrl-0 = <&pinctrl_uart0>; 846 clocks = <&uart0_clk>; 847 clock-names = "usart"; 848 status = "disabled"; 849 }; 850 851 uart1: serial@fffd8000 { 852 compatible = "atmel,at91sam9260-usart"; 853 reg = <0xfffd8000 0x200>; 854 interrupts = <25 IRQ_TYPE_LEVEL_HIGH 5>; 855 atmel,use-dma-rx; 856 atmel,use-dma-tx; 857 pinctrl-names = "default"; 858 pinctrl-0 = <&pinctrl_uart1>; 859 clocks = <&uart1_clk>; 860 clock-names = "usart"; 861 status = "disabled"; 862 }; 863 864 macb0: ethernet@fffc4000 { 865 compatible = "cdns,at91sam9260-macb", "cdns,macb"; 866 reg = <0xfffc4000 0x100>; 867 interrupts = <21 IRQ_TYPE_LEVEL_HIGH 3>; 868 pinctrl-names = "default"; 869 pinctrl-0 = <&pinctrl_macb_rmii>; 870 clocks = <&macb0_clk>, <&macb0_clk>; 871 clock-names = "hclk", "pclk"; 872 status = "disabled"; 873 }; 874 875 usb1: gadget@fffa4000 { 876 compatible = "atmel,at91sam9260-udc"; 877 reg = <0xfffa4000 0x4000>; 878 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 2>; 879 clocks = <&udc_clk>, <&udpck>; 880 clock-names = "pclk", "hclk"; 881 status = "disabled"; 882 }; 883 884 i2c0: i2c@fffac000 { 885 compatible = "atmel,at91sam9260-i2c"; 886 reg = <0xfffac000 0x100>; 887 interrupts = <11 IRQ_TYPE_LEVEL_HIGH 6>; 888 #address-cells = <1>; 889 #size-cells = <0>; 890 clocks = <&twi0_clk>; 891 status = "disabled"; 892 }; 893 894 mmc0: mmc@fffa8000 { 895 compatible = "atmel,hsmci"; 896 reg = <0xfffa8000 0x600>; 897 interrupts = <9 IRQ_TYPE_LEVEL_HIGH 0>; 898 #address-cells = <1>; 899 #size-cells = <0>; 900 pinctrl-names = "default"; 901 clocks = <&mci0_clk>; 902 clock-names = "mci_clk"; 903 status = "disabled"; 904 }; 905 906 ssc0: ssc@fffbc000 { 907 compatible = "atmel,at91rm9200-ssc"; 908 reg = <0xfffbc000 0x4000>; 909 interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>; 910 pinctrl-names = "default"; 911 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>; 912 clocks = <&ssc0_clk>; 913 clock-names = "pclk"; 914 status = "disabled"; 915 }; 916 917 spi0: spi@fffc8000 { 918 #address-cells = <1>; 919 #size-cells = <0>; 920 compatible = "atmel,at91rm9200-spi"; 921 reg = <0xfffc8000 0x200>; 922 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 3>; 923 pinctrl-names = "default"; 924 pinctrl-0 = <&pinctrl_spi0>; 925 clocks = <&spi0_clk>; 926 clock-names = "spi_clk"; 927 status = "disabled"; 928 }; 929 930 spi1: spi@fffcc000 { 931 #address-cells = <1>; 932 #size-cells = <0>; 933 compatible = "atmel,at91rm9200-spi"; 934 reg = <0xfffcc000 0x200>; 935 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>; 936 pinctrl-names = "default"; 937 pinctrl-0 = <&pinctrl_spi1>; 938 clocks = <&spi1_clk>; 939 clock-names = "spi_clk"; 940 status = "disabled"; 941 }; 942 943 adc0: adc@fffe0000 { 944 #address-cells = <1>; 945 #size-cells = <0>; 946 compatible = "atmel,at91sam9260-adc"; 947 reg = <0xfffe0000 0x100>; 948 interrupts = <5 IRQ_TYPE_LEVEL_HIGH 0>; 949 clocks = <&adc_clk>, <&adc_op_clk>; 950 clock-names = "adc_clk", "adc_op_clk"; 951 atmel,adc-use-external-triggers; 952 atmel,adc-channels-used = <0xf>; 953 atmel,adc-vref = <3300>; 954 atmel,adc-startup-time = <15>; 955 atmel,adc-res = <8 10>; 956 atmel,adc-res-names = "lowres", "highres"; 957 atmel,adc-use-res = "highres"; 958 959 trigger@0 { 960 reg = <0>; 961 trigger-name = "timer-counter-0"; 962 trigger-value = <0x1>; 963 }; 964 trigger@1 { 965 reg = <1>; 966 trigger-name = "timer-counter-1"; 967 trigger-value = <0x3>; 968 }; 969 970 trigger@2 { 971 reg = <2>; 972 trigger-name = "timer-counter-2"; 973 trigger-value = <0x5>; 974 }; 975 976 trigger@3 { 977 reg = <3>; 978 trigger-name = "external"; 979 trigger-value = <0xd>; 980 trigger-external; 981 }; 982 }; 983 984 rtc@fffffd20 { 985 compatible = "atmel,at91sam9260-rtt"; 986 reg = <0xfffffd20 0x10>; 987 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 988 clocks = <&clk32k>; 989 status = "disabled"; 990 }; 991 992 watchdog@fffffd40 { 993 compatible = "atmel,at91sam9260-wdt"; 994 reg = <0xfffffd40 0x10>; 995 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 996 clocks = <&clk32k>; 997 atmel,watchdog-type = "hardware"; 998 atmel,reset-type = "all"; 999 atmel,dbg-halt; 1000 status = "disabled"; 1001 }; 1002 1003 gpbr: syscon@fffffd50 { 1004 compatible = "atmel,at91sam9260-gpbr", "syscon"; 1005 reg = <0xfffffd50 0x10>; 1006 status = "disabled"; 1007 }; 1008 }; 1009 1010 nand0: nand@40000000 { 1011 compatible = "atmel,at91rm9200-nand"; 1012 #address-cells = <1>; 1013 #size-cells = <1>; 1014 reg = <0x40000000 0x10000000 1015 0xffffe800 0x200 1016 >; 1017 atmel,nand-addr-offset = <21>; 1018 atmel,nand-cmd-offset = <22>; 1019 pinctrl-names = "default"; 1020 pinctrl-0 = <&pinctrl_nand>; 1021 gpios = <&pioC 13 GPIO_ACTIVE_HIGH 1022 &pioC 14 GPIO_ACTIVE_HIGH 1023 0 1024 >; 1025 status = "disabled"; 1026 }; 1027 1028 usb0: ohci@00500000 { 1029 compatible = "atmel,at91rm9200-ohci", "usb-ohci"; 1030 reg = <0x00500000 0x100000>; 1031 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 2>; 1032 clocks = <&ohci_clk>, <&ohci_clk>, <&uhpck>; 1033 clock-names = "ohci_clk", "hclk", "uhpck"; 1034 status = "disabled"; 1035 }; 1036 }; 1037 1038 i2c@0 { 1039 compatible = "i2c-gpio"; 1040 gpios = <&pioA 23 GPIO_ACTIVE_HIGH /* sda */ 1041 &pioA 24 GPIO_ACTIVE_HIGH /* scl */ 1042 >; 1043 i2c-gpio,sda-open-drain; 1044 i2c-gpio,scl-open-drain; 1045 i2c-gpio,delay-us = <2>; /* ~100 kHz */ 1046 #address-cells = <1>; 1047 #size-cells = <0>; 1048 pinctrl-names = "default"; 1049 pinctrl-0 = <&pinctrl_i2c_gpio0>; 1050 status = "disabled"; 1051 }; 1052 }; 1053
