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      1 // SPDX-License-Identifier: GPL-2.0+
      2 /*
      3  * Samsung's Exynos4 SoC common device tree source
      4  *
      5  * Copyright (c) 2014 Samsung Electronics Co., Ltd.
      6  *		http://www.samsung.com
      7  */
      8 
      9 #include "skeleton.dtsi"
     10 
     11 / {
     12 	aliases {
     13 		i2c0 = &i2c_0;
     14 		i2c1 = &i2c_1;
     15 		i2c2 = &i2c_2;
     16 		i2c3 = &i2c_3;
     17 		i2c4 = &i2c_4;
     18 		i2c5 = &i2c_5;
     19 		i2c6 = &i2c_6;
     20 		i2c7 = &i2c_7;
     21 	};
     22 
     23 	combiner: interrupt-controller@10440000 {
     24 		compatible = "samsung,exynos4210-combiner";
     25 		#interrupt-cells = <2>;
     26 		interrupt-controller;
     27 		reg = <0x10440000 0x1000>;
     28 	};
     29 
     30 	gic: interrupt-controller@10490000 {
     31 		compatible = "arm,cortex-a9-gic";
     32 		#interrupt-cells = <3>;
     33 		interrupt-controller;
     34 		cpu-offset = <0x4000>;
     35 		reg = <0x10490000 0x10000>, <0x10480000 0x10000>;
     36 	};
     37 
     38 	serial_0: serial@13800000 {
     39 		compatible = "samsung,exynos4210-uart";
     40 		reg = <0x13800000 0x3c>;
     41 		id = <0>;
     42 	};
     43 
     44 	serail_1: serial@13810000 {
     45 		compatible = "samsung,exynos4210-uart";
     46 		reg = <0x13810000 0x3c>;
     47 		id = <1>;
     48 	};
     49 
     50 	serial_2: serial@13820000 {
     51 		compatible = "samsung,exynos4210-uart";
     52 		reg = <0x13820000 0x3c>;
     53 		id = <2>;
     54 	};
     55 
     56 	serial_3: serial@13830000 {
     57 		compatible = "samsung,exynos4210-uart";
     58 		reg = <0x13830000 0x3c>;
     59 		id = <3>;
     60 	};
     61 
     62 	serial_4: serial@13840000 {
     63 		compatible = "samsung,exynos4210-uart";
     64 		reg = <0x13840000 0x3c>;
     65 		id = <4>;
     66 	};
     67 
     68 	i2c_0: i2c@13860000 {
     69 		#address-cells = <1>;
     70 		#size-cells = <0>;
     71 		compatible = "samsung,s3c2440-i2c";
     72 		reg = <0x13860000 0x100>;
     73 		interrupt-parent = <&gic>;
     74 		interrupts = <0 56 0>;
     75 	};
     76 
     77 	i2c_1: i2c@13870000 {
     78 		#address-cells = <1>;
     79 		#size-cells = <0>;
     80 		compatible = "samsung,s3c2440-i2c";
     81 		reg = <0x13870000 0x100>;
     82 		interrupt-parent = <&gic>;
     83 		interrupts = <1 57 0>;
     84 	};
     85 
     86 	i2c_2: i2c@13880000 {
     87 		#address-cells = <1>;
     88 		#size-cells = <0>;
     89 		compatible = "samsung,s3c2440-i2c";
     90 		reg = <0x13880000 0x100>;
     91 		interrupt-parent = <&gic>;
     92 		interrupts = <2 58 0>;
     93 	};
     94 
     95 	i2c_3: i2c@13890000 {
     96 		#address-cells = <1>;
     97 		#size-cells = <0>;
     98 		compatible = "samsung,s3c2440-i2c";
     99 		reg = <0x13890000 0x100>;
    100 		interrupt-parent = <&gic>;
    101 		interrupts = <3 59 0>;
    102 	};
    103 
    104 	i2c_4: i2c@138a0000 {
    105 		#address-cells = <1>;
    106 		#size-cells = <0>;
    107 		compatible = "samsung,s3c2440-i2c";
    108 		reg = <0x138a0000 0x100>;
    109 		interrupt-parent = <&gic>;
    110 		interrupts = <4 60 0>;
    111 	};
    112 
    113 	i2c_5: i2c@138b0000 {
    114 		#address-cells = <1>;
    115 		#size-cells = <0>;
    116 		compatible = "samsung,s3c2440-i2c";
    117 		reg = <0x138b0000 0x100>;
    118 		interrupt-parent = <&gic>;
    119 		interrupts = <5 61 0>;
    120 	};
    121 
    122 	i2c_6: i2c@138c0000 {
    123 		#address-cells = <1>;
    124 		#size-cells = <0>;
    125 		compatible = "samsung,s3c2440-i2c";
    126 		reg = <0x138c0000 0x100>;
    127 		interrupt-parent = <&gic>;
    128 		interrupts = <6 62 0>;
    129 	};
    130 
    131 	i2c_7: i2c@138d0000 {
    132 		#address-cells = <1>;
    133 		#size-cells = <0>;
    134 		compatible = "samsung,s3c2440-i2c";
    135 		reg = <0x138d0000 0x100>;
    136 		interrupt-parent = <&gic>;
    137 		interrupts = <7 63 0>;
    138 	};
    139 
    140 	sdhci0: sdhci@12510000 {
    141 		#address-cells = <1>;
    142 		#size-cells = <0>;
    143 		compatible = "samsung,exynos4412-sdhci";
    144 		reg = <0x12510000 0x1000>;
    145 		interrupt-parent = <&gic>;
    146 		interrupts = <0 75 0>;
    147 		status = "disabled";
    148 	};
    149 
    150 	sdhci1: sdhci@12520000 {
    151 		#address-cells = <1>;
    152 		#size-cells = <0>;
    153 		compatible = "samsung,exynos4412-sdhci";
    154 		reg = <0x12520000 0x1000>;
    155 		interrupt-parent = <&gic>;
    156 		interrupts = <0 76 0>;
    157 		status = "disabled";
    158 	};
    159 
    160 	sdhci2: sdhci@12530000 {
    161 		#address-cells = <1>;
    162 		#size-cells = <0>;
    163 		compatible = "samsung,exynos4412-sdhci";
    164 		reg = <0x12530000 0x1000>;
    165 		interrupt-parent = <&gic>;
    166 		interrupts = <0 77 0>;
    167 		status = "disabled";
    168 	};
    169 
    170 	sdhci3: sdhci@12540000 {
    171 		#address-cells = <1>;
    172 		#size-cells = <0>;
    173 		compatible = "samsung,exynos4412-sdhci";
    174 		reg = <0x12540000 0x1000>;
    175 		interrupt-parent = <&gic>;
    176 		interrupts = <0 78 0>;
    177 		status = "disabled";
    178 	};
    179 
    180 	mshc_0: dwmmc@12550000 {
    181 		#address-cells = <1>;
    182 		#size-cells = <0>;
    183 		compatible = "samsung,exynos4412-dw-mshc";
    184 		reg = <0x12550000 0x1000>;
    185 		interrupt-parent = <&gic>;
    186 		interrupts = <0 131 0>;
    187 		status = "disabled";
    188 	};
    189 
    190 };
    191