1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Device Tree Source for the r8a7794 SoC 4 * 5 * Copyright (C) 2014 Renesas Electronics Corporation 6 * Copyright (C) 2014 Ulrich Hecht 7 */ 8 9 #include <dt-bindings/clock/r8a7794-cpg-mssr.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include <dt-bindings/interrupt-controller/irq.h> 12 #include <dt-bindings/power/r8a7794-sysc.h> 13 14 / { 15 compatible = "renesas,r8a7794"; 16 #address-cells = <2>; 17 #size-cells = <2>; 18 19 aliases { 20 i2c0 = &i2c0; 21 i2c1 = &i2c1; 22 i2c2 = &i2c2; 23 i2c3 = &i2c3; 24 i2c4 = &i2c4; 25 i2c5 = &i2c5; 26 i2c6 = &i2c6; 27 i2c7 = &i2c7; 28 spi0 = &qspi; 29 vin0 = &vin0; 30 vin1 = &vin1; 31 }; 32 33 /* 34 * The external audio clocks are configured as 0 Hz fixed frequency 35 * clocks by default. 36 * Boards that provide audio clocks should override them. 37 */ 38 audio_clka: audio_clka { 39 compatible = "fixed-clock"; 40 #clock-cells = <0>; 41 clock-frequency = <0>; 42 }; 43 audio_clkb: audio_clkb { 44 compatible = "fixed-clock"; 45 #clock-cells = <0>; 46 clock-frequency = <0>; 47 }; 48 audio_clkc: audio_clkc { 49 compatible = "fixed-clock"; 50 #clock-cells = <0>; 51 clock-frequency = <0>; 52 }; 53 54 /* External CAN clock */ 55 can_clk: can { 56 compatible = "fixed-clock"; 57 #clock-cells = <0>; 58 /* This value must be overridden by the board. */ 59 clock-frequency = <0>; 60 }; 61 62 cpus { 63 #address-cells = <1>; 64 #size-cells = <0>; 65 enable-method = "renesas,apmu"; 66 67 cpu0: cpu@0 { 68 device_type = "cpu"; 69 compatible = "arm,cortex-a7"; 70 reg = <0>; 71 clock-frequency = <1000000000>; 72 clocks = <&cpg CPG_CORE R8A7794_CLK_Z2>; 73 power-domains = <&sysc R8A7794_PD_CA7_CPU0>; 74 next-level-cache = <&L2_CA7>; 75 }; 76 77 cpu1: cpu@1 { 78 device_type = "cpu"; 79 compatible = "arm,cortex-a7"; 80 reg = <1>; 81 clock-frequency = <1000000000>; 82 clocks = <&cpg CPG_CORE R8A7794_CLK_Z2>; 83 power-domains = <&sysc R8A7794_PD_CA7_CPU1>; 84 next-level-cache = <&L2_CA7>; 85 }; 86 87 L2_CA7: cache-controller-0 { 88 compatible = "cache"; 89 power-domains = <&sysc R8A7794_PD_CA7_SCU>; 90 cache-unified; 91 cache-level = <2>; 92 }; 93 }; 94 95 /* External root clock */ 96 extal_clk: extal { 97 compatible = "fixed-clock"; 98 #clock-cells = <0>; 99 /* This value must be overridden by the board. */ 100 clock-frequency = <0>; 101 }; 102 103 /* External SCIF clock */ 104 scif_clk: scif { 105 compatible = "fixed-clock"; 106 #clock-cells = <0>; 107 /* This value must be overridden by the board. */ 108 clock-frequency = <0>; 109 }; 110 111 soc { 112 compatible = "simple-bus"; 113 interrupt-parent = <&gic>; 114 115 #address-cells = <2>; 116 #size-cells = <2>; 117 ranges; 118 119 gpio0: gpio@e6050000 { 120 compatible = "renesas,gpio-r8a7794", 121 "renesas,rcar-gen2-gpio"; 122 reg = <0 0xe6050000 0 0x50>; 123 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; 124 #gpio-cells = <2>; 125 gpio-controller; 126 gpio-ranges = <&pfc 0 0 32>; 127 #interrupt-cells = <2>; 128 interrupt-controller; 129 clocks = <&cpg CPG_MOD 912>; 130 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 131 resets = <&cpg 912>; 132 }; 133 134 gpio1: gpio@e6051000 { 135 compatible = "renesas,gpio-r8a7794", 136 "renesas,rcar-gen2-gpio"; 137 reg = <0 0xe6051000 0 0x50>; 138 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; 139 #gpio-cells = <2>; 140 gpio-controller; 141 gpio-ranges = <&pfc 0 32 26>; 142 #interrupt-cells = <2>; 143 interrupt-controller; 144 clocks = <&cpg CPG_MOD 911>; 145 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 146 resets = <&cpg 911>; 147 }; 148 149 gpio2: gpio@e6052000 { 150 compatible = "renesas,gpio-r8a7794", 151 "renesas,rcar-gen2-gpio"; 152 reg = <0 0xe6052000 0 0x50>; 153 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; 154 #gpio-cells = <2>; 155 gpio-controller; 156 gpio-ranges = <&pfc 0 64 32>; 157 #interrupt-cells = <2>; 158 interrupt-controller; 159 clocks = <&cpg CPG_MOD 910>; 160 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 161 resets = <&cpg 910>; 162 }; 163 164 gpio3: gpio@e6053000 { 165 compatible = "renesas,gpio-r8a7794", 166 "renesas,rcar-gen2-gpio"; 167 reg = <0 0xe6053000 0 0x50>; 168 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; 169 #gpio-cells = <2>; 170 gpio-controller; 171 gpio-ranges = <&pfc 0 96 32>; 172 #interrupt-cells = <2>; 173 interrupt-controller; 174 clocks = <&cpg CPG_MOD 909>; 175 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 176 resets = <&cpg 909>; 177 }; 178 179 gpio4: gpio@e6054000 { 180 compatible = "renesas,gpio-r8a7794", 181 "renesas,rcar-gen2-gpio"; 182 reg = <0 0xe6054000 0 0x50>; 183 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; 184 #gpio-cells = <2>; 185 gpio-controller; 186 gpio-ranges = <&pfc 0 128 32>; 187 #interrupt-cells = <2>; 188 interrupt-controller; 189 clocks = <&cpg CPG_MOD 908>; 190 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 191 resets = <&cpg 908>; 192 }; 193 194 gpio5: gpio@e6055000 { 195 compatible = "renesas,gpio-r8a7794", 196 "renesas,rcar-gen2-gpio"; 197 reg = <0 0xe6055000 0 0x50>; 198 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; 199 #gpio-cells = <2>; 200 gpio-controller; 201 gpio-ranges = <&pfc 0 160 28>; 202 #interrupt-cells = <2>; 203 interrupt-controller; 204 clocks = <&cpg CPG_MOD 907>; 205 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 206 resets = <&cpg 907>; 207 }; 208 209 gpio6: gpio@e6055400 { 210 compatible = "renesas,gpio-r8a7794", 211 "renesas,rcar-gen2-gpio"; 212 reg = <0 0xe6055400 0 0x50>; 213 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; 214 #gpio-cells = <2>; 215 gpio-controller; 216 gpio-ranges = <&pfc 0 192 26>; 217 #interrupt-cells = <2>; 218 interrupt-controller; 219 clocks = <&cpg CPG_MOD 905>; 220 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 221 resets = <&cpg 905>; 222 }; 223 224 pfc: pin-controller@e6060000 { 225 compatible = "renesas,pfc-r8a7794"; 226 reg = <0 0xe6060000 0 0x11c>; 227 }; 228 229 cpg: clock-controller@e6150000 { 230 compatible = "renesas,r8a7794-cpg-mssr"; 231 reg = <0 0xe6150000 0 0x1000>; 232 clocks = <&extal_clk>, <&usb_extal_clk>; 233 clock-names = "extal", "usb_extal"; 234 #clock-cells = <2>; 235 #power-domain-cells = <0>; 236 #reset-cells = <1>; 237 }; 238 239 apmu@e6151000 { 240 compatible = "renesas,r8a7794-apmu", "renesas,apmu"; 241 reg = <0 0xe6151000 0 0x188>; 242 cpus = <&cpu0 &cpu1>; 243 }; 244 245 rst: reset-controller@e6160000 { 246 compatible = "renesas,r8a7794-rst"; 247 reg = <0 0xe6160000 0 0x0100>; 248 }; 249 250 sysc: system-controller@e6180000 { 251 compatible = "renesas,r8a7794-sysc"; 252 reg = <0 0xe6180000 0 0x0200>; 253 #power-domain-cells = <1>; 254 }; 255 256 irqc0: interrupt-controller@e61c0000 { 257 compatible = "renesas,irqc-r8a7794", "renesas,irqc"; 258 #interrupt-cells = <2>; 259 interrupt-controller; 260 reg = <0 0xe61c0000 0 0x200>; 261 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, 262 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, 263 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, 264 <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, 265 <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>, 266 <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>, 267 <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>, 268 <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>, 269 <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>, 270 <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; 271 clocks = <&cpg CPG_MOD 407>; 272 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 273 resets = <&cpg 407>; 274 }; 275 276 ipmmu_sy0: mmu@e6280000 { 277 compatible = "renesas,ipmmu-r8a7794", 278 "renesas,ipmmu-vmsa"; 279 reg = <0 0xe6280000 0 0x1000>; 280 interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>, 281 <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>; 282 #iommu-cells = <1>; 283 status = "disabled"; 284 }; 285 286 ipmmu_sy1: mmu@e6290000 { 287 compatible = "renesas,ipmmu-r8a7794", 288 "renesas,ipmmu-vmsa"; 289 reg = <0 0xe6290000 0 0x1000>; 290 interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>; 291 #iommu-cells = <1>; 292 status = "disabled"; 293 }; 294 295 ipmmu_ds: mmu@e6740000 { 296 compatible = "renesas,ipmmu-r8a7794", 297 "renesas,ipmmu-vmsa"; 298 reg = <0 0xe6740000 0 0x1000>; 299 interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>, 300 <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>; 301 #iommu-cells = <1>; 302 status = "disabled"; 303 }; 304 305 ipmmu_mp: mmu@ec680000 { 306 compatible = "renesas,ipmmu-r8a7794", 307 "renesas,ipmmu-vmsa"; 308 reg = <0 0xec680000 0 0x1000>; 309 interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>; 310 #iommu-cells = <1>; 311 status = "disabled"; 312 }; 313 314 ipmmu_mx: mmu@fe951000 { 315 compatible = "renesas,ipmmu-r8a7794", 316 "renesas,ipmmu-vmsa"; 317 reg = <0 0xfe951000 0 0x1000>; 318 interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>, 319 <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>; 320 #iommu-cells = <1>; 321 status = "disabled"; 322 }; 323 324 ipmmu_gp: mmu@e62a0000 { 325 compatible = "renesas,ipmmu-r8a7794", 326 "renesas,ipmmu-vmsa"; 327 reg = <0 0xe62a0000 0 0x1000>; 328 interrupts = <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>, 329 <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>; 330 #iommu-cells = <1>; 331 status = "disabled"; 332 }; 333 334 icram0: sram@e63a0000 { 335 compatible = "mmio-sram"; 336 reg = <0 0xe63a0000 0 0x12000>; 337 }; 338 339 icram1: sram@e63c0000 { 340 compatible = "mmio-sram"; 341 reg = <0 0xe63c0000 0 0x1000>; 342 #address-cells = <1>; 343 #size-cells = <1>; 344 ranges = <0 0 0xe63c0000 0x1000>; 345 346 smp-sram@0 { 347 compatible = "renesas,smp-sram"; 348 reg = <0 0x10>; 349 }; 350 }; 351 352 /* The memory map in the User's Manual maps the cores to 353 * bus numbers 354 */ 355 i2c0: i2c@e6508000 { 356 compatible = "renesas,i2c-r8a7794", 357 "renesas,rcar-gen2-i2c"; 358 reg = <0 0xe6508000 0 0x40>; 359 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; 360 clocks = <&cpg CPG_MOD 931>; 361 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 362 resets = <&cpg 931>; 363 #address-cells = <1>; 364 #size-cells = <0>; 365 i2c-scl-internal-delay-ns = <6>; 366 status = "disabled"; 367 }; 368 369 i2c1: i2c@e6518000 { 370 compatible = "renesas,i2c-r8a7794", 371 "renesas,rcar-gen2-i2c"; 372 reg = <0 0xe6518000 0 0x40>; 373 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; 374 clocks = <&cpg CPG_MOD 930>; 375 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 376 resets = <&cpg 930>; 377 #address-cells = <1>; 378 #size-cells = <0>; 379 i2c-scl-internal-delay-ns = <6>; 380 status = "disabled"; 381 }; 382 383 i2c2: i2c@e6530000 { 384 compatible = "renesas,i2c-r8a7794", 385 "renesas,rcar-gen2-i2c"; 386 reg = <0 0xe6530000 0 0x40>; 387 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>; 388 clocks = <&cpg CPG_MOD 929>; 389 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 390 resets = <&cpg 929>; 391 #address-cells = <1>; 392 #size-cells = <0>; 393 i2c-scl-internal-delay-ns = <6>; 394 status = "disabled"; 395 }; 396 397 i2c3: i2c@e6540000 { 398 compatible = "renesas,i2c-r8a7794", 399 "renesas,rcar-gen2-i2c"; 400 reg = <0 0xe6540000 0 0x40>; 401 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>; 402 clocks = <&cpg CPG_MOD 928>; 403 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 404 resets = <&cpg 928>; 405 #address-cells = <1>; 406 #size-cells = <0>; 407 i2c-scl-internal-delay-ns = <6>; 408 status = "disabled"; 409 }; 410 411 i2c4: i2c@e6520000 { 412 compatible = "renesas,i2c-r8a7794", 413 "renesas,rcar-gen2-i2c"; 414 reg = <0 0xe6520000 0 0x40>; 415 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; 416 clocks = <&cpg CPG_MOD 927>; 417 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 418 resets = <&cpg 927>; 419 #address-cells = <1>; 420 #size-cells = <0>; 421 i2c-scl-internal-delay-ns = <6>; 422 status = "disabled"; 423 }; 424 425 i2c5: i2c@e6528000 { 426 compatible = "renesas,i2c-r8a7794", 427 "renesas,rcar-gen2-i2c"; 428 reg = <0 0xe6528000 0 0x40>; 429 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; 430 clocks = <&cpg CPG_MOD 925>; 431 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 432 resets = <&cpg 925>; 433 #address-cells = <1>; 434 #size-cells = <0>; 435 i2c-scl-internal-delay-ns = <6>; 436 status = "disabled"; 437 }; 438 439 i2c6: i2c@e6500000 { 440 compatible = "renesas,iic-r8a7794", 441 "renesas,rcar-gen2-iic", 442 "renesas,rmobile-iic"; 443 reg = <0 0xe6500000 0 0x425>; 444 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; 445 clocks = <&cpg CPG_MOD 318>; 446 dmas = <&dmac0 0x61>, <&dmac0 0x62>, 447 <&dmac1 0x61>, <&dmac1 0x62>; 448 dma-names = "tx", "rx", "tx", "rx"; 449 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 450 resets = <&cpg 318>; 451 #address-cells = <1>; 452 #size-cells = <0>; 453 status = "disabled"; 454 }; 455 456 i2c7: i2c@e6510000 { 457 compatible = "renesas,iic-r8a7794", 458 "renesas,rcar-gen2-iic", 459 "renesas,rmobile-iic"; 460 reg = <0 0xe6510000 0 0x425>; 461 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>; 462 clocks = <&cpg CPG_MOD 323>; 463 dmas = <&dmac0 0x65>, <&dmac0 0x66>, 464 <&dmac1 0x65>, <&dmac1 0x66>; 465 dma-names = "tx", "rx", "tx", "rx"; 466 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 467 resets = <&cpg 323>; 468 #address-cells = <1>; 469 #size-cells = <0>; 470 status = "disabled"; 471 }; 472 473 hsusb: usb@e6590000 { 474 compatible = "renesas,usbhs-r8a7794", 475 "renesas,rcar-gen2-usbhs"; 476 reg = <0 0xe6590000 0 0x100>; 477 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; 478 clocks = <&cpg CPG_MOD 704>; 479 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 480 resets = <&cpg 704>; 481 renesas,buswait = <4>; 482 phys = <&usb0 1>; 483 phy-names = "usb"; 484 status = "disabled"; 485 }; 486 487 usbphy: usb-phy@e6590100 { 488 compatible = "renesas,usb-phy-r8a7794", 489 "renesas,rcar-gen2-usb-phy"; 490 reg = <0 0xe6590100 0 0x100>; 491 #address-cells = <1>; 492 #size-cells = <0>; 493 clocks = <&cpg CPG_MOD 704>; 494 clock-names = "usbhs"; 495 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 496 resets = <&cpg 704>; 497 status = "disabled"; 498 499 usb0: usb-channel@0 { 500 reg = <0>; 501 #phy-cells = <1>; 502 }; 503 usb2: usb-channel@2 { 504 reg = <2>; 505 #phy-cells = <1>; 506 }; 507 }; 508 509 dmac0: dma-controller@e6700000 { 510 compatible = "renesas,dmac-r8a7794", 511 "renesas,rcar-dmac"; 512 reg = <0 0xe6700000 0 0x20000>; 513 interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH 514 GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH 515 GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH 516 GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH 517 GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH 518 GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH 519 GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH 520 GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH 521 GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH 522 GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH 523 GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH 524 GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH 525 GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH 526 GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH 527 GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH 528 GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>; 529 interrupt-names = "error", 530 "ch0", "ch1", "ch2", "ch3", 531 "ch4", "ch5", "ch6", "ch7", 532 "ch8", "ch9", "ch10", "ch11", 533 "ch12", "ch13", "ch14"; 534 clocks = <&cpg CPG_MOD 219>; 535 clock-names = "fck"; 536 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 537 resets = <&cpg 219>; 538 #dma-cells = <1>; 539 dma-channels = <15>; 540 }; 541 542 dmac1: dma-controller@e6720000 { 543 compatible = "renesas,dmac-r8a7794", 544 "renesas,rcar-dmac"; 545 reg = <0 0xe6720000 0 0x20000>; 546 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH 547 GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH 548 GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH 549 GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH 550 GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH 551 GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH 552 GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH 553 GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH 554 GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH 555 GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH 556 GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH 557 GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH 558 GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH 559 GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH 560 GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH 561 GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>; 562 interrupt-names = "error", 563 "ch0", "ch1", "ch2", "ch3", 564 "ch4", "ch5", "ch6", "ch7", 565 "ch8", "ch9", "ch10", "ch11", 566 "ch12", "ch13", "ch14"; 567 clocks = <&cpg CPG_MOD 218>; 568 clock-names = "fck"; 569 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 570 resets = <&cpg 218>; 571 #dma-cells = <1>; 572 dma-channels = <15>; 573 }; 574 575 avb: ethernet@e6800000 { 576 compatible = "renesas,etheravb-r8a7794", 577 "renesas,etheravb-rcar-gen2"; 578 reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>; 579 interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>; 580 clocks = <&cpg CPG_MOD 812>; 581 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 582 resets = <&cpg 812>; 583 #address-cells = <1>; 584 #size-cells = <0>; 585 status = "disabled"; 586 }; 587 588 qspi: spi@e6b10000 { 589 compatible = "renesas,qspi-r8a7794", "renesas,qspi"; 590 reg = <0 0xe6b10000 0 0x2c>; 591 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>; 592 clocks = <&cpg CPG_MOD 917>; 593 dmas = <&dmac0 0x17>, <&dmac0 0x18>, 594 <&dmac1 0x17>, <&dmac1 0x18>; 595 dma-names = "tx", "rx", "tx", "rx"; 596 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 597 resets = <&cpg 917>; 598 num-cs = <1>; 599 #address-cells = <1>; 600 #size-cells = <0>; 601 status = "disabled"; 602 }; 603 604 scifa0: serial@e6c40000 { 605 compatible = "renesas,scifa-r8a7794", 606 "renesas,rcar-gen2-scifa", "renesas,scifa"; 607 reg = <0 0xe6c40000 0 64>; 608 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; 609 clocks = <&cpg CPG_MOD 204>; 610 clock-names = "fck"; 611 dmas = <&dmac0 0x21>, <&dmac0 0x22>, 612 <&dmac1 0x21>, <&dmac1 0x22>; 613 dma-names = "tx", "rx", "tx", "rx"; 614 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 615 resets = <&cpg 204>; 616 status = "disabled"; 617 }; 618 619 scifa1: serial@e6c50000 { 620 compatible = "renesas,scifa-r8a7794", 621 "renesas,rcar-gen2-scifa", "renesas,scifa"; 622 reg = <0 0xe6c50000 0 64>; 623 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>; 624 clocks = <&cpg CPG_MOD 203>; 625 clock-names = "fck"; 626 dmas = <&dmac0 0x25>, <&dmac0 0x26>, 627 <&dmac1 0x25>, <&dmac1 0x26>; 628 dma-names = "tx", "rx", "tx", "rx"; 629 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 630 resets = <&cpg 203>; 631 status = "disabled"; 632 }; 633 634 scifa2: serial@e6c60000 { 635 compatible = "renesas,scifa-r8a7794", 636 "renesas,rcar-gen2-scifa", "renesas,scifa"; 637 reg = <0 0xe6c60000 0 64>; 638 interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>; 639 clocks = <&cpg CPG_MOD 202>; 640 clock-names = "fck"; 641 dmas = <&dmac0 0x27>, <&dmac0 0x28>, 642 <&dmac1 0x27>, <&dmac1 0x28>; 643 dma-names = "tx", "rx", "tx", "rx"; 644 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 645 resets = <&cpg 202>; 646 status = "disabled"; 647 }; 648 649 scifa3: serial@e6c70000 { 650 compatible = "renesas,scifa-r8a7794", 651 "renesas,rcar-gen2-scifa", "renesas,scifa"; 652 reg = <0 0xe6c70000 0 64>; 653 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; 654 clocks = <&cpg CPG_MOD 1106>; 655 clock-names = "fck"; 656 dmas = <&dmac0 0x1b>, <&dmac0 0x1c>, 657 <&dmac1 0x1b>, <&dmac1 0x1c>; 658 dma-names = "tx", "rx", "tx", "rx"; 659 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 660 resets = <&cpg 1106>; 661 status = "disabled"; 662 }; 663 664 scifa4: serial@e6c78000 { 665 compatible = "renesas,scifa-r8a7794", 666 "renesas,rcar-gen2-scifa", "renesas,scifa"; 667 reg = <0 0xe6c78000 0 64>; 668 interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; 669 clocks = <&cpg CPG_MOD 1107>; 670 clock-names = "fck"; 671 dmas = <&dmac0 0x1f>, <&dmac0 0x20>, 672 <&dmac1 0x1f>, <&dmac1 0x20>; 673 dma-names = "tx", "rx", "tx", "rx"; 674 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 675 resets = <&cpg 1107>; 676 status = "disabled"; 677 }; 678 679 scifa5: serial@e6c80000 { 680 compatible = "renesas,scifa-r8a7794", 681 "renesas,rcar-gen2-scifa", "renesas,scifa"; 682 reg = <0 0xe6c80000 0 64>; 683 interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>; 684 clocks = <&cpg CPG_MOD 1108>; 685 clock-names = "fck"; 686 dmas = <&dmac0 0x23>, <&dmac0 0x24>, 687 <&dmac1 0x23>, <&dmac1 0x24>; 688 dma-names = "tx", "rx", "tx", "rx"; 689 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 690 resets = <&cpg 1108>; 691 status = "disabled"; 692 }; 693 694 scifb0: serial@e6c20000 { 695 compatible = "renesas,scifb-r8a7794", 696 "renesas,rcar-gen2-scifb", "renesas,scifb"; 697 reg = <0 0xe6c20000 0 0x100>; 698 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>; 699 clocks = <&cpg CPG_MOD 206>; 700 clock-names = "fck"; 701 dmas = <&dmac0 0x3d>, <&dmac0 0x3e>, 702 <&dmac1 0x3d>, <&dmac1 0x3e>; 703 dma-names = "tx", "rx", "tx", "rx"; 704 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 705 resets = <&cpg 206>; 706 status = "disabled"; 707 }; 708 709 scifb1: serial@e6c30000 { 710 compatible = "renesas,scifb-r8a7794", 711 "renesas,rcar-gen2-scifb", "renesas,scifb"; 712 reg = <0 0xe6c30000 0 0x100>; 713 interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>; 714 clocks = <&cpg CPG_MOD 207>; 715 clock-names = "fck"; 716 dmas = <&dmac0 0x19>, <&dmac0 0x1a>, 717 <&dmac1 0x19>, <&dmac1 0x1a>; 718 dma-names = "tx", "rx", "tx", "rx"; 719 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 720 resets = <&cpg 207>; 721 status = "disabled"; 722 }; 723 724 scifb2: serial@e6ce0000 { 725 compatible = "renesas,scifb-r8a7794", 726 "renesas,rcar-gen2-scifb", "renesas,scifb"; 727 reg = <0 0xe6ce0000 0 0x100>; 728 interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>; 729 clocks = <&cpg CPG_MOD 216>; 730 clock-names = "fck"; 731 dmas = <&dmac0 0x1d>, <&dmac0 0x1e>, 732 <&dmac1 0x1d>, <&dmac1 0x1e>; 733 dma-names = "tx", "rx", "tx", "rx"; 734 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 735 resets = <&cpg 216>; 736 status = "disabled"; 737 }; 738 739 scif0: serial@e6e60000 { 740 compatible = "renesas,scif-r8a7794", 741 "renesas,rcar-gen2-scif", 742 "renesas,scif"; 743 reg = <0 0xe6e60000 0 64>; 744 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; 745 clocks = <&cpg CPG_MOD 721>, <&cpg CPG_CORE R8A7794_CLK_ZS>, 746 <&scif_clk>; 747 clock-names = "fck", "brg_int", "scif_clk"; 748 dmas = <&dmac0 0x29>, <&dmac0 0x2a>, 749 <&dmac1 0x29>, <&dmac1 0x2a>; 750 dma-names = "tx", "rx", "tx", "rx"; 751 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 752 resets = <&cpg 721>; 753 status = "disabled"; 754 }; 755 756 scif1: serial@e6e68000 { 757 compatible = "renesas,scif-r8a7794", 758 "renesas,rcar-gen2-scif", 759 "renesas,scif"; 760 reg = <0 0xe6e68000 0 64>; 761 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; 762 clocks = <&cpg CPG_MOD 720>, <&cpg CPG_CORE R8A7794_CLK_ZS>, 763 <&scif_clk>; 764 clock-names = "fck", "brg_int", "scif_clk"; 765 dmas = <&dmac0 0x2d>, <&dmac0 0x2e>, 766 <&dmac1 0x2d>, <&dmac1 0x2e>; 767 dma-names = "tx", "rx", "tx", "rx"; 768 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 769 resets = <&cpg 720>; 770 status = "disabled"; 771 }; 772 773 scif2: serial@e6e58000 { 774 compatible = "renesas,scif-r8a7794", 775 "renesas,rcar-gen2-scif", "renesas,scif"; 776 reg = <0 0xe6e58000 0 64>; 777 interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>; 778 clocks = <&cpg CPG_MOD 719>, <&cpg CPG_CORE R8A7794_CLK_ZS>, 779 <&scif_clk>; 780 clock-names = "fck", "brg_int", "scif_clk"; 781 dmas = <&dmac0 0x2b>, <&dmac0 0x2c>, 782 <&dmac1 0x2b>, <&dmac1 0x2c>; 783 dma-names = "tx", "rx", "tx", "rx"; 784 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 785 resets = <&cpg 719>; 786 status = "disabled"; 787 }; 788 789 scif3: serial@e6ea8000 { 790 compatible = "renesas,scif-r8a7794", 791 "renesas,rcar-gen2-scif", "renesas,scif"; 792 reg = <0 0xe6ea8000 0 64>; 793 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; 794 clocks = <&cpg CPG_MOD 718>, <&cpg CPG_CORE R8A7794_CLK_ZS>, 795 <&scif_clk>; 796 clock-names = "fck", "brg_int", "scif_clk"; 797 dmas = <&dmac0 0x2f>, <&dmac0 0x30>, 798 <&dmac1 0x2f>, <&dmac1 0x30>; 799 dma-names = "tx", "rx", "tx", "rx"; 800 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 801 resets = <&cpg 718>; 802 status = "disabled"; 803 }; 804 805 scif4: serial@e6ee0000 { 806 compatible = "renesas,scif-r8a7794", 807 "renesas,rcar-gen2-scif", "renesas,scif"; 808 reg = <0 0xe6ee0000 0 64>; 809 interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>; 810 clocks = <&cpg CPG_MOD 715>, <&cpg CPG_CORE R8A7794_CLK_ZS>, 811 <&scif_clk>; 812 clock-names = "fck", "brg_int", "scif_clk"; 813 dmas = <&dmac0 0xfb>, <&dmac0 0xfc>, 814 <&dmac1 0xfb>, <&dmac1 0xfc>; 815 dma-names = "tx", "rx", "tx", "rx"; 816 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 817 resets = <&cpg 715>; 818 status = "disabled"; 819 }; 820 821 scif5: serial@e6ee8000 { 822 compatible = "renesas,scif-r8a7794", 823 "renesas,rcar-gen2-scif", "renesas,scif"; 824 reg = <0 0xe6ee8000 0 64>; 825 interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; 826 clocks = <&cpg CPG_MOD 714>, <&cpg CPG_CORE R8A7794_CLK_ZS>, 827 <&scif_clk>; 828 clock-names = "fck", "brg_int", "scif_clk"; 829 dmas = <&dmac0 0xfd>, <&dmac0 0xfe>, 830 <&dmac1 0xfd>, <&dmac1 0xfe>; 831 dma-names = "tx", "rx", "tx", "rx"; 832 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 833 resets = <&cpg 714>; 834 status = "disabled"; 835 }; 836 837 hscif0: serial@e62c0000 { 838 compatible = "renesas,hscif-r8a7794", 839 "renesas,rcar-gen2-hscif", "renesas,hscif"; 840 reg = <0 0xe62c0000 0 96>; 841 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; 842 clocks = <&cpg CPG_MOD 717>, 843 <&cpg CPG_CORE R8A7794_CLK_ZS>, <&scif_clk>; 844 clock-names = "fck", "brg_int", "scif_clk"; 845 dmas = <&dmac0 0x39>, <&dmac0 0x3a>, 846 <&dmac1 0x39>, <&dmac1 0x3a>; 847 dma-names = "tx", "rx", "tx", "rx"; 848 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 849 resets = <&cpg 717>; 850 status = "disabled"; 851 }; 852 853 hscif1: serial@e62c8000 { 854 compatible = "renesas,hscif-r8a7794", 855 "renesas,rcar-gen2-hscif", "renesas,hscif"; 856 reg = <0 0xe62c8000 0 96>; 857 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; 858 clocks = <&cpg CPG_MOD 716>, 859 <&cpg CPG_CORE R8A7794_CLK_ZS>, <&scif_clk>; 860 clock-names = "fck", "brg_int", "scif_clk"; 861 dmas = <&dmac0 0x4d>, <&dmac0 0x4e>, 862 <&dmac1 0x4d>, <&dmac1 0x4e>; 863 dma-names = "tx", "rx", "tx", "rx"; 864 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 865 resets = <&cpg 716>; 866 status = "disabled"; 867 }; 868 869 hscif2: serial@e62d0000 { 870 compatible = "renesas,hscif-r8a7794", 871 "renesas,rcar-gen2-hscif", "renesas,hscif"; 872 reg = <0 0xe62d0000 0 96>; 873 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; 874 clocks = <&cpg CPG_MOD 713>, <&cpg CPG_CORE R8A7794_CLK_ZS>, 875 <&scif_clk>; 876 clock-names = "fck", "brg_int", "scif_clk"; 877 dmas = <&dmac0 0x3b>, <&dmac0 0x3c>, 878 <&dmac1 0x3b>, <&dmac1 0x3c>; 879 dma-names = "tx", "rx", "tx", "rx"; 880 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 881 resets = <&cpg 713>; 882 status = "disabled"; 883 }; 884 885 can0: can@e6e80000 { 886 compatible = "renesas,can-r8a7794", 887 "renesas,rcar-gen2-can"; 888 reg = <0 0xe6e80000 0 0x1000>; 889 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>; 890 clocks = <&cpg CPG_MOD 916>, <&cpg CPG_CORE R8A7794_CLK_RCAN>, 891 <&can_clk>; 892 clock-names = "clkp1", "clkp2", "can_clk"; 893 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 894 resets = <&cpg 916>; 895 status = "disabled"; 896 }; 897 898 can1: can@e6e88000 { 899 compatible = "renesas,can-r8a7794", 900 "renesas,rcar-gen2-can"; 901 reg = <0 0xe6e88000 0 0x1000>; 902 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>; 903 clocks = <&cpg CPG_MOD 915>, <&cpg CPG_CORE R8A7794_CLK_RCAN>, 904 <&can_clk>; 905 clock-names = "clkp1", "clkp2", "can_clk"; 906 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 907 resets = <&cpg 915>; 908 status = "disabled"; 909 }; 910 911 vin0: video@e6ef0000 { 912 compatible = "renesas,vin-r8a7794", 913 "renesas,rcar-gen2-vin"; 914 reg = <0 0xe6ef0000 0 0x1000>; 915 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; 916 clocks = <&cpg CPG_MOD 811>; 917 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 918 resets = <&cpg 811>; 919 status = "disabled"; 920 }; 921 922 vin1: video@e6ef1000 { 923 compatible = "renesas,vin-r8a7794", 924 "renesas,rcar-gen2-vin"; 925 reg = <0 0xe6ef1000 0 0x1000>; 926 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>; 927 clocks = <&cpg CPG_MOD 810>; 928 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 929 resets = <&cpg 810>; 930 status = "disabled"; 931 }; 932 933 rcar_sound: sound@ec500000 { 934 /* 935 * #sound-dai-cells is required 936 * 937 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>; 938 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>; 939 */ 940 compatible = "renesas,rcar_sound-r8a7794", 941 "renesas,rcar_sound-gen2"; 942 reg = <0 0xec500000 0 0x1000>, /* SCU */ 943 <0 0xec5a0000 0 0x100>, /* ADG */ 944 <0 0xec540000 0 0x1000>, /* SSIU */ 945 <0 0xec541000 0 0x280>, /* SSI */ 946 <0 0xec740000 0 0x200>; /* Audio DMAC peri peri */ 947 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp"; 948 949 clocks = <&cpg CPG_MOD 1005>, 950 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>, 951 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>, 952 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>, 953 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>, 954 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>, 955 <&cpg CPG_MOD 1025>, <&cpg CPG_MOD 1026>, 956 <&cpg CPG_MOD 1027>, <&cpg CPG_MOD 1028>, 957 <&cpg CPG_MOD 1029>, <&cpg CPG_MOD 1030>, 958 <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>, 959 <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>, 960 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>, 961 <&audio_clka>, <&audio_clkb>, <&audio_clkc>, 962 <&cpg CPG_CORE R8A7794_CLK_M2>; 963 clock-names = "ssi-all", 964 "ssi.9", "ssi.8", "ssi.7", "ssi.6", 965 "ssi.5", "ssi.4", "ssi.3", "ssi.2", 966 "ssi.1", "ssi.0", 967 "src.6", "src.5", "src.4", "src.3", 968 "src.2", "src.1", 969 "ctu.0", "ctu.1", 970 "mix.0", "mix.1", 971 "dvc.0", "dvc.1", 972 "clk_a", "clk_b", "clk_c", "clk_i"; 973 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 974 resets = <&cpg 1005>, 975 <&cpg 1006>, <&cpg 1007>, 976 <&cpg 1008>, <&cpg 1009>, 977 <&cpg 1010>, <&cpg 1011>, 978 <&cpg 1012>, <&cpg 1013>, 979 <&cpg 1014>, <&cpg 1015>; 980 reset-names = "ssi-all", 981 "ssi.9", "ssi.8", "ssi.7", "ssi.6", 982 "ssi.5", "ssi.4", "ssi.3", "ssi.2", 983 "ssi.1", "ssi.0"; 984 985 status = "disabled"; 986 987 rcar_sound,dvc { 988 dvc0: dvc-0 { 989 dmas = <&audma0 0xbc>; 990 dma-names = "tx"; 991 }; 992 dvc1: dvc-1 { 993 dmas = <&audma0 0xbe>; 994 dma-names = "tx"; 995 }; 996 }; 997 998 rcar_sound,mix { 999 mix0: mix-0 { }; 1000 mix1: mix-1 { }; 1001 }; 1002 1003 rcar_sound,ctu { 1004 ctu00: ctu-0 { }; 1005 ctu01: ctu-1 { }; 1006 ctu02: ctu-2 { }; 1007 ctu03: ctu-3 { }; 1008 ctu10: ctu-4 { }; 1009 ctu11: ctu-5 { }; 1010 ctu12: ctu-6 { }; 1011 ctu13: ctu-7 { }; 1012 }; 1013 1014 rcar_sound,src { 1015 src-0 { 1016 status = "disabled"; 1017 }; 1018 src1: src-1 { 1019 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; 1020 dmas = <&audma0 0x87>, <&audma0 0x9c>; 1021 dma-names = "rx", "tx"; 1022 }; 1023 src2: src-2 { 1024 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; 1025 dmas = <&audma0 0x89>, <&audma0 0x9e>; 1026 dma-names = "rx", "tx"; 1027 }; 1028 src3: src-3 { 1029 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; 1030 dmas = <&audma0 0x8b>, <&audma0 0xa0>; 1031 dma-names = "rx", "tx"; 1032 }; 1033 src4: src-4 { 1034 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; 1035 dmas = <&audma0 0x8d>, <&audma0 0xb0>; 1036 dma-names = "rx", "tx"; 1037 }; 1038 src5: src-5 { 1039 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; 1040 dmas = <&audma0 0x8f>, <&audma0 0xb2>; 1041 dma-names = "rx", "tx"; 1042 }; 1043 src6: src-6 { 1044 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; 1045 dmas = <&audma0 0x91>, <&audma0 0xb4>; 1046 dma-names = "rx", "tx"; 1047 }; 1048 }; 1049 1050 rcar_sound,ssi { 1051 ssi0: ssi-0 { 1052 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>; 1053 dmas = <&audma0 0x01>, <&audma0 0x02>, 1054 <&audma0 0x15>, <&audma0 0x16>; 1055 dma-names = "rx", "tx", "rxu", "txu"; 1056 }; 1057 ssi1: ssi-1 { 1058 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>; 1059 dmas = <&audma0 0x03>, <&audma0 0x04>, 1060 <&audma0 0x49>, <&audma0 0x4a>; 1061 dma-names = "rx", "tx", "rxu", "txu"; 1062 }; 1063 ssi2: ssi-2 { 1064 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>; 1065 dmas = <&audma0 0x05>, <&audma0 0x06>, 1066 <&audma0 0x63>, <&audma0 0x64>; 1067 dma-names = "rx", "tx", "rxu", "txu"; 1068 }; 1069 ssi3: ssi-3 { 1070 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>; 1071 dmas = <&audma0 0x07>, <&audma0 0x08>, 1072 <&audma0 0x6f>, <&audma0 0x70>; 1073 dma-names = "rx", "tx", "rxu", "txu"; 1074 }; 1075 ssi4: ssi-4 { 1076 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>; 1077 dmas = <&audma0 0x09>, <&audma0 0x0a>, 1078 <&audma0 0x71>, <&audma0 0x72>; 1079 dma-names = "rx", "tx", "rxu", "txu"; 1080 }; 1081 ssi5: ssi-5 { 1082 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>; 1083 dmas = <&audma0 0x0b>, <&audma0 0x0c>, 1084 <&audma0 0x73>, <&audma0 0x74>; 1085 dma-names = "rx", "tx", "rxu", "txu"; 1086 }; 1087 ssi6: ssi-6 { 1088 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>; 1089 dmas = <&audma0 0x0d>, <&audma0 0x0e>, 1090 <&audma0 0x75>, <&audma0 0x76>; 1091 dma-names = "rx", "tx", "rxu", "txu"; 1092 }; 1093 ssi7: ssi-7 { 1094 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>; 1095 dmas = <&audma0 0x0f>, <&audma0 0x10>, 1096 <&audma0 0x79>, <&audma0 0x7a>; 1097 dma-names = "rx", "tx", "rxu", "txu"; 1098 }; 1099 ssi8: ssi-8 { 1100 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>; 1101 dmas = <&audma0 0x11>, <&audma0 0x12>, 1102 <&audma0 0x7b>, <&audma0 0x7c>; 1103 dma-names = "rx", "tx", "rxu", "txu"; 1104 }; 1105 ssi9: ssi-9 { 1106 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>; 1107 dmas = <&audma0 0x13>, <&audma0 0x14>, 1108 <&audma0 0x7d>, <&audma0 0x7e>; 1109 dma-names = "rx", "tx", "rxu", "txu"; 1110 }; 1111 }; 1112 }; 1113 1114 audma0: dma-controller@ec700000 { 1115 compatible = "renesas,dmac-r8a7794", 1116 "renesas,rcar-dmac"; 1117 reg = <0 0xec700000 0 0x10000>; 1118 interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH 1119 GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH 1120 GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH 1121 GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH 1122 GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH 1123 GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH 1124 GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH 1125 GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH 1126 GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH 1127 GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH 1128 GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH 1129 GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH 1130 GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH 1131 GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>; 1132 interrupt-names = "error", 1133 "ch0", "ch1", "ch2", "ch3", "ch4", 1134 "ch5", "ch6", "ch7", "ch8", "ch9", 1135 "ch10", "ch11", 1136 "ch12"; 1137 clocks = <&cpg CPG_MOD 502>; 1138 clock-names = "fck"; 1139 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 1140 resets = <&cpg 502>; 1141 #dma-cells = <1>; 1142 dma-channels = <13>; 1143 }; 1144 1145 pci0: pci@ee090000 { 1146 compatible = "renesas,pci-r8a7794", 1147 "renesas,pci-rcar-gen2"; 1148 device_type = "pci"; 1149 reg = <0 0xee090000 0 0xc00>, 1150 <0 0xee080000 0 0x1100>; 1151 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 1152 clocks = <&cpg CPG_MOD 703>; 1153 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 1154 resets = <&cpg 703>; 1155 status = "disabled"; 1156 1157 bus-range = <0 0>; 1158 #address-cells = <3>; 1159 #size-cells = <2>; 1160 #interrupt-cells = <1>; 1161 ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>; 1162 interrupt-map-mask = <0xff00 0 0 0x7>; 1163 interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH 1164 0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH 1165 0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 1166 1167 usb@1,0 { 1168 reg = <0x800 0 0 0 0>; 1169 phys = <&usb0 0>; 1170 phy-names = "usb"; 1171 }; 1172 1173 usb@2,0 { 1174 reg = <0x1000 0 0 0 0>; 1175 phys = <&usb0 0>; 1176 phy-names = "usb"; 1177 }; 1178 }; 1179 1180 pci1: pci@ee0d0000 { 1181 compatible = "renesas,pci-r8a7794", 1182 "renesas,pci-rcar-gen2"; 1183 device_type = "pci"; 1184 reg = <0 0xee0d0000 0 0xc00>, 1185 <0 0xee0c0000 0 0x1100>; 1186 interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; 1187 clocks = <&cpg CPG_MOD 703>; 1188 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 1189 resets = <&cpg 703>; 1190 status = "disabled"; 1191 1192 bus-range = <1 1>; 1193 #address-cells = <3>; 1194 #size-cells = <2>; 1195 #interrupt-cells = <1>; 1196 ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>; 1197 interrupt-map-mask = <0xff00 0 0 0x7>; 1198 interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH 1199 0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH 1200 0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; 1201 1202 usb@1,0 { 1203 reg = <0x10800 0 0 0 0>; 1204 phys = <&usb2 0>; 1205 phy-names = "usb"; 1206 }; 1207 1208 usb@2,0 { 1209 reg = <0x11000 0 0 0 0>; 1210 phys = <&usb2 0>; 1211 phy-names = "usb"; 1212 }; 1213 }; 1214 1215 sdhi0: sd@ee100000 { 1216 compatible = "renesas,sdhi-r8a7794", 1217 "renesas,rcar-gen2-sdhi"; 1218 reg = <0 0xee100000 0 0x328>; 1219 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; 1220 clocks = <&cpg CPG_MOD 314>; 1221 dmas = <&dmac0 0xcd>, <&dmac0 0xce>, 1222 <&dmac1 0xcd>, <&dmac1 0xce>; 1223 dma-names = "tx", "rx", "tx", "rx"; 1224 max-frequency = <195000000>; 1225 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 1226 resets = <&cpg 314>; 1227 status = "disabled"; 1228 }; 1229 1230 sdhi1: sd@ee140000 { 1231 compatible = "renesas,sdhi-r8a7794", 1232 "renesas,rcar-gen2-sdhi"; 1233 reg = <0 0xee140000 0 0x100>; 1234 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>; 1235 clocks = <&cpg CPG_MOD 312>; 1236 dmas = <&dmac0 0xc1>, <&dmac0 0xc2>, 1237 <&dmac1 0xc1>, <&dmac1 0xc2>; 1238 dma-names = "tx", "rx", "tx", "rx"; 1239 max-frequency = <97500000>; 1240 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 1241 resets = <&cpg 312>; 1242 status = "disabled"; 1243 }; 1244 1245 sdhi2: sd@ee160000 { 1246 compatible = "renesas,sdhi-r8a7794", 1247 "renesas,rcar-gen2-sdhi"; 1248 reg = <0 0xee160000 0 0x100>; 1249 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; 1250 clocks = <&cpg CPG_MOD 311>; 1251 dmas = <&dmac0 0xd3>, <&dmac0 0xd4>, 1252 <&dmac1 0xd3>, <&dmac1 0xd4>; 1253 dma-names = "tx", "rx", "tx", "rx"; 1254 max-frequency = <97500000>; 1255 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 1256 resets = <&cpg 311>; 1257 status = "disabled"; 1258 }; 1259 1260 mmcif0: mmc@ee200000 { 1261 compatible = "renesas,mmcif-r8a7794", 1262 "renesas,sh-mmcif"; 1263 reg = <0 0xee200000 0 0x80>; 1264 interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>; 1265 clocks = <&cpg CPG_MOD 315>; 1266 dmas = <&dmac0 0xd1>, <&dmac0 0xd2>, 1267 <&dmac1 0xd1>, <&dmac1 0xd2>; 1268 dma-names = "tx", "rx", "tx", "rx"; 1269 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 1270 resets = <&cpg 315>; 1271 reg-io-width = <4>; 1272 status = "disabled"; 1273 }; 1274 1275 ether: ethernet@ee700000 { 1276 compatible = "renesas,ether-r8a7794", 1277 "renesas,rcar-gen2-ether"; 1278 reg = <0 0xee700000 0 0x400>; 1279 interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>; 1280 clocks = <&cpg CPG_MOD 813>; 1281 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 1282 resets = <&cpg 813>; 1283 phy-mode = "rmii"; 1284 #address-cells = <1>; 1285 #size-cells = <0>; 1286 status = "disabled"; 1287 }; 1288 1289 gic: interrupt-controller@f1001000 { 1290 compatible = "arm,gic-400"; 1291 #interrupt-cells = <3>; 1292 #address-cells = <0>; 1293 interrupt-controller; 1294 reg = <0 0xf1001000 0 0x1000>, 1295 <0 0xf1002000 0 0x2000>, 1296 <0 0xf1004000 0 0x2000>, 1297 <0 0xf1006000 0 0x2000>; 1298 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>; 1299 clocks = <&cpg CPG_MOD 408>; 1300 clock-names = "clk"; 1301 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 1302 resets = <&cpg 408>; 1303 }; 1304 1305 vsp@fe928000 { 1306 compatible = "renesas,vsp1"; 1307 reg = <0 0xfe928000 0 0x8000>; 1308 interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>; 1309 clocks = <&cpg CPG_MOD 131>; 1310 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 1311 resets = <&cpg 131>; 1312 }; 1313 1314 vsp@fe930000 { 1315 compatible = "renesas,vsp1"; 1316 reg = <0 0xfe930000 0 0x8000>; 1317 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; 1318 clocks = <&cpg CPG_MOD 128>; 1319 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 1320 resets = <&cpg 128>; 1321 }; 1322 1323 du: display@feb00000 { 1324 compatible = "renesas,du-r8a7794"; 1325 reg = <0 0xfeb00000 0 0x40000>; 1326 reg-names = "du"; 1327 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, 1328 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>; 1329 clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>; 1330 clock-names = "du.0", "du.1"; 1331 status = "disabled"; 1332 1333 ports { 1334 #address-cells = <1>; 1335 #size-cells = <0>; 1336 1337 port@0 { 1338 reg = <0>; 1339 du_out_rgb0: endpoint { 1340 }; 1341 }; 1342 port@1 { 1343 reg = <1>; 1344 du_out_rgb1: endpoint { 1345 }; 1346 }; 1347 }; 1348 }; 1349 1350 prr: chipid@ff000044 { 1351 compatible = "renesas,prr"; 1352 reg = <0 0xff000044 0 4>; 1353 }; 1354 1355 cmt0: timer@ffca0000 { 1356 compatible = "renesas,r8a7794-cmt0", 1357 "renesas,rcar-gen2-cmt0"; 1358 reg = <0 0xffca0000 0 0x1004>; 1359 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, 1360 <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>; 1361 clocks = <&cpg CPG_MOD 124>; 1362 clock-names = "fck"; 1363 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 1364 resets = <&cpg 124>; 1365 1366 status = "disabled"; 1367 }; 1368 1369 cmt1: timer@e6130000 { 1370 compatible = "renesas,r8a7794-cmt1", 1371 "renesas,rcar-gen2-cmt1"; 1372 reg = <0 0xe6130000 0 0x1004>; 1373 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>, 1374 <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, 1375 <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>, 1376 <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, 1377 <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>, 1378 <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>, 1379 <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>, 1380 <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>; 1381 clocks = <&cpg CPG_MOD 329>; 1382 clock-names = "fck"; 1383 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 1384 resets = <&cpg 329>; 1385 1386 status = "disabled"; 1387 }; 1388 }; 1389 1390 timer { 1391 compatible = "arm,armv7-timer"; 1392 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 1393 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 1394 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 1395 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; 1396 }; 1397 1398 /* External USB clock - can be overridden by the board */ 1399 usb_extal_clk: usb_extal { 1400 compatible = "fixed-clock"; 1401 #clock-cells = <0>; 1402 clock-frequency = <48000000>; 1403 }; 1404 }; 1405
