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      1 /* SPDX-License-Identifier: GPL-2.0 */
      2 /*
      3  * Device Tree Source for the ebisu board
      4  *
      5  * Copyright (C) 2018 Renesas Electronics Corp.
      6  */
      7 
      8 /dts-v1/;
      9 #include "r8a77990.dtsi"
     10 #include <dt-bindings/gpio/gpio.h>
     11 
     12 / {
     13 	model = "Renesas Ebisu board based on r8a77990";
     14 	compatible = "renesas,ebisu", "renesas,r8a77990";
     15 
     16 	aliases {
     17 		serial0 = &scif2;
     18 		ethernet0 = &avb;
     19 	};
     20 
     21 	chosen {
     22 		bootargs = "ignore_loglevel";
     23 		stdout-path = "serial0:115200n8";
     24 	};
     25 
     26 	memory@48000000 {
     27 		device_type = "memory";
     28 		/* first 128MB is reserved for secure area. */
     29 		reg = <0x0 0x48000000 0x0 0x38000000>;
     30 	};
     31 
     32 	reg_1p8v: regulator0 {
     33 		compatible = "regulator-fixed";
     34 		regulator-name = "fixed-1.8V";
     35 		regulator-min-microvolt = <1800000>;
     36 		regulator-max-microvolt = <1800000>;
     37 		regulator-boot-on;
     38 		regulator-always-on;
     39 	};
     40 
     41 	reg_3p3v: regulator1 {
     42 		compatible = "regulator-fixed";
     43 		regulator-name = "fixed-3.3V";
     44 		regulator-min-microvolt = <3300000>;
     45 		regulator-max-microvolt = <3300000>;
     46 		regulator-boot-on;
     47 		regulator-always-on;
     48 	};
     49 };
     50 
     51 &avb {
     52 	pinctrl-0 = <&avb_pins>;
     53 	pinctrl-names = "default";
     54 	renesas,no-ether-link;
     55 	phy-handle = <&phy0>;
     56 	phy-mode = "rgmii-txid";
     57 	status = "okay";
     58 
     59 	phy0: ethernet-phy@0 {
     60 		rxc-skew-ps = <1500>;
     61 		reg = <0>;
     62 		interrupt-parent = <&gpio2>;
     63 		interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
     64 		reset-gpios = <&gpio1 20 GPIO_ACTIVE_LOW>;
     65 	};
     66 };
     67 
     68 &extal_clk {
     69 	clock-frequency = <48000000>;
     70 };
     71 
     72 &pfc {
     73 	pinctrl-0 = <&scif_clk_pins>;
     74 	pinctrl-names = "default";
     75 
     76 	avb_pins: avb {
     77 		mux {
     78 			groups = "avb_link", "avb_mii";
     79 			function = "avb";
     80 		};
     81 	};
     82 
     83 	scif2_pins: scif2 {
     84 		groups = "scif2_data_a";
     85 		function = "scif2";
     86 	};
     87 
     88 	scif_clk_pins: scif_clk {
     89 		groups = "scif_clk_a";
     90 		function = "scif_clk";
     91 	};
     92 
     93 	sdhi3_pins: sd2 {
     94 		groups = "sdhi3_data8", "sdhi3_ctrl";
     95 		function = "sdhi3";
     96 		power-source = <1800>;
     97 	};
     98 
     99 	sdhi3_pins_uhs: sd2_uhs {
    100 		groups = "sdhi3_data8", "sdhi3_ctrl";
    101 		function = "sdhi3";
    102 		power-source = <1800>;
    103 	};
    104 };
    105 
    106 &sdhi0 {
    107 	status = "okay";
    108 };
    109 
    110 &sdhi1 {
    111 	status = "okay";
    112 };
    113 
    114 &sdhi3 {
    115 	/* used for on-board 8bit eMMC */
    116 	pinctrl-0 = <&sdhi3_pins>;
    117 	pinctrl-1 = <&sdhi3_pins_uhs>;
    118 	pinctrl-names = "default", "state_uhs";
    119 
    120 	vmmc-supply = <&reg_3p3v>;
    121 	vqmmc-supply = <&reg_1p8v>;
    122 	bus-width = <8>;
    123 	mmc-hs200-1_8v;
    124 	non-removable;
    125 	status = "okay";
    126 };
    127 
    128 &scif2 {
    129 	pinctrl-0 = <&scif2_pins>;
    130 	pinctrl-names = "default";
    131 
    132 	status = "okay";
    133 };
    134