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      1 /*
      2  * Google Veyron Mickey Rev 0 board device tree source
      3  *
      4  * Copyright 2015 Google, Inc
      5  *
      6  * This file is dual-licensed: you can use it either under the terms
      7  * of the GPL or the X11 license, at your option. Note that this dual
      8  * licensing only applies to this file, and not this project as a
      9  * whole.
     10  *
     11  *  a) This file is free software; you can redistribute it and/or
     12  *     modify it under the terms of the GNU General Public License as
     13  *     published by the Free Software Foundation; either version 2 of the
     14  *     License, or (at your option) any later version.
     15  *
     16  *     This file is distributed in the hope that it will be useful,
     17  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
     18  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
     19  *     GNU General Public License for more details.
     20  *
     21  *  Or, alternatively,
     22  *
     23  *  b) Permission is hereby granted, free of charge, to any person
     24  *     obtaining a copy of this software and associated documentation
     25  *     files (the "Software"), to deal in the Software without
     26  *     restriction, including without limitation the rights to use,
     27  *     copy, modify, merge, publish, distribute, sublicense, and/or
     28  *     sell copies of the Software, and to permit persons to whom the
     29  *     Software is furnished to do so, subject to the following
     30  *     conditions:
     31  *
     32  *     The above copyright notice and this permission notice shall be
     33  *     included in all copies or substantial portions of the Software.
     34  *
     35  *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
     36  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
     37  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
     38  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
     39  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
     40  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
     41  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
     42  *     OTHER DEALINGS IN THE SOFTWARE.
     43  */
     44 
     45 /dts-v1/;
     46 #include "rk3288-veyron-chromebook.dtsi"
     47 
     48 / {
     49 	model = "Google Mickey";
     50 	compatible = "google,veyron-mickey-rev8", "google,veyron-mickey-rev7",
     51 		     "google,veyron-mickey-rev6", "google,veyron-mickey-rev5",
     52 		     "google,veyron-mickey-rev4", "google,veyron-mickey-rev3",
     53 		     "google,veyron-mickey-rev2", "google,veyron-mickey-rev1",
     54 		     "google,veyron-mickey-rev0", "google,veyron-mickey",
     55 		     "google,veyron", "rockchip,rk3288";
     56 
     57 	vcc_5v: vcc-5v {
     58 		vin-supply = <&vcc33_sys>;
     59 	};
     60 
     61 	vcc33_io: vcc33_io {
     62 		compatible = "regulator-fixed";
     63 		regulator-name = "vcc33_io";
     64 		regulator-always-on;
     65 		regulator-boot-on;
     66 		vin-supply = <&vcc33_sys>;
     67 	};
     68 };
     69 
     70 &cpu_thermal {
     71 	/delete-node/ trips;
     72 	/delete-node/ cooling-maps;
     73 
     74 	trips {
     75 		cpu_alert_almost_warm: cpu_alert_almost_warm {
     76 			temperature = <63000>; /* millicelsius */
     77 			hysteresis = <2000>; /* millicelsius */
     78 			type = "passive";
     79 		};
     80 		cpu_alert_warm: cpu_alert_warm {
     81 			temperature = <65000>; /* millicelsius */
     82 			hysteresis = <2000>; /* millicelsius */
     83 			type = "passive";
     84 		};
     85 		cpu_alert_almost_hot: cpu_alert_almost_hot {
     86 			temperature = <80000>; /* millicelsius */
     87 			hysteresis = <2000>; /* millicelsius */
     88 			type = "passive";
     89 		};
     90 		cpu_alert_hot: cpu_alert_hot {
     91 			temperature = <82000>; /* millicelsius */
     92 			hysteresis = <2000>; /* millicelsius */
     93 			type = "passive";
     94 		};
     95 		cpu_alert_hotter: cpu_alert_hotter {
     96 			temperature = <84000>; /* millicelsius */
     97 			hysteresis = <2000>; /* millicelsius */
     98 			type = "passive";
     99 		};
    100 		cpu_alert_very_hot: cpu_alert_very_hot {
    101 			temperature = <85000>; /* millicelsius */
    102 			hysteresis = <2000>; /* millicelsius */
    103 			type = "passive";
    104 		};
    105 		cpu_crit: cpu_crit {
    106 			temperature = <90000>; /* millicelsius */
    107 			hysteresis = <2000>; /* millicelsius */
    108 			type = "critical";
    109 		};
    110 	};
    111 
    112 	cooling-maps {
    113 		/*
    114 		 * After 1st level, throttle the CPU down to as low as 1.4 GHz
    115 		 * and don't let the GPU go faster than 400 MHz.  Note that we
    116 		 * won't throttle the GPU lower than 400 MHz due to CPU
    117 		 * heat--we'll let the GPU do the rest itself.
    118 		 */
    119 		cpu_warm_limit_cpu {
    120 			trip = <&cpu_alert_warm>;
    121 			cooling-device =
    122 				<&cpu0 THERMAL_NO_LIMIT 4>;
    123 		};
    124 
    125 		/*
    126 		 * Add some discrete steps to help throttling system deal
    127 		 * with the fact that there are two passive cooling devices:
    128 		 * the CPU and the GPU.
    129 		 *
    130 		 * - 1.2 GHz - 1.0 GHz (almost hot)
    131 		 * - 800 MHz           (hot)
    132 		 * - 800 MHz - 696 MHz (hotter)
    133 		 * - 696 MHz - min     (very hot)
    134 		 *
    135 		 * Note:
    136 		 * - 800 MHz appears to be a "sweet spot" for me.  I can run
    137 		 *   some pretty serious workload here and be happy.
    138 		 * - After 696 MHz we stop lowering voltage, so throttling
    139 		 *   past there is less effective.
    140 		 */
    141 		cpu_almost_hot_limit_cpu {
    142 			trip = <&cpu_alert_almost_hot>;
    143 			cooling-device =
    144 				<&cpu0 5 6>;
    145 		};
    146 		cpu_hot_limit_cpu {
    147 			trip = <&cpu_alert_hot>;
    148 			cooling-device =
    149 				<&cpu0 7 7>;
    150 		};
    151 		cpu_hotter_limit_cpu {
    152 			trip = <&cpu_alert_hotter>;
    153 			cooling-device =
    154 				<&cpu0 7 8>;
    155 		};
    156 		cpu_very_hot_limit_cpu {
    157 			trip = <&cpu_alert_very_hot>;
    158 			cooling-device =
    159 				<&cpu0 8 THERMAL_NO_LIMIT>;
    160 		};
    161 	};
    162 };
    163 
    164 &dmc {
    165 	rockchip,pctl-timing = <0x215 0xc8 0x0 0x35 0x26 0x2 0x70 0x2000d
    166 		0x6 0x0 0x8 0x4 0x17 0x24 0xd 0x6
    167 		0x4 0x8 0x4 0x76 0x4 0x0 0x30 0x0
    168 		0x1 0x2 0x2 0x4 0x0 0x0 0xc0 0x4
    169 		0x8 0x1f4>;
    170 	rockchip,phy-timing = <0x48d7dd93 0x187008d8 0x121076
    171 		0x0 0xc3 0x6 0x2>;
    172 	rockchip,sdram-params = <0x20d266a4 0x5b6 2 533000000 6 9 1>;
    173 };
    174 
    175 &emmc {
    176 	/delete-property/mmc-hs200-1_8v;
    177 };
    178 
    179 &i2c2 {
    180 	status = "disabled";
    181 };
    182 
    183 &i2c4 {
    184 	status = "disabled";
    185 };
    186 
    187 &i2s {
    188 	status = "okay";
    189 	clock-names = "i2s_hclk", "i2s_clk", "i2s_clk_out";
    190 	clocks = <&cru HCLK_I2S0>, <&cru SCLK_I2S0>, <&cru SCLK_I2S0_OUT>;
    191 };
    192 
    193 &rk808 {
    194 	pinctrl-names = "default";
    195 	pinctrl-0 = <&pmic_int_l &dvs_1 &dvs_2>;
    196 	dvs-gpios = <&gpio7 12 GPIO_ACTIVE_HIGH>,
    197 		    <&gpio7 15 GPIO_ACTIVE_HIGH>;
    198 
    199 	/delete-property/ vcc6-supply;
    200 	/delete-property/ vcc12-supply;
    201 
    202 	vcc11-supply = <&vcc33_sys>;
    203 
    204 	regulators {
    205 		/* vcc33_io is sourced directly from vcc33_sys */
    206 		/delete-node/ LDO_REG1;
    207 		/delete-node/ LDO_REG7;
    208 
    209 		/* This is not a pwren anymore, but the real power supply */
    210 		vdd10_lcd: LDO_REG7 {
    211 			regulator-always-on;
    212 			regulator-boot-on;
    213 			regulator-min-microvolt = <1000000>;
    214 			regulator-max-microvolt = <1000000>;
    215 			regulator-name = "vdd10_lcd";
    216 			regulator-suspend-mem-disabled;
    217 		};
    218 
    219 		vcc18_lcd: LDO_REG8 {
    220 			regulator-always-on;
    221 			regulator-boot-on;
    222 			regulator-min-microvolt = <1800000>;
    223 			regulator-max-microvolt = <1800000>;
    224 			regulator-name = "vcc18_lcd";
    225 			regulator-suspend-mem-disabled;
    226 		};
    227 	};
    228 };
    229 
    230 &pinctrl {
    231 	hdmi {
    232 		power_hdmi_on: power-hdmi-on {
    233 			rockchip,pins = <7 11 RK_FUNC_GPIO &pcfg_pull_none>;
    234 		};
    235 	};
    236 
    237 	pmic {
    238 		dvs_1: dvs-1 {
    239 			rockchip,pins = <7 12 RK_FUNC_GPIO &pcfg_pull_down>;
    240 		};
    241 
    242 		dvs_2: dvs-2 {
    243 			rockchip,pins = <7 15 RK_FUNC_GPIO &pcfg_pull_down>;
    244 		};
    245 	};
    246 };
    247 
    248 &sdmmc {
    249 	status = "disabled";
    250 };
    251 
    252 &sdio0 {
    253 	status = "disabled";
    254 };
    255 
    256 &sdmmc {
    257 	status = "disabled";
    258 };
    259 
    260 &spi0 {
    261 	status = "disabled";
    262 };
    263 
    264 &usb_host0_ehci {
    265 	status = "disabled";
    266 };
    267 
    268 &usb_host1 {
    269 	status = "disabled";
    270 };
    271 
    272 &vcc50_hdmi {
    273 	enable-active-high;
    274 	gpio = <&gpio7 11 GPIO_ACTIVE_HIGH>;
    275 	pinctrl-names = "default";
    276 	pinctrl-0 = <&power_hdmi_on>;
    277 };
    278