1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * Copyright (C) 2012 Altera Corporation <www.altera.com> 4 */ 5 6 /dts-v1/; 7 /* First 4KB has trampoline code for secondary cores. */ 8 /memreserve/ 0x00000000 0x0001000; 9 #include "socfpga.dtsi" 10 11 / { 12 soc { 13 clkmgr@ffd04000 { 14 clocks { 15 osc1 { 16 clock-frequency = <25000000>; 17 }; 18 }; 19 }; 20 21 mmc0: dwmmc0@ff704000 { 22 num-slots = <1>; 23 broken-cd; 24 bus-width = <4>; 25 cap-mmc-highspeed; 26 cap-sd-highspeed; 27 drvsel = <3>; 28 smplsel = <0>; 29 }; 30 31 sysmgr@ffd08000 { 32 cpu1-start-addr = <0xffd080c4>; 33 }; 34 }; 35 }; 36
