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      1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
      2 //
      3 // Device Tree Source for UniPhier LD20 Reference Board
      4 //
      5 // Copyright (C) 2015-2016 Socionext Inc.
      6 //   Author: Masahiro Yamada <yamada.masahiro (a] socionext.com>
      7 
      8 /dts-v1/;
      9 #include "uniphier-ld20.dtsi"
     10 #include "uniphier-ref-daughter.dtsi"
     11 #include "uniphier-support-card.dtsi"
     12 
     13 / {
     14 	model = "UniPhier LD20 Reference Board";
     15 	compatible = "socionext,uniphier-ld20-ref", "socionext,uniphier-ld20";
     16 
     17 	chosen {
     18 		stdout-path = "serial0:115200n8";
     19 	};
     20 
     21 	aliases {
     22 		serial0 = &serial0;
     23 		serial1 = &serial1;
     24 		serial2 = &serial2;
     25 		serial3 = &serial3;
     26 		i2c0 = &i2c0;
     27 		i2c1 = &i2c1;
     28 		i2c2 = &i2c2;
     29 		i2c3 = &i2c3;
     30 		i2c4 = &i2c4;
     31 		i2c5 = &i2c5;
     32 	};
     33 
     34 	memory@80000000 {
     35 		device_type = "memory";
     36 		reg = <0 0x80000000 0 0xc0000000>;
     37 	};
     38 };
     39 
     40 &ethsc {
     41 	interrupts = <0 8>;
     42 };
     43 
     44 &serial0 {
     45 	status = "okay";
     46 };
     47 
     48 &gpio {
     49 	xirq0 {
     50 		gpio-hog;
     51 		gpios = <UNIPHIER_GPIO_IRQ(0) 0>;
     52 		input;
     53 	};
     54 };
     55 
     56 &i2c0 {
     57 	status = "okay";
     58 };
     59 
     60 &eth {
     61 	status = "okay";
     62 	phy-handle = <&ethphy>;
     63 };
     64 
     65 &mdio {
     66 	ethphy: ethphy@0 {
     67 		reg = <0>;
     68 	};
     69 };
     70 
     71 &pinctrl_ether_rgmii {
     72 	tx {
     73 		pins = "RGMII_TXCLK", "RGMII_TXD0", "RGMII_TXD1",
     74 		       "RGMII_TXD2", "RGMII_TXD3", "RGMII_TXCTL";
     75 		drive-strength = <9>;
     76 	};
     77 };
     78