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      1 // SPDX-License-Identifier: GPL-2.0+
      2 /*
      3  * dts file for Xilinx ZynqMP zc1751-xm016-dc2
      4  *
      5  * (C) Copyright 2015 - 2018, Xilinx, Inc.
      6  *
      7  * Michal Simek <michal.simek (a] xilinx.com>
      8  */
      9 
     10 /dts-v1/;
     11 
     12 #include "zynqmp.dtsi"
     13 #include "zynqmp-clk-ccf.dtsi"
     14 
     15 / {
     16 	model = "ZynqMP zc1751-xm016-dc2 RevA";
     17 	compatible = "xlnx,zynqmp-zc1751", "xlnx,zynqmp";
     18 
     19 	aliases {
     20 		can0 = &can0;
     21 		can1 = &can1;
     22 		ethernet0 = &gem2;
     23 		gpio0 = &gpio;
     24 		i2c0 = &i2c0;
     25 		rtc0 = &rtc;
     26 		serial0 = &uart0;
     27 		serial1 = &uart1;
     28 		spi0 = &spi0;
     29 		spi1 = &spi1;
     30 		usb0 = &usb1;
     31 	};
     32 
     33 	chosen {
     34 		bootargs = "earlycon";
     35 		stdout-path = "serial0:115200n8";
     36 	};
     37 
     38 	memory@0 {
     39 		device_type = "memory";
     40 		reg = <0x0 0x0 0x0 0x80000000>, <0x8 0x00000000 0x0 0x80000000>;
     41 	};
     42 };
     43 
     44 &can0 {
     45 	status = "okay";
     46 };
     47 
     48 &can1 {
     49 	status = "okay";
     50 };
     51 
     52 &fpd_dma_chan1 {
     53 	status = "okay";
     54 };
     55 
     56 &fpd_dma_chan2 {
     57 	status = "okay";
     58 };
     59 
     60 &fpd_dma_chan3 {
     61 	status = "okay";
     62 };
     63 
     64 &fpd_dma_chan4 {
     65 	status = "okay";
     66 };
     67 
     68 &fpd_dma_chan5 {
     69 	status = "okay";
     70 };
     71 
     72 &fpd_dma_chan6 {
     73 	status = "okay";
     74 };
     75 
     76 &fpd_dma_chan7 {
     77 	status = "okay";
     78 };
     79 
     80 &fpd_dma_chan8 {
     81 	status = "okay";
     82 };
     83 
     84 &gem2 {
     85 	status = "okay";
     86 	phy-handle = <&phy0>;
     87 	phy-mode = "rgmii-id";
     88 	phy0: phy@5 {
     89 		reg = <5>;
     90 		ti,rx-internal-delay = <0x8>;
     91 		ti,tx-internal-delay = <0xa>;
     92 		ti,fifo-depth = <0x1>;
     93 	};
     94 };
     95 
     96 &gpio {
     97 	status = "okay";
     98 };
     99 
    100 &i2c0 {
    101 	status = "okay";
    102 	clock-frequency = <400000>;
    103 
    104 	tca6416_u26: gpio@20 {
    105 		compatible = "ti,tca6416";
    106 		reg = <0x20>;
    107 		gpio-controller;
    108 		#gpio-cells = <2>;
    109 		/* IRQ not connected */
    110 	};
    111 
    112 	rtc@68 {
    113 		compatible = "dallas,ds1339";
    114 		reg = <0x68>;
    115 	};
    116 };
    117 
    118 &nand0 {
    119 	status = "okay";
    120 	arasan,has-mdma;
    121 	num-cs = <2>;
    122 
    123 	partition@0 {	/* for testing purpose */
    124 		label = "nand-fsbl-uboot";
    125 		reg = <0x0 0x0 0x400000>;
    126 	};
    127 	partition@1 {	/* for testing purpose */
    128 		label = "nand-linux";
    129 		reg = <0x0 0x400000 0x1400000>;
    130 	};
    131 	partition@2 {	/* for testing purpose */
    132 		label = "nand-device-tree";
    133 		reg = <0x0 0x1800000 0x400000>;
    134 	};
    135 	partition@3 {	/* for testing purpose */
    136 		label = "nand-rootfs";
    137 		reg = <0x0 0x1C00000 0x1400000>;
    138 	};
    139 	partition@4 {	/* for testing purpose */
    140 		label = "nand-bitstream";
    141 		reg = <0x0 0x3000000 0x400000>;
    142 	};
    143 	partition@5 {	/* for testing purpose */
    144 		label = "nand-misc";
    145 		reg = <0x0 0x3400000 0xFCC00000>;
    146 	};
    147 
    148 	partition@6 {	/* for testing purpose */
    149 		label = "nand1-fsbl-uboot";
    150 		reg = <0x1 0x0 0x400000>;
    151 	};
    152 	partition@7 {	/* for testing purpose */
    153 		label = "nand1-linux";
    154 		reg = <0x1 0x400000 0x1400000>;
    155 	};
    156 	partition@8 {	/* for testing purpose */
    157 		label = "nand1-device-tree";
    158 		reg = <0x1 0x1800000 0x400000>;
    159 	};
    160 	partition@9 {	/* for testing purpose */
    161 		label = "nand1-rootfs";
    162 		reg = <0x1 0x1C00000 0x1400000>;
    163 	};
    164 	partition@10 {	/* for testing purpose */
    165 		label = "nand1-bitstream";
    166 		reg = <0x1 0x3000000 0x400000>;
    167 	};
    168 	partition@11 {	/* for testing purpose */
    169 		label = "nand1-misc";
    170 		reg = <0x1 0x3400000 0xFCC00000>;
    171 	};
    172 };
    173 
    174 &rtc {
    175 	status = "okay";
    176 };
    177 
    178 &spi0 {
    179 	status = "okay";
    180 	num-cs = <1>;
    181 	spi0_flash0: flash@0 {
    182 		#address-cells = <1>;
    183 		#size-cells = <1>;
    184 		compatible = "sst,sst25wf080", "jedec,spi-nor";
    185 		spi-max-frequency = <50000000>;
    186 		reg = <0>;
    187 
    188 		partition@0 {
    189 			label = "data";
    190 			reg = <0x0 0x100000>;
    191 		};
    192 	};
    193 };
    194 
    195 &spi1 {
    196 	status = "okay";
    197 	num-cs = <1>;
    198 	spi1_flash0: flash@0 {
    199 		#address-cells = <1>;
    200 		#size-cells = <1>;
    201 		compatible = "atmel,at45db041e", "atmel,at45", "atmel,dataflash";
    202 		spi-max-frequency = <20000000>;
    203 		reg = <0>;
    204 
    205 		partition@0 {
    206 			label = "data";
    207 			reg = <0x0 0x84000>;
    208 		};
    209 	};
    210 };
    211 
    212 /* ULPI SMSC USB3320 */
    213 &usb1 {
    214 	status = "okay";
    215 };
    216 
    217 &dwc3_1 {
    218 	status = "okay";
    219 	dr_mode = "host";
    220 };
    221 
    222 &uart0 {
    223 	status = "okay";
    224 };
    225 
    226 &uart1 {
    227 	status = "okay";
    228 };
    229