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      1 /* SPDX-License-Identifier: GPL-2.0+ */
      2 /*
      3  * Copyright 2017 Theobroma Systems Design und Consulting GmbH
      4  */
      5 
      6 /*
      7  * Execution starts on the instruction following this 4-byte header
      8  * (containing the magic 'RK30', 'RK31', 'RK32' or 'RK33').  This
      9  * magic constant will be written into the final image by the rkimage
     10  * tool, but we need to reserve space for it here.
     11  *
     12  * To make life easier for everyone, we build the SPL binary with
     13  * space for this 4-byte header already included in the binary.
     14  */
     15 #ifdef CONFIG_SPL_BUILD
     16 	/*
     17 	 * We need to add 4 bytes of space for the 'RK33' at the
     18 	 * beginning of the executable.	 However, as we want to keep
     19 	 * this generic and make it applicable to builds that are like
     20 	 * the RK3368 (TPL needs this, SPL doesn't) or the RK3399 (no
     21 	 * TPL, but extra space needed in the SPL), we simply insert
     22 	 * a branch-to-next-instruction-word with the expectation that
     23 	 * the first one may be overwritten, if this is the first stage
     24 	 * contained in the final image created with mkimage)...
     25 	 */
     26 	b 1f	 /* if overwritten, entry-address is at the next word */
     27 1:
     28 #endif
     29 #if CONFIG_IS_ENABLED(ROCKCHIP_EARLYRETURN_TO_BROM)
     30 	adr     r3, entry_counter
     31 	ldr	r0, [r3]
     32 	cmp	r0, #1           /* check if entry_counter == 1 */
     33 	beq	reset            /* regular bootup */
     34 	add     r0, #1
     35 	str	r0, [r3]         /* increment the entry_counter in memory */
     36 	mov     r0, #0           /* return 0 to the BROM to signal 'OK' */
     37 	bx	lr               /* return control to the BROM */
     38 entry_counter:
     39 	.word   0
     40 #endif
     41 
     42 #if (defined(CONFIG_SPL_BUILD) || defined(CONFIG_ARM64))
     43 	/* U-Boot proper of armv7 do not need this */
     44 	b reset
     45 #endif
     46 
     47 #if !defined(CONFIG_ARM64)
     48 	/*
     49 	 * For armv7, the addr '_start' will used as vector start address
     50 	 * and write to VBAR register, which needs to aligned to 0x20.
     51 	 */
     52 	.align(5), 0x0
     53 _start:
     54 	ARM_VECTORS
     55 #endif
     56 
     57 #if defined(CONFIG_SPL_BUILD) && (CONFIG_ROCKCHIP_SPL_RESERVE_IRAM > 0)
     58 	.space CONFIG_ROCKCHIP_SPL_RESERVE_IRAM	/* space for the ATF data */
     59 #endif
     60