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      1 // SPDX-License-Identifier: GPL-2.0+
      2 /*
      3  * Copyright (C) 2015 Freescale Semiconductor, Inc.
      4  *
      5  * The file use ls102xa/timer.c as a reference.
      6  */
      7 
      8 #include <common.h>
      9 #include <asm/io.h>
     10 #include <div64.h>
     11 #include <asm/arch/imx-regs.h>
     12 #include <asm/arch/sys_proto.h>
     13 #include <asm/mach-imx/syscounter.h>
     14 
     15 DECLARE_GLOBAL_DATA_PTR;
     16 
     17 /*
     18  * This function is intended for SHORT delays only.
     19  * It will overflow at around 10 seconds @ 400MHz,
     20  * or 20 seconds @ 200MHz.
     21  */
     22 unsigned long usec2ticks(unsigned long usec)
     23 {
     24 	ulong ticks;
     25 
     26 	if (usec < 1000)
     27 		ticks = ((usec * (get_tbclk()/1000)) + 500) / 1000;
     28 	else
     29 		ticks = ((usec / 10) * (get_tbclk() / 100000));
     30 
     31 	return ticks;
     32 }
     33 
     34 static inline unsigned long long tick_to_time(unsigned long long tick)
     35 {
     36 	unsigned long freq;
     37 
     38 	asm volatile("mrc p15, 0, %0, c14, c0, 0" : "=r" (freq));
     39 
     40 	tick *= CONFIG_SYS_HZ;
     41 	do_div(tick, freq);
     42 
     43 	return tick;
     44 }
     45 
     46 static inline unsigned long long us_to_tick(unsigned long long usec)
     47 {
     48 	unsigned long freq;
     49 
     50 	asm volatile("mrc p15, 0, %0, c14, c0, 0" : "=r" (freq));
     51 
     52 	usec = usec * freq  + 999999;
     53 	do_div(usec, 1000000);
     54 
     55 	return usec;
     56 }
     57 
     58 int timer_init(void)
     59 {
     60 	struct sctr_regs *sctr = (struct sctr_regs *)SCTR_BASE_ADDR;
     61 	unsigned long val, freq;
     62 
     63 	freq = CONFIG_SC_TIMER_CLK;
     64 	asm volatile("mcr p15, 0, %0, c14, c0, 0" : : "r" (freq));
     65 
     66 	writel(freq, &sctr->cntfid0);
     67 
     68 	/* Enable system counter */
     69 	val = readl(&sctr->cntcr);
     70 	val &= ~(SC_CNTCR_FREQ0 | SC_CNTCR_FREQ1);
     71 	val |= SC_CNTCR_FREQ0 | SC_CNTCR_ENABLE | SC_CNTCR_HDBG;
     72 	writel(val, &sctr->cntcr);
     73 
     74 	gd->arch.tbl = 0;
     75 	gd->arch.tbu = 0;
     76 
     77 	return 0;
     78 }
     79 
     80 unsigned long long get_ticks(void)
     81 {
     82 	unsigned long long now;
     83 
     84 	asm volatile("mrrc p15, 0, %Q0, %R0, c14" : "=r" (now));
     85 
     86 	gd->arch.tbl = (unsigned long)(now & 0xffffffff);
     87 	gd->arch.tbu = (unsigned long)(now >> 32);
     88 
     89 	return now;
     90 }
     91 
     92 ulong get_timer_masked(void)
     93 {
     94 	return tick_to_time(get_ticks());
     95 }
     96 
     97 ulong get_timer(ulong base)
     98 {
     99 	return get_timer_masked() - base;
    100 }
    101 
    102 void __udelay(unsigned long usec)
    103 {
    104 	unsigned long long tmp;
    105 	ulong tmo;
    106 
    107 	tmo = us_to_tick(usec);
    108 	tmp = get_ticks() + tmo;	/* get current timestamp */
    109 
    110 	while (get_ticks() < tmp)	/* loop till event */
    111 		 /*NOP*/;
    112 }
    113 
    114 /*
    115  * This function is derived from PowerPC code (timebase clock frequency).
    116  * On ARM it returns the number of timer ticks per second.
    117  */
    118 ulong get_tbclk(void)
    119 {
    120 	unsigned long freq;
    121 
    122 	asm volatile("mrc p15, 0, %0, c14, c0, 0" : "=r" (freq));
    123 
    124 	return freq;
    125 }
    126