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      1 /* SPDX-License-Identifier: GPL-2.0+ */
      2 /*
      3  *  Copyright (C) 2013-2017 Altera Corporation <www.altera.com>
      4  */
      5 
      6 #ifndef _CLOCK_MANAGER_H_
      7 #define _CLOCK_MANAGER_H_
      8 
      9 #ifndef __ASSEMBLER__
     10 void cm_wait_for_lock(u32 mask);
     11 int cm_wait_for_fsm(void);
     12 void cm_print_clock_quick_summary(void);
     13 #endif
     14 
     15 #if defined(CONFIG_TARGET_SOCFPGA_GEN5)
     16 #include <asm/arch/clock_manager_gen5.h>
     17 #elif defined(CONFIG_TARGET_SOCFPGA_ARRIA10)
     18 #include <asm/arch/clock_manager_arria10.h>
     19 #elif defined(CONFIG_TARGET_SOCFPGA_STRATIX10)
     20 #include <asm/arch/clock_manager_s10.h>
     21 #endif
     22 
     23 #endif /* _CLOCK_MANAGER_H_ */
     24