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      1 if ARCH_STM32MP
      2 
      3 config SPL
      4 	select SPL_BOARD_INIT
      5 	select SPL_CLK
      6 	select SPL_DM
      7 	select SPL_DM_SEQ_ALIAS
      8 	select SPL_FRAMEWORK
      9 	select SPL_GPIO_SUPPORT
     10 	select SPL_LIBCOMMON_SUPPORT
     11 	select SPL_LIBGENERIC_SUPPORT
     12 	select SPL_OF_CONTROL
     13 	select SPL_OF_TRANSLATE
     14 	select SPL_PINCTRL
     15 	select SPL_REGMAP
     16 	select SPL_RESET_SUPPORT
     17 	select SPL_SERIAL_SUPPORT
     18 	select SPL_SYSCON
     19 	select SPL_DRIVERS_MISC_SUPPORT
     20 	imply SPL_LIBDISK_SUPPORT
     21 
     22 config SYS_SOC
     23 	default "stm32mp"
     24 
     25 config TARGET_STM32MP1
     26 	bool "Support stm32mp1xx"
     27 	select ARCH_SUPPORT_PSCI
     28 	select CPU_V7A
     29 	select CPU_V7_HAS_NONSEC
     30 	select CPU_V7_HAS_VIRT
     31 	select PINCTRL_STM32
     32 	select STM32_RESET
     33 	select SYS_ARCH_TIMER
     34 	select SYSRESET_SYSCON
     35 	help
     36 		target STMicroelectronics SOC STM32MP1 family
     37 		STMicroelectronics MPU with core ARMv7
     38 
     39 config SYS_TEXT_BASE
     40 	prompt "U-Boot base address"
     41 	default 0xC0100000
     42 	help
     43 		configure the U-Boot base address
     44 		when DDR driver is used:
     45 		  DDR + 1MB (0xC0100000)
     46 
     47 config SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION_MMC2
     48 	hex "Partition on MMC2 to use to load U-Boot from"
     49 	depends on SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
     50 	default 1
     51 	help
     52 	  Partition on the second MMC to load U-Boot from when the MMC is being
     53 	  used in raw mode
     54 
     55 source "board/st/stm32mp1/Kconfig"
     56 
     57 # currently activated for debug / should be deactivated for real product
     58 if DEBUG_UART
     59 
     60 config DEBUG_UART_BOARD_INIT
     61 	default y
     62 
     63 # debug on UART4 by default
     64 config DEBUG_UART_BASE
     65 	default 0x40010000
     66 
     67 # clock source is HSI on reset
     68 config DEBUG_UART_CLOCK
     69 	default 64000000
     70 endif
     71 
     72 endif
     73