1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * (C) Copyright 2007-2012 4 * Allwinner Technology Co., Ltd. <www.allwinnertech.com> 5 * Tom Cubie <tangliang (at) allwinnertech.com> 6 * 7 * (C) Copyright 2013 Luke Kenneth Casson Leighton <lkcl (at) lkcl.net> 8 */ 9 10 #include <common.h> 11 #include <asm/io.h> 12 #include <asm/arch/clock.h> 13 #include <asm/arch/gpio.h> 14 #include <asm/arch/prcm.h> 15 #include <asm/arch/gtbus.h> 16 #include <asm/arch/sys_proto.h> 17 18 __weak void clock_init_sec(void) 19 { 20 } 21 22 __weak void gtbus_init(void) 23 { 24 } 25 26 int clock_init(void) 27 { 28 #ifdef CONFIG_SPL_BUILD 29 clock_init_safe(); 30 gtbus_init(); 31 #endif 32 clock_init_uart(); 33 clock_init_sec(); 34 35 return 0; 36 } 37 38 /* These functions are shared between various SoCs so put them here. */ 39 #if defined CONFIG_SUNXI_GEN_SUN6I && !defined CONFIG_MACH_SUN9I 40 int clock_twi_onoff(int port, int state) 41 { 42 struct sunxi_ccm_reg *const ccm = 43 (struct sunxi_ccm_reg *)SUNXI_CCM_BASE; 44 45 if (port == 5) { 46 if (state) 47 prcm_apb0_enable( 48 PRCM_APB0_GATE_PIO | PRCM_APB0_GATE_I2C); 49 else 50 prcm_apb0_disable( 51 PRCM_APB0_GATE_PIO | PRCM_APB0_GATE_I2C); 52 return 0; 53 } 54 55 /* set the apb clock gate and reset for twi */ 56 if (state) { 57 setbits_le32(&ccm->apb2_gate, 58 CLK_GATE_OPEN << (APB2_GATE_TWI_SHIFT + port)); 59 setbits_le32(&ccm->apb2_reset_cfg, 60 1 << (APB2_RESET_TWI_SHIFT + port)); 61 } else { 62 clrbits_le32(&ccm->apb2_reset_cfg, 63 1 << (APB2_RESET_TWI_SHIFT + port)); 64 clrbits_le32(&ccm->apb2_gate, 65 CLK_GATE_OPEN << (APB2_GATE_TWI_SHIFT + port)); 66 } 67 68 return 0; 69 } 70 #endif 71
