1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * Copyright (C) 2018 lvaro Fernndez Rojas <noltari (a] gmail.com> 4 */ 5 6 #include <dt-bindings/clock/bcm6318-clock.h> 7 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/power-domain/bcm6318-power-domain.h> 9 #include <dt-bindings/reset/bcm6318-reset.h> 10 #include "skeleton.dtsi" 11 12 / { 13 compatible = "brcm,bcm6318"; 14 15 aliases { 16 spi0 = &spi; 17 }; 18 19 cpus { 20 reg = <0x10000000 0x4>; 21 #address-cells = <1>; 22 #size-cells = <0>; 23 u-boot,dm-pre-reloc; 24 25 cpu@0 { 26 compatible = "brcm,bcm6318-cpu", "mips,mips4Kc"; 27 device_type = "cpu"; 28 reg = <0>; 29 u-boot,dm-pre-reloc; 30 }; 31 }; 32 33 clocks { 34 compatible = "simple-bus"; 35 #address-cells = <1>; 36 #size-cells = <1>; 37 u-boot,dm-pre-reloc; 38 39 hsspi_pll: hsspi-pll { 40 compatible = "fixed-clock"; 41 #clock-cells = <0>; 42 clock-frequency = <250000000>; 43 }; 44 45 periph_osc: periph-osc { 46 compatible = "fixed-clock"; 47 #clock-cells = <0>; 48 clock-frequency = <50000000>; 49 u-boot,dm-pre-reloc; 50 }; 51 52 periph_clk: periph-clk { 53 compatible = "brcm,bcm6345-clk"; 54 reg = <0x10000004 0x4>; 55 #clock-cells = <1>; 56 }; 57 }; 58 59 ubus { 60 compatible = "simple-bus"; 61 #address-cells = <1>; 62 #size-cells = <1>; 63 u-boot,dm-pre-reloc; 64 65 periph_rst: reset-controller@10000010 { 66 compatible = "brcm,bcm6345-reset"; 67 reg = <0x10000010 0x4>; 68 #reset-cells = <1>; 69 }; 70 71 wdt: watchdog@10000068 { 72 compatible = "brcm,bcm6345-wdt"; 73 reg = <0x10000068 0xc>; 74 clocks = <&periph_osc>; 75 }; 76 77 wdt-reboot { 78 compatible = "wdt-reboot"; 79 wdt = <&wdt>; 80 }; 81 82 pll_cntl: syscon@10000074 { 83 compatible = "syscon"; 84 reg = <0x10000074 0x4>; 85 }; 86 87 syscon-reboot { 88 compatible = "syscon-reboot"; 89 regmap = <&pll_cntl>; 90 offset = <0x0>; 91 mask = <0x1>; 92 }; 93 94 gpio1: gpio-controller@10000080 { 95 compatible = "brcm,bcm6345-gpio"; 96 reg = <0x10000080 0x4>, <0x10000088 0x4>; 97 gpio-controller; 98 #gpio-cells = <2>; 99 ngpios = <18>; 100 101 status = "disabled"; 102 }; 103 104 gpio0: gpio-controller@10000084 { 105 compatible = "brcm,bcm6345-gpio"; 106 reg = <0x10000084 0x4>, <0x1000008c 0x4>; 107 gpio-controller; 108 #gpio-cells = <2>; 109 110 status = "disabled"; 111 }; 112 113 uart0: serial@10000100 { 114 compatible = "brcm,bcm6345-uart"; 115 reg = <0x10000100 0x18>; 116 clocks = <&periph_osc>; 117 118 status = "disabled"; 119 }; 120 121 leds: led-controller@10000200 { 122 compatible = "brcm,bcm6328-leds"; 123 reg = <0x10000200 0x28>; 124 #address-cells = <1>; 125 #size-cells = <0>; 126 127 status = "disabled"; 128 }; 129 130 periph_pwr: power-controller@100008e8 { 131 compatible = "brcm,bcm6328-power-domain"; 132 reg = <0x100008e8 0x4>; 133 #power-domain-cells = <1>; 134 }; 135 136 spi: spi@10003000 { 137 compatible = "brcm,bcm6328-hsspi"; 138 #address-cells = <1>; 139 #size-cells = <0>; 140 reg = <0x10003000 0x600>; 141 clocks = <&periph_clk BCM6318_CLK_HSSPI>, <&hsspi_pll>; 142 clock-names = "hsspi", "pll"; 143 resets = <&periph_rst BCM6318_RST_SPI>; 144 spi-max-frequency = <33333334>; 145 num-cs = <3>; 146 147 status = "disabled"; 148 }; 149 150 memory-controller@10004000 { 151 compatible = "brcm,bcm6318-mc"; 152 reg = <0x10004000 0x38>; 153 u-boot,dm-pre-reloc; 154 }; 155 156 ehci: usb-controller@10005000 { 157 compatible = "brcm,bcm6318-ehci", "generic-ehci"; 158 reg = <0x10005000 0x100>; 159 phys = <&usbh>; 160 big-endian; 161 162 status = "disabled"; 163 }; 164 165 ohci: usb-controller@10005100 { 166 compatible = "brcm,bcm6318-ohci", "generic-ohci"; 167 reg = <0x10005100 0x100>; 168 phys = <&usbh>; 169 big-endian; 170 171 status = "disabled"; 172 }; 173 174 usbh: usb-phy@10005200 { 175 compatible = "brcm,bcm6318-usbh"; 176 reg = <0x10005200 0x30>; 177 #phy-cells = <0>; 178 clocks = <&periph_clk BCM6318_CLK_USB>; 179 clock-names = "usbh"; 180 power-domains = <&periph_pwr BCM6318_PWR_USB>; 181 resets = <&periph_rst BCM6318_RST_USBH>; 182 183 status = "disabled"; 184 }; 185 }; 186 }; 187
