Home | History | Annotate | Download | only in dts
      1 // SPDX-License-Identifier: GPL-2.0+
      2 /*
      3  * Copyright (C) 2015-2016 Wills Wang <wills.wang (a] live.com>
      4  */
      5 
      6 #include <dt-bindings/interrupt-controller/irq.h>
      7 #include "skeleton.dtsi"
      8 
      9 / {
     10 	compatible = "qca,qca953x";
     11 
     12 	#address-cells = <1>;
     13 	#size-cells = <1>;
     14 
     15 	cpus {
     16 		#address-cells = <1>;
     17 		#size-cells = <0>;
     18 
     19 		cpu@0 {
     20 			device_type = "cpu";
     21 			compatible = "mips,mips24Kc";
     22 			reg = <0>;
     23 		};
     24 	};
     25 
     26 	clocks {
     27 		#address-cells = <1>;
     28 		#size-cells = <1>;
     29 		ranges;
     30 
     31 		xtal: xtal {
     32 			#clock-cells = <0>;
     33 			compatible = "fixed-clock";
     34 			clock-output-names = "xtal";
     35 		};
     36 	};
     37 
     38 	pinctrl {
     39 		u-boot,dm-pre-reloc;
     40 		compatible = "qca,qca953x-pinctrl";
     41 		ranges;
     42 		#address-cells = <1>;
     43 		#size-cells = <1>;
     44 		reg = <0x18040000 0x100>;
     45 	};
     46 
     47 	ahb {
     48 		compatible = "simple-bus";
     49 		ranges;
     50 
     51 		#address-cells = <1>;
     52 		#size-cells = <1>;
     53 
     54 		apb {
     55 			compatible = "simple-bus";
     56 			ranges;
     57 
     58 			#address-cells = <1>;
     59 			#size-cells = <1>;
     60 
     61 			uart0: uart@18020000 {
     62 				compatible = "ns16550";
     63 				reg = <0x18020000 0x20>;
     64 				reg-shift = <2>;
     65 				clock-frequency = <25000000>;
     66 				interrupts = <128 IRQ_TYPE_LEVEL_HIGH>;
     67 
     68 				status = "disabled";
     69 			};
     70 		};
     71 
     72 		spi0: spi@1f000000 {
     73 			compatible = "qca,ar7100-spi";
     74 			reg = <0x1f000000 0x10>;
     75 			interrupts = <129 IRQ_TYPE_LEVEL_HIGH>;
     76 
     77 			status = "disabled";
     78 
     79 			#address-cells = <1>;
     80 			#size-cells = <0>;
     81 		};
     82 	};
     83 };
     84