1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * Copyright 2013 Freescale Semiconductor, Inc. 4 */ 5 6 #include <config.h> 7 #include <common.h> 8 #include <asm/io.h> 9 #include <asm/immap_85xx.h> 10 #include <asm/fsl_serdes.h> 11 12 #define SRDS1_MAX_LANES 4 13 14 static u32 serdes1_prtcl_map; 15 16 struct serdes_config { 17 u32 protocol; 18 u8 lanes[SRDS1_MAX_LANES]; 19 }; 20 21 static const struct serdes_config serdes1_cfg_tbl[] = { 22 /* SerDes 1 */ 23 {1, {PCIE1, PCIE1, PCIE1, PCIE1} }, 24 {2, {PCIE1, PCIE1, PCIE1, PCIE1} }, 25 {3, {PCIE1, PCIE1, NONE, NONE} }, 26 {4, {PCIE1, PCIE1, NONE, NONE} }, 27 {5, {PCIE1, NONE, NONE, NONE} }, 28 {6, {PCIE1, NONE, NONE, NONE} }, 29 {} 30 }; 31 32 int is_serdes_configured(enum srds_prtcl device) 33 { 34 if (!(serdes1_prtcl_map & (1 << NONE))) 35 fsl_serdes_init(); 36 37 return (1 << device) & serdes1_prtcl_map; 38 } 39 40 void fsl_serdes_init(void) 41 { 42 ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR; 43 u32 pordevsr = in_be32(&gur->pordevsr); 44 u32 srds_cfg = (pordevsr & MPC85xx_PORDEVSR_IO_SEL) >> 45 MPC85xx_PORDEVSR_IO_SEL_SHIFT; 46 const struct serdes_config *ptr; 47 int lane; 48 49 if (serdes1_prtcl_map & (1 << NONE)) 50 return; 51 52 debug("PORDEVSR[IO_SEL_SRDS] = %x\n", srds_cfg); 53 54 if (srds_cfg > ARRAY_SIZE(serdes1_cfg_tbl)) { 55 printf("Invalid PORDEVSR[IO_SEL_SRDS] = %d\n", srds_cfg); 56 return; 57 } 58 59 ptr = &serdes1_cfg_tbl[srds_cfg]; 60 if (!ptr->protocol) 61 return; 62 63 for (lane = 0; lane < SRDS1_MAX_LANES; lane++) { 64 enum srds_prtcl lane_prtcl = ptr->lanes[lane]; 65 serdes1_prtcl_map |= (1 << lane_prtcl); 66 } 67 68 /* Set the first bit to indicate serdes has been initialized */ 69 serdes1_prtcl_map |= (1 << NONE); 70 } 71
