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      1 // SPDX-License-Identifier: GPL-2.0+
      2 /*
      3  * Copyright 2010 Freescale Semiconductor, Inc.
      4  */
      5 
      6 #include <config.h>
      7 #include <common.h>
      8 #include <asm/io.h>
      9 #include <asm/immap_85xx.h>
     10 #include <asm/fsl_serdes.h>
     11 
     12 #define SRDS1_MAX_LANES		8
     13 
     14 static u32 serdes1_prtcl_map;
     15 
     16 static u8 serdes1_cfg_tbl[][SRDS1_MAX_LANES] = {
     17 	[0x2] = {PCIE1, PCIE1, PCIE1, PCIE1, NONE, NONE, NONE, NONE},
     18 	[0x3] = {PCIE1, PCIE1, PCIE1, PCIE1, PCIE2, PCIE2, PCIE2, PCIE2},
     19 	[0x6] = {NONE, NONE, NONE, NONE, SRIO1, SRIO1, SRIO1, SRIO1},
     20 	[0x7] = {PCIE1, PCIE1, PCIE1, PCIE1, PCIE2, PCIE2, PCIE3, PCIE3},
     21 	[0xb] = {PCIE1, PCIE1, PCIE1, PCIE1, SRIO1, SRIO1, SRIO1, SRIO1},
     22 	[0xc] = {PCIE1, PCIE1, PCIE1, PCIE1, SRIO1, SRIO1, SRIO1, SRIO1},
     23 	[0xd] = {NONE, NONE, NONE, NONE, SRIO1, SRIO1, SRIO1, SRIO1},
     24 	[0xe] = {NONE, NONE, NONE, NONE, SRIO1, SRIO1, SRIO1, SRIO1},
     25 	[0xf] = {PCIE1, PCIE1, PCIE1, PCIE1, PCIE1, PCIE1, PCIE1, PCIE1},
     26 };
     27 
     28 int is_serdes_configured(enum srds_prtcl prtcl)
     29 {
     30 	if (!(serdes1_prtcl_map & (1 << NONE)))
     31 		fsl_serdes_init();
     32 
     33 	return (1 << prtcl) & serdes1_prtcl_map;
     34 }
     35 
     36 void fsl_serdes_init(void)
     37 {
     38 	ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
     39 	u32 pordevsr = in_be32(&gur->pordevsr);
     40 	u32 srds_cfg = (pordevsr & MPC85xx_PORDEVSR_IO_SEL) >>
     41 				MPC85xx_PORDEVSR_IO_SEL_SHIFT;
     42 	int lane;
     43 
     44 	if (serdes1_prtcl_map & (1 << NONE))
     45 		return;
     46 
     47 	debug("PORDEVSR[IO_SEL_SRDS] = %x\n", srds_cfg);
     48 
     49 	if (srds_cfg >= ARRAY_SIZE(serdes1_cfg_tbl)) {
     50 		printf("Invalid PORDEVSR[IO_SEL_SRDS] = %d\n", srds_cfg);
     51 		return;
     52 	}
     53 
     54 	for (lane = 0; lane < SRDS1_MAX_LANES; lane++) {
     55 		enum srds_prtcl lane_prtcl = serdes1_cfg_tbl[srds_cfg][lane];
     56 		serdes1_prtcl_map |= (1 << lane_prtcl);
     57 	}
     58 
     59 	if (!(pordevsr & MPC85xx_PORDEVSR_SGMII1_DIS))
     60 		serdes1_prtcl_map |= (1 << SGMII_TSEC1);
     61 
     62 	if (!(pordevsr & MPC85xx_PORDEVSR_SGMII2_DIS))
     63 		serdes1_prtcl_map |= (1 << SGMII_TSEC2);
     64 
     65 	if (!(pordevsr & MPC85xx_PORDEVSR_SGMII3_DIS))
     66 		serdes1_prtcl_map |= (1 << SGMII_TSEC3);
     67 
     68 	if (!(pordevsr & MPC85xx_PORDEVSR_SGMII4_DIS))
     69 		serdes1_prtcl_map |= (1 << SGMII_TSEC4);
     70 
     71 	/* Set the first bit to indicate serdes has been initialized */
     72 	serdes1_prtcl_map |= (1 << NONE);
     73 }
     74