1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * Copyright 2010-2011 Freescale Semiconductor, Inc. 4 * Author: Roy Zang <tie-fei.zang (at) freescale.com> 5 */ 6 7 #include <config.h> 8 #include <common.h> 9 #include <asm/io.h> 10 #include <asm/immap_85xx.h> 11 #include <asm/fsl_serdes.h> 12 13 #define SRDS1_MAX_LANES 4 14 15 static u32 serdes1_prtcl_map; 16 17 static const u8 serdes1_cfg_tbl[][SRDS1_MAX_LANES] = { 18 [0x00] = {PCIE1, PCIE2, NONE, NONE}, 19 [0x01] = {PCIE1, PCIE2, PCIE3, NONE}, 20 [0x02] = {PCIE1, PCIE2, PCIE3, SGMII_FM1_DTSEC2}, 21 [0x03] = {PCIE1, PCIE2, SGMII_FM1_DTSEC1, SGMII_FM1_DTSEC2}, 22 }; 23 24 int is_serdes_configured(enum srds_prtcl device) 25 { 26 int ret; 27 28 if (!(serdes1_prtcl_map & (1 << NONE))) 29 fsl_serdes_init(); 30 31 ret = (1 << device) & serdes1_prtcl_map; 32 return ret; 33 } 34 35 void fsl_serdes_init(void) 36 { 37 ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR; 38 u32 pordevsr = in_be32(&gur->pordevsr); 39 u32 srds_cfg = (pordevsr & MPC85xx_PORDEVSR_IO_SEL) >> 40 MPC85xx_PORDEVSR_IO_SEL_SHIFT; 41 int lane; 42 43 if (serdes1_prtcl_map & (1 << NONE)) 44 return; 45 46 debug("PORDEVSR[IO_SEL_SRDS] = %x\n", srds_cfg); 47 48 if (srds_cfg >= ARRAY_SIZE(serdes1_cfg_tbl)) { 49 printf("Invalid PORDEVSR[IO_SEL_SRDS] = %d\n", srds_cfg); 50 return; 51 } 52 for (lane = 0; lane < SRDS1_MAX_LANES; lane++) { 53 enum srds_prtcl lane_prtcl = serdes1_cfg_tbl[srds_cfg][lane]; 54 serdes1_prtcl_map |= (1 << lane_prtcl); 55 } 56 57 /* Set the first bit to indicate serdes has been initialized */ 58 serdes1_prtcl_map |= (1 << NONE); 59 } 60
