1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * Copyright (C) 2015, Bin Meng <bmeng.cn (a] gmail.com> 4 */ 5 6 /dts-v1/; 7 8 #include <dt-bindings/interrupt-router/intel-irq.h> 9 10 /* ICH9 IRQ router has discrete PIRQ control registers */ 11 #undef PIRQE 12 #undef PIRQF 13 #undef PIRQG 14 #undef PIRQH 15 #define PIRQE 8 16 #define PIRQF 9 17 #define PIRQG 10 18 #define PIRQH 11 19 20 /include/ "skeleton.dtsi" 21 /include/ "serial.dtsi" 22 /include/ "keyboard.dtsi" 23 /include/ "rtc.dtsi" 24 /include/ "tsc_timer.dtsi" 25 26 / { 27 model = "QEMU x86 (Q35)"; 28 compatible = "qemu,x86"; 29 30 config { 31 silent_console = <0>; 32 u-boot,no-apm-finalize; 33 }; 34 35 chosen { 36 stdout-path = "/serial"; 37 }; 38 39 cpus { 40 #address-cells = <1>; 41 #size-cells = <0>; 42 u-boot,dm-pre-reloc; 43 44 cpu@0 { 45 device_type = "cpu"; 46 compatible = "cpu-qemu"; 47 u-boot,dm-pre-reloc; 48 reg = <0>; 49 intel,apic-id = <0>; 50 }; 51 }; 52 53 tsc-timer { 54 clock-frequency = <1000000000>; 55 }; 56 57 pci { 58 compatible = "pci-x86"; 59 #address-cells = <3>; 60 #size-cells = <2>; 61 u-boot,dm-pre-reloc; 62 ranges = <0x02000000 0x0 0xc0000000 0xc0000000 0 0x10000000 63 0x42000000 0x0 0xd0000000 0xd0000000 0 0x10000000 64 0x01000000 0x0 0x2000 0x2000 0 0xe000>; 65 66 pch@1f,0 { 67 reg = <0x0000f800 0 0 0 0>; 68 compatible = "intel,pch9"; 69 u-boot,dm-pre-reloc; 70 71 irq-router { 72 compatible = "intel,irq-router"; 73 u-boot,dm-pre-reloc; 74 intel,pirq-config = "pci"; 75 intel,actl-8bit; 76 intel,actl-addr = <0x44>; 77 intel,pirq-link = <0x60 8>; 78 intel,pirq-mask = <0x0e40>; 79 intel,pirq-routing = < 80 /* e1000 NIC */ 81 PCI_BDF(0, 2, 0) INTA PIRQG 82 /* ICH9 UHCI */ 83 PCI_BDF(0, 29, 0) INTA PIRQA 84 PCI_BDF(0, 29, 1) INTB PIRQB 85 PCI_BDF(0, 29, 2) INTC PIRQC 86 /* ICH9 EHCI */ 87 PCI_BDF(0, 29, 7) INTD PIRQD 88 /* ICH9 SATA */ 89 PCI_BDF(0, 31, 2) INTA PIRQA 90 >; 91 }; 92 }; 93 }; 94 95 }; 96
