1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * Copyright (C) 2011 Freescale Semiconductor, Inc. 4 * Jason Liu <r64343 (at) freescale.com> 5 * 6 * Refer doc/README.imximage for more details about how-to configure 7 * and create imximage boot image 8 * 9 * The syntax is taken as close as possible with the kwbimage 10 */ 11 12 /* image version */ 13 IMAGE_VERSION 2 14 15 /* 16 * Boot Device : one of 17 * spi, sd (the board has no nand neither onenand) 18 */ 19 BOOT_FROM sd 20 21 /* 22 * Device Configuration Data (DCD) 23 * 24 * Each entry must have the format: 25 * Addr-type Address Value 26 * 27 * where: 28 * Addr-type register length (1,2 or 4 bytes) 29 * Address absolute address of the register 30 * value value to be stored in the register 31 */ 32 DATA 4 0x020e05a8 0x00000030 33 DATA 4 0x020e05b0 0x00000030 34 DATA 4 0x020e0524 0x00000030 35 DATA 4 0x020e051c 0x00000030 36 37 DATA 4 0x020e0518 0x00000030 38 DATA 4 0x020e050c 0x00000030 39 DATA 4 0x020e05b8 0x00000030 40 DATA 4 0x020e05c0 0x00000030 41 42 DATA 4 0x020e05ac 0x00020030 43 DATA 4 0x020e05b4 0x00020030 44 DATA 4 0x020e0528 0x00020030 45 DATA 4 0x020e0520 0x00020030 46 47 DATA 4 0x020e0514 0x00020030 48 DATA 4 0x020e0510 0x00020030 49 DATA 4 0x020e05bc 0x00020030 50 DATA 4 0x020e05c4 0x00020030 51 52 DATA 4 0x020e056c 0x00020030 53 DATA 4 0x020e0578 0x00020030 54 DATA 4 0x020e0588 0x00020030 55 DATA 4 0x020e0594 0x00020030 56 57 DATA 4 0x020e057c 0x00020030 58 DATA 4 0x020e0590 0x00003000 59 DATA 4 0x020e0598 0x00003000 60 DATA 4 0x020e058c 0x00000000 61 62 DATA 4 0x020e059c 0x00003030 63 DATA 4 0x020e05a0 0x00003030 64 DATA 4 0x020e0784 0x00000030 65 DATA 4 0x020e0788 0x00000030 66 67 DATA 4 0x020e0794 0x00000030 68 DATA 4 0x020e079c 0x00000030 69 DATA 4 0x020e07a0 0x00000030 70 DATA 4 0x020e07a4 0x00000030 71 72 DATA 4 0x020e07a8 0x00000030 73 DATA 4 0x020e0748 0x00000030 74 DATA 4 0x020e074c 0x00000030 75 DATA 4 0x020e0750 0x00020000 76 77 DATA 4 0x020e0758 0x00000000 78 DATA 4 0x020e0774 0x00020000 79 DATA 4 0x020e078c 0x00000030 80 DATA 4 0x020e0798 0x000C0000 81 82 DATA 4 0x021b081c 0x33333333 83 DATA 4 0x021b0820 0x33333333 84 DATA 4 0x021b0824 0x33333333 85 DATA 4 0x021b0828 0x33333333 86 87 DATA 4 0x021b481c 0x33333333 88 DATA 4 0x021b4820 0x33333333 89 DATA 4 0x021b4824 0x33333333 90 DATA 4 0x021b4828 0x33333333 91 92 DATA 4 0x021b0018 0x00081740 93 94 DATA 4 0x021b001c 0x00008000 95 DATA 4 0x021b000c 0x555A7974 96 DATA 4 0x021b0010 0xDB538F64 97 DATA 4 0x021b0014 0x01FF00DB 98 DATA 4 0x021b002c 0x000026D2 99 100 DATA 4 0x021b0030 0x005A1023 101 DATA 4 0x021b0008 0x09444040 102 DATA 4 0x021b0004 0x00025576 103 DATA 4 0x021b0040 0x00000027 104 DATA 4 0x021b0000 0x831A0000 105 106 DATA 4 0x021b001c 0x04088032 107 DATA 4 0x021b001c 0x0408803A 108 DATA 4 0x021b001c 0x00008033 109 DATA 4 0x021b001c 0x0000803B 110 DATA 4 0x021b001c 0x00428031 111 DATA 4 0x021b001c 0x00428039 112 DATA 4 0x021b001c 0x19308030 113 DATA 4 0x021b001c 0x19308038 114 115 DATA 4 0x021b001c 0x04008040 116 DATA 4 0x021b001c 0x04008048 117 DATA 4 0x021b0800 0xA1380003 118 DATA 4 0x021b4800 0xA1380003 119 DATA 4 0x021b0020 0x00005800 120 DATA 4 0x021b0818 0x00022227 121 DATA 4 0x021b4818 0x00022227 122 123 DATA 4 0x021b083c 0x434B0350 124 DATA 4 0x021b0840 0x034C0359 125 DATA 4 0x021b483c 0x434B0350 126 DATA 4 0x021b4840 0x03650348 127 DATA 4 0x021b0848 0x4436383B 128 DATA 4 0x021b4848 0x39393341 129 DATA 4 0x021b0850 0x35373933 130 DATA 4 0x021b4850 0x48254A36 131 132 DATA 4 0x021b080c 0x001F001F 133 DATA 4 0x021b0810 0x001F001F 134 135 DATA 4 0x021b480c 0x00440044 136 DATA 4 0x021b4810 0x00440044 137 138 DATA 4 0x021b08b8 0x00000800 139 DATA 4 0x021b48b8 0x00000800 140 141 DATA 4 0x021b001c 0x00000000 142 DATA 4 0x021b0404 0x00011006 143 144 145 /* 146 * Setup CCM_CCOSR register as follows: 147 * 148 * cko1_en = 1 --> CKO1 enabled 149 * cko1_div = 111 --> divide by 8 150 * cko1_sel = 1011 --> ahb_clk_root 151 * 152 * This sets CKO1 at ahb_clk_root/8 = 132/8 = 16.5 MHz 153 */ 154 DATA 4 0x020c4060 0x000000fb 155
