1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * Copyright (C) 2011 Renesas Solutions Corp. 4 * Copyright (C) 2011 Nobuhiro Iwamatsu <nobuhiro.Iwamatsu.yj (at) renesas.com> 5 * 6 * board/renesas/ecovec/lowlevel_init.S 7 */ 8 9 #include <config.h> 10 #include <asm/processor.h> 11 #include <asm/macro.h> 12 #include <configs/ecovec.h> 13 14 .global lowlevel_init 15 16 .text 17 .align 2 18 19 lowlevel_init: 20 21 /* jump to CONFIG_ECOVEC_ROMIMAGE_ADDR if bit 1 of PVDR_A */ 22 mov.l PVDR_A, r1 23 mov.l PVDR_D, r2 24 mov.b @r1, r0 25 tst r0, r2 26 bt 1f 27 mov.l JUMP_A, r1 28 jmp @r1 29 nop 30 31 1: 32 /* Disable watchdog */ 33 write16 RWTCSR_A, RWTCSR_D 34 35 /* MMU Disable */ 36 write32 MMUCR_A, MMUCR_D 37 38 /* Setup clocks */ 39 write32 PLLCR_A, PLLCR_D 40 write32 FRQCRA_A, FRQCRA_D 41 write32 FRQCRB_A, FRQCRB_D 42 43 wait_timer TIMER_D 44 45 write32 MMSELR_A, MMSELR_D 46 47 /* Srtup BSC */ 48 write32 CMNCR_A, CMNCR_D 49 write32 CS0BCR_A, CS0BCR_D 50 write32 CS0WCR_A, CS0WCR_D 51 52 wait_timer TIMER_D 53 54 /* Setup SDRAM */ 55 write32 DBPDCNT0_A, DBPDCNT0_D0 56 write32 DBCONF_A, DBCONF_D 57 write32 DBTR0_A, DBTR0_D 58 write32 DBTR1_A, DBTR1_D 59 write32 DBTR2_A, DBTR2_D 60 write32 DBTR3_A, DBTR3_D 61 write32 DBKIND_A, DBKIND_D 62 write32 DBCKECNT_A, DBCKECNT_D 63 64 wait_timer TIMER_D 65 66 write32 DBCMDCNT_A, DBCMDCNT_D0 67 write32 DBMRCNT_A, DBMRCNT_D0 68 write32 DBMRCNT_A, DBMRCNT_D1 69 write32 DBMRCNT_A, DBMRCNT_D2 70 write32 DBMRCNT_A, DBMRCNT_D3 71 write32 DBCMDCNT_A, DBCMDCNT_D0 72 write32 DBCMDCNT_A, DBCMDCNT_D1 73 write32 DBCMDCNT_A, DBCMDCNT_D1 74 write32 DBMRCNT_A, DBMRCNT_D4 75 write32 DBMRCNT_A, DBMRCNT_D5 76 write32 DBMRCNT_A, DBMRCNT_D6 77 78 wait_timer TIMER_D 79 80 write32 DBEN_A, DBEN_D 81 write32 DBRFPDN1_A, DBRFPDN1_D 82 write32 DBRFPDN2_A, DBRFPDN2_D 83 write32 DBCMDCNT_A, DBCMDCNT_D0 84 85 86 /* Dummy read */ 87 mov.l DUMMY_A ,r1 88 synco 89 mov.l @r1, r0 90 synco 91 92 mov.l SDRAM_A ,r1 93 synco 94 mov.l @r1, r0 95 synco 96 wait_timer TIMER_D 97 98 add #4, r1 99 synco 100 mov.l @r1, r0 101 synco 102 wait_timer TIMER_D 103 104 add #4, r1 105 synco 106 mov.l @r1, r0 107 synco 108 wait_timer TIMER_D 109 110 add #4, r1 111 synco 112 mov.l @r1, r0 113 synco 114 wait_timer TIMER_D 115 116 write32 DBCMDCNT_A, DBCMDCNT_D0 117 write32 DBCMDCNT_A, DBCMDCNT_D1 118 write32 DBPDCNT0_A, DBPDCNT0_D1 119 write32 DBRFPDN0_A, DBRFPDN0_D 120 121 wait_timer TIMER_D 122 123 write32 CCR_A, CCR_D 124 125 stc sr, r0 126 mov.l SR_MASK_D, r1 127 and r1, r0 128 ldc r0, sr 129 130 rts 131 132 .align 2 133 134 PVDR_A: .long PVDR 135 PVDR_D: .long 0x00000001 136 JUMP_A: .long CONFIG_ECOVEC_ROMIMAGE_ADDR 137 TIMER_D: .long 64 138 RWTCSR_A: .long RWTCSR 139 RWTCSR_D: .long 0x0000A507 140 MMUCR_A: .long MMUCR 141 MMUCR_D: .long 0x00000004 142 PLLCR_A: .long PLLCR 143 PLLCR_D: .long 0x00004000 144 FRQCRA_A: .long FRQCRA 145 FRQCRA_D: .long 0x8E003508 146 FRQCRB_A: .long FRQCRB 147 FRQCRB_D: .long 0x0 148 MMSELR_A: .long MMSELR 149 MMSELR_D: .long 0xA5A50000 150 CMNCR_A: .long CMNCR 151 CMNCR_D: .long 0x00000013 152 CS0BCR_A: .long CS0BCR 153 CS0BCR_D: .long 0x11110400 154 CS0WCR_A: .long CS0WCR 155 CS0WCR_D: .long 0x00000440 156 DBPDCNT0_A: .long DBPDCNT0 157 DBPDCNT0_D0: .long 0x00000181 158 DBPDCNT0_D1: .long 0x00000080 159 DBCONF_A: .long DBCONF 160 DBCONF_D: .long 0x015B0002 161 DBTR0_A: .long DBTR0 162 DBTR0_D: .long 0x03061502 163 DBTR1_A: .long DBTR1 164 DBTR1_D: .long 0x02020102 165 DBTR2_A: .long DBTR2 166 DBTR2_D: .long 0x01090305 167 DBTR3_A: .long DBTR3 168 DBTR3_D: .long 0x00000002 169 DBKIND_A: .long DBKIND 170 DBKIND_D: .long 0x00000005 171 DBCKECNT_A: .long DBCKECNT 172 DBCKECNT_D: .long 0x00000001 173 DBCMDCNT_A: .long DBCMDCNT 174 DBCMDCNT_D0:.long 0x2 175 DBCMDCNT_D1:.long 0x4 176 DBMRCNT_A: .long DBMRCNT 177 DBMRCNT_D0: .long 0x00020000 178 DBMRCNT_D1: .long 0x00030000 179 DBMRCNT_D2: .long 0x00010040 180 DBMRCNT_D3: .long 0x00000532 181 DBMRCNT_D4: .long 0x00000432 182 DBMRCNT_D5: .long 0x000103C0 183 DBMRCNT_D6: .long 0x00010040 184 DBEN_A: .long DBEN 185 DBEN_D: .long 0x01 186 DBRFPDN0_A: .long DBRFPDN0 187 DBRFPDN1_A: .long DBRFPDN1 188 DBRFPDN2_A: .long DBRFPDN2 189 DBRFPDN0_D: .long 0x00010000 190 DBRFPDN1_D: .long 0x00000613 191 DBRFPDN2_D: .long 0x238C003A 192 SDRAM_A: .long 0xa8000000 193 DUMMY_A: .long 0x0c400000 194 CCR_A: .long CCR 195 CCR_D: .long 0x0000090B 196 SR_MASK_D: .long 0xEFFFFF0F 197
