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      1 // SPDX-License-Identifier: GPL-2.0+
      2 /*
      3  * evm.c
      4  *
      5  * Board functions for TI814x EVM
      6  *
      7  * Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/
      8  */
      9 
     10 #include <common.h>
     11 #include <cpsw.h>
     12 #include <environment.h>
     13 #include <errno.h>
     14 #include <spl.h>
     15 #include <asm/arch/cpu.h>
     16 #include <asm/arch/hardware.h>
     17 #include <asm/arch/omap.h>
     18 #include <asm/arch/ddr_defs.h>
     19 #include <asm/arch/clock.h>
     20 #include <asm/arch/gpio.h>
     21 #include <asm/arch/mmc_host_def.h>
     22 #include <asm/arch/sys_proto.h>
     23 #include <asm/io.h>
     24 #include <asm/emif.h>
     25 #include <asm/gpio.h>
     26 #include "evm.h"
     27 
     28 DECLARE_GLOBAL_DATA_PTR;
     29 
     30 static struct ctrl_dev *cdev = (struct ctrl_dev *)CTRL_DEVICE_BASE;
     31 
     32 /* UART Defines */
     33 #ifdef CONFIG_SPL_BUILD
     34 static const struct cmd_control evm_ddr2_cctrl_data = {
     35 	.cmd0csratio	= 0x80,
     36 	.cmd0iclkout	= 0x00,
     37 
     38 	.cmd1csratio	= 0x80,
     39 	.cmd1iclkout	= 0x00,
     40 
     41 	.cmd2csratio	= 0x80,
     42 	.cmd2iclkout	= 0x00,
     43 };
     44 
     45 static const struct emif_regs evm_ddr2_emif0_regs = {
     46 	.sdram_config			= 0x40801ab2,
     47 	.ref_ctrl			= 0x10000c30,
     48 	.sdram_tim1			= 0x0aaaf552,
     49 	.sdram_tim2			= 0x043631d2,
     50 	.sdram_tim3			= 0x00000327,
     51 	.emif_ddr_phy_ctlr_1		= 0x00000007
     52 };
     53 
     54 static const struct emif_regs evm_ddr2_emif1_regs = {
     55 	.sdram_config			= 0x40801ab2,
     56 	.ref_ctrl			= 0x10000c30,
     57 	.sdram_tim1			= 0x0aaaf552,
     58 	.sdram_tim2			= 0x043631d2,
     59 	.sdram_tim3			= 0x00000327,
     60 	.emif_ddr_phy_ctlr_1		= 0x00000007
     61 };
     62 
     63 const struct dmm_lisa_map_regs evm_lisa_map_regs = {
     64 	.dmm_lisa_map_0			= 0x00000000,
     65 	.dmm_lisa_map_1			= 0x00000000,
     66 	.dmm_lisa_map_2			= 0x806c0300,
     67 	.dmm_lisa_map_3			= 0x806c0300,
     68 };
     69 
     70 static const struct ddr_data evm_ddr2_data = {
     71 	.datardsratio0		= ((0x35<<10) | (0x35<<0)),
     72 	.datawdsratio0		= ((0x20<<10) | (0x20<<0)),
     73 	.datawiratio0		= ((0<<10) | (0<<0)),
     74 	.datagiratio0		= ((0<<10) | (0<<0)),
     75 	.datafwsratio0		= ((0x90<<10) | (0x90<<0)),
     76 	.datawrsratio0		= ((0x50<<10) | (0x50<<0)),
     77 };
     78 
     79 void set_uart_mux_conf(void)
     80 {
     81 	/* Set UART pins */
     82 	enable_uart0_pin_mux();
     83 }
     84 
     85 void set_mux_conf_regs(void)
     86 {
     87 	/* Set MMC pins */
     88 	enable_mmc1_pin_mux();
     89 
     90 	/* Set Ethernet pins */
     91 	enable_enet_pin_mux();
     92 }
     93 
     94 void sdram_init(void)
     95 {
     96 	config_dmm(&evm_lisa_map_regs);
     97 
     98 	config_ddr(0, NULL, &evm_ddr2_data, &evm_ddr2_cctrl_data,
     99 		   &evm_ddr2_emif0_regs, 0);
    100 	config_ddr(0, NULL, &evm_ddr2_data, &evm_ddr2_cctrl_data,
    101 		   &evm_ddr2_emif1_regs, 1);
    102 }
    103 #endif
    104 
    105 /*
    106  * Basic board specific setup.  Pinmux has been handled already.
    107  */
    108 int board_init(void)
    109 {
    110 	gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
    111 	return 0;
    112 }
    113 
    114 #if defined(CONFIG_MMC)
    115 int board_mmc_init(bd_t *bis)
    116 {
    117 	omap_mmc_init(1, 0, 0, -1, -1);
    118 
    119 	return 0;
    120 }
    121 #endif
    122 
    123 #ifdef CONFIG_DRIVER_TI_CPSW
    124 static void cpsw_control(int enabled)
    125 {
    126 	/* VTP can be added here */
    127 
    128 	return;
    129 }
    130 
    131 static struct cpsw_slave_data cpsw_slaves[] = {
    132 	{
    133 		.slave_reg_ofs	= 0x50,
    134 		.sliver_reg_ofs	= 0x700,
    135 		.phy_addr	= 1,
    136 	},
    137 	{
    138 		.slave_reg_ofs	= 0x90,
    139 		.sliver_reg_ofs	= 0x740,
    140 		.phy_addr	= 0,
    141 	},
    142 };
    143 
    144 static struct cpsw_platform_data cpsw_data = {
    145 	.mdio_base		= CPSW_MDIO_BASE,
    146 	.cpsw_base		= CPSW_BASE,
    147 	.mdio_div		= 0xff,
    148 	.channels		= 8,
    149 	.cpdma_reg_ofs		= 0x100,
    150 	.slaves			= 1,
    151 	.slave_data		= cpsw_slaves,
    152 	.ale_reg_ofs		= 0x600,
    153 	.ale_entries		= 1024,
    154 	.host_port_reg_ofs	= 0x28,
    155 	.hw_stats_reg_ofs	= 0x400,
    156 	.bd_ram_ofs		= 0x2000,
    157 	.mac_control		= (1 << 5),
    158 	.control		= cpsw_control,
    159 	.host_port_num		= 0,
    160 	.version		= CPSW_CTRL_VERSION_1,
    161 };
    162 #endif
    163 
    164 int board_eth_init(bd_t *bis)
    165 {
    166 	uint8_t mac_addr[6];
    167 	uint32_t mac_hi, mac_lo;
    168 
    169 	if (!eth_env_get_enetaddr("ethaddr", mac_addr)) {
    170 		printf("<ethaddr> not set. Reading from E-fuse\n");
    171 		/* try reading mac address from efuse */
    172 		mac_lo = readl(&cdev->macid0l);
    173 		mac_hi = readl(&cdev->macid0h);
    174 		mac_addr[0] = mac_hi & 0xFF;
    175 		mac_addr[1] = (mac_hi & 0xFF00) >> 8;
    176 		mac_addr[2] = (mac_hi & 0xFF0000) >> 16;
    177 		mac_addr[3] = (mac_hi & 0xFF000000) >> 24;
    178 		mac_addr[4] = mac_lo & 0xFF;
    179 		mac_addr[5] = (mac_lo & 0xFF00) >> 8;
    180 
    181 		if (is_valid_ethaddr(mac_addr))
    182 			eth_env_set_enetaddr("ethaddr", mac_addr);
    183 		else
    184 			printf("Unable to read MAC address. Set <ethaddr>\n");
    185 	}
    186 
    187 	return cpsw_register(&cpsw_data);
    188 }
    189