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      1 // SPDX-License-Identifier: GPL-2.0+
      2 /*
      3  * Embest/Timll DevKit3250 board support
      4  *
      5  * Copyright (C) 2011-2015 Vladimir Zapolskiy <vz (at) mleia.com>
      6  */
      7 
      8 #include <common.h>
      9 #include <asm/arch/sys_proto.h>
     10 #include <asm/arch/clk.h>
     11 #include <asm/arch/cpu.h>
     12 #include <asm/arch/emc.h>
     13 #include <asm/arch/wdt.h>
     14 #include <asm/io.h>
     15 
     16 DECLARE_GLOBAL_DATA_PTR;
     17 
     18 static struct emc_regs *emc = (struct emc_regs *)EMC_BASE;
     19 static struct clk_pm_regs *clk = (struct clk_pm_regs *)CLK_PM_BASE;
     20 static struct wdt_regs *wdt = (struct wdt_regs *)WDT_BASE;
     21 
     22 void reset_periph(void)
     23 {
     24 	/* This function resets peripherals by triggering RESOUT_N */
     25 	setbits_le32(&clk->timclk_ctrl, CLK_TIMCLK_WATCHDOG);
     26 	writel(WDTIM_MCTRL_RESFRC1, &wdt->mctrl);
     27 	udelay(300);
     28 
     29 	writel(0, &wdt->mctrl);
     30 	clrbits_le32(&clk->timclk_ctrl, CLK_TIMCLK_WATCHDOG);
     31 
     32 	/* Such a long delay is needed to initialize SMSC phy */
     33 	udelay(10000);
     34 }
     35 
     36 int board_early_init_f(void)
     37 {
     38 	lpc32xx_uart_init(CONFIG_SYS_LPC32XX_UART);
     39 	lpc32xx_i2c_init(1);
     40 	lpc32xx_i2c_init(2);
     41 	lpc32xx_ssp_init();
     42 	lpc32xx_mac_init();
     43 
     44 	/*
     45 	 * nWP may be controlled by GPO19, but unpopulated by default R23
     46 	 * makes no sense to configure this GPIO level, nWP is always high
     47 	 */
     48 	lpc32xx_slc_nand_init();
     49 
     50 	return 0;
     51 }
     52 
     53 int board_init(void)
     54 {
     55 	/* adress of boot parameters */
     56 	gd->bd->bi_boot_params  = CONFIG_SYS_SDRAM_BASE + 0x100;
     57 
     58 #ifdef CONFIG_SYS_FLASH_CFI
     59 	/* Use 16-bit memory interface for NOR Flash */
     60 	emc->stat[0].config	= EMC_STAT_CONFIG_PB | EMC_STAT_CONFIG_16BIT;
     61 
     62 	/* Change the NOR timings to optimum value to get maximum bandwidth */
     63 	emc->stat[0].waitwen	= EMC_STAT_WAITWEN(1);
     64 	emc->stat[0].waitoen	= EMC_STAT_WAITOEN(0);
     65 	emc->stat[0].waitrd	= EMC_STAT_WAITRD(12);
     66 	emc->stat[0].waitpage	= EMC_STAT_WAITPAGE(12);
     67 	emc->stat[0].waitwr	= EMC_STAT_WAITWR(5);
     68 	emc->stat[0].waitturn	= EMC_STAT_WAITTURN(2);
     69 #endif
     70 
     71 	return 0;
     72 }
     73 
     74 int dram_init(void)
     75 {
     76 	gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE,
     77 				    CONFIG_SYS_SDRAM_SIZE);
     78 
     79 	return 0;
     80 }
     81