1 Intel x86 PINCTRL/GPIO controller 2 3 Pin-muxing on x86 can be described with a node for the PINCTRL master 4 node and a set of child nodes for each pin on the SoC. 5 6 The PINCTRL master node requires the following properties: 7 - compatible : "intel,x86-pinctrl" 8 9 Pin nodes must be children of the pinctrl master node and can 10 contain the following properties: 11 - pad-offset - (required) offset in the IOBASE for the pin to configure 12 - gpio-offset - (required only when 'mode-gpio' is set) 2 cells 13 - offset in the GPIOBASE for the pin to configure 14 - the bit shift in this register (4 = bit 4) 15 - mode-gpio - (optional) standalone property to force the pin into GPIO mode 16 - mode-func - (optional) function number to assign to the pin. If 17 'mode-gpio' is set, this property will be ignored. 18 in case of 'mode-gpio' property set: 19 - output-value - (optional) this set the default output value of the GPIO 20 - direction - (optional) this set the direction of the gpio 21 - pull-strength - (optional) this set the pull strength of the pin 22 - pull-assign - (optional) this set the pull assignement (up/down) of the pin 23 - invert - (optional) this input pin is inverted 24 25 Example: 26 27 pin_usb_host_en0@0 { 28 gpio-offset = <0x80 8>; 29 pad-offset = <0x260>; 30 mode-gpio; 31 output-value = <1>; 32 direction = <PIN_OUTPUT>; 33 }; 34
