1 CFI or JEDEC memory-mapped NOR flash, MTD-RAM (NVRAM...) 2 3 Flash chips (Memory Technology Devices) are often used for solid state 4 file systems on embedded devices. 5 6 - compatible : should contain the specific model of mtd chip(s) 7 used, if known, followed by either "cfi-flash", "jedec-flash", 8 "mtd-ram" or "mtd-rom". 9 - reg : Address range(s) of the mtd chip(s) 10 It's possible to (optionally) define multiple "reg" tuples so that 11 non-identical chips can be described in one node. 12 - bank-width : Width (in bytes) of the bank. Equal to the 13 device width times the number of interleaved chips. 14 - device-width : (optional) Width of a single mtd chip. If 15 omitted, assumed to be equal to 'bank-width'. 16 - #address-cells, #size-cells : Must be present if the device has 17 sub-nodes representing partitions (see below). In this case 18 both #address-cells and #size-cells must be equal to 1. 19 - no-unaligned-direct-access: boolean to disable the default direct 20 mapping of the flash. 21 On some platforms (e.g. MPC5200) a direct 1:1 mapping may cause 22 problems with JFFS2 usage, as the local bus (LPB) doesn't support 23 unaligned accesses as implemented in the JFFS2 code via memcpy(). 24 By defining "no-unaligned-direct-access", the flash will not be 25 exposed directly to the MTD users (e.g. JFFS2) any more. 26 - linux,mtd-name: allow to specify the mtd name for retro capability with 27 physmap-flash drivers as boot loader pass the mtd partition via the old 28 device name physmap-flash. 29 - use-advanced-sector-protection: boolean to enable support for the 30 advanced sector protection (Spansion: PPB - Persistent Protection 31 Bits) locking. 32 33 For JEDEC compatible devices, the following additional properties 34 are defined: 35 36 - vendor-id : Contains the flash chip's vendor id (1 byte). 37 - device-id : Contains the flash chip's device id (1 byte). 38 39 For ROM compatible devices (and ROM fallback from cfi-flash), the following 40 additional (optional) property is defined: 41 42 - erase-size : The chip's physical erase block size in bytes. 43 44 The device tree may optionally contain sub-nodes describing partitions of the 45 address space. See partition.txt for more detail. 46 47 Example: 48 49 flash@ff000000 { 50 compatible = "amd,am29lv128ml", "cfi-flash"; 51 reg = <ff000000 01000000>; 52 bank-width = <4>; 53 device-width = <1>; 54 #address-cells = <1>; 55 #size-cells = <1>; 56 fs@0 { 57 label = "fs"; 58 reg = <0 f80000>; 59 }; 60 firmware@f80000 { 61 label ="firmware"; 62 reg = <f80000 80000>; 63 read-only; 64 }; 65 }; 66 67 Here an example with multiple "reg" tuples: 68 69 flash@f0000000,0 { 70 #address-cells = <1>; 71 #size-cells = <1>; 72 compatible = "intel,pc48f4400p0vb", "cfi-flash"; 73 reg = <0 0x00000000 0x02000000 74 0 0x02000000 0x02000000>; 75 bank-width = <2>; 76 partition@0 { 77 label = "test-part1"; 78 reg = <0 0x04000000>; 79 }; 80 }; 81 82 An example using SRAM: 83 84 sram@2,0 { 85 compatible = "samsung,k6f1616u6a", "mtd-ram"; 86 reg = <2 0 0x00200000>; 87 bank-width = <2>; 88 }; 89
