1 config SYS_FSL_DDR 2 bool 3 help 4 Select Freescale General DDR driver, shared between most Freescale 5 PowerPC- based SoCs (such as mpc83xx, mpc85xx, mpc86xx) and ARM- 6 based Layerscape SoCs (such as ls2080a). 7 8 config SYS_FSL_MMDC 9 bool 10 help 11 Select Freescale Multi Mode DDR controller (MMDC). 12 13 config SYS_FSL_DDR_BE 14 bool 15 help 16 Access DDR registers in big-endian 17 18 config SYS_FSL_DDR_LE 19 bool 20 help 21 Access DDR registers in little-endian 22 23 menu "Freescale DDR controllers" 24 depends on SYS_FSL_DDR 25 26 config SYS_NUM_DDR_CTLRS 27 int "Maximum DDR controllers" 28 default 3 if ARCH_LS2080A || \ 29 ARCH_T4240 30 default 2 if ARCH_B4860 || \ 31 ARCH_BSC9132 || \ 32 ARCH_MPC8572 || \ 33 ARCH_MPC8641 || \ 34 ARCH_P4080 || \ 35 ARCH_P5020 || \ 36 ARCH_P5040 || \ 37 ARCH_T4160 38 default 1 39 40 config SYS_FSL_DDR_VER 41 int 42 default 50 if SYS_FSL_DDR_VER_50 43 default 47 if SYS_FSL_DDR_VER_47 44 default 46 if SYS_FSL_DDR_VER_46 45 default 44 if SYS_FSL_DDR_VER_44 46 47 config SYS_FSL_DDR_VER_50 48 bool 49 50 config SYS_FSL_DDR_VER_47 51 bool 52 53 config SYS_FSL_DDR_VER_46 54 bool 55 56 config SYS_FSL_DDR_VER_44 57 bool 58 59 config SYS_FSL_DDRC_GEN1 60 bool 61 help 62 Enable Freescale DDR controller. 63 64 config SYS_FSL_DDRC_GEN2 65 bool 66 depends on !MPC86xx 67 help 68 Enable Freescale DDR2 controller. 69 70 config SYS_FSL_DDRC_86XX_GEN2 71 bool 72 depends on MPC86xx 73 help 74 Enable Freescale DDR2 controller for MPC86xx SoCs. 75 76 config SYS_FSL_DDRC_GEN3 77 bool 78 depends on PPC 79 help 80 Enable Freescale DDR3 controller for PowerPC SoCs. 81 82 config SYS_FSL_DDRC_ARM_GEN3 83 bool 84 depends on ARM 85 help 86 Enable Freescale DDR3 controller for ARM SoCs. 87 88 config SYS_FSL_DDRC_GEN4 89 bool 90 help 91 Enable Freescale DDR4 controller. 92 93 config SYS_FSL_HAS_DDR4 94 bool 95 96 config SYS_FSL_HAS_DDR3 97 bool 98 99 config SYS_FSL_HAS_DDR2 100 bool 101 102 config SYS_FSL_HAS_DDR1 103 bool 104 105 choice 106 prompt "DDR technology" 107 default SYS_FSL_DDR4 if SYS_FSL_HAS_DDR4 108 default SYS_FSL_DDR3 if SYS_FSL_HAS_DDR3 109 default SYS_FSL_DDR2 if SYS_FSL_HAS_DDR2 110 default SYS_FSL_DDR1 if SYS_FSL_HAS_DDR1 111 112 config SYS_FSL_DDR4 113 bool "Freescale DDR4 controller" 114 depends on SYS_FSL_HAS_DDR4 115 select SYS_FSL_DDRC_GEN4 116 117 config SYS_FSL_DDR3 118 bool "Freescale DDR3 controller" 119 depends on SYS_FSL_HAS_DDR3 120 select SYS_FSL_DDRC_GEN3 if PPC 121 select SYS_FSL_DDRC_ARM_GEN3 if ARM 122 123 config SYS_FSL_DDR2 124 bool "Freescale DDR2 controller" 125 depends on SYS_FSL_HAS_DDR2 126 select SYS_FSL_DDRC_GEN2 if (!MPC86xx && !SYS_FSL_DDRC_GEN3) 127 select SYS_FSL_DDRC_86XX_GEN2 if MPC86xx 128 129 config SYS_FSL_DDR1 130 bool "Freescale DDR1 controller" 131 depends on SYS_FSL_HAS_DDR1 132 select SYS_FSL_DDRC_GEN1 133 134 endchoice 135 136 endmenu 137 138 config SYS_FSL_ERRATUM_A008378 139 bool 140 141 config SYS_FSL_ERRATUM_A008511 142 bool 143 144 config SYS_FSL_ERRATUM_A009663 145 bool 146 147 config SYS_FSL_ERRATUM_A009801 148 bool 149 150 config SYS_FSL_ERRATUM_A009803 151 bool 152 153 config SYS_FSL_ERRATUM_A009942 154 bool 155 156 config SYS_FSL_ERRATUM_A010165 157 bool 158 159 config SYS_FSL_ERRATUM_NMG_DDR120 160 bool 161 162 config SYS_FSL_ERRATUM_DDR_115 163 bool 164 165 config SYS_FSL_ERRATUM_DDR111_DDR134 166 bool 167 168 config SYS_FSL_ERRATUM_DDR_A003 169 bool 170 171 config SYS_FSL_ERRATUM_DDR_A003474 172 bool 173
