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      1 # SPDX-License-Identifier: GPL-2.0
      2 #
      3 # Copyright 2008-2014 Freescale Semiconductor, Inc.
      4 
      5 obj-$(CONFIG_SYS_FSL_DDR1) += main.o util.o ctrl_regs.o options.o \
      6 				lc_common_dimm_params.o
      7 obj-$(CONFIG_SYS_FSL_DDR2) += main.o util.o ctrl_regs.o options.o \
      8 				lc_common_dimm_params.o
      9 obj-$(CONFIG_SYS_FSL_DDR3) += main.o util.o ctrl_regs.o options.o \
     10 				lc_common_dimm_params.o
     11 obj-$(CONFIG_SYS_FSL_DDR4) += main.o util.o ctrl_regs.o options.o \
     12 				lc_common_dimm_params.o
     13 
     14 ifdef CONFIG_DDR_SPD
     15 SPD := y
     16 endif
     17 ifdef CONFIG_SPD_EEPROM
     18 SPD := y
     19 endif
     20 ifdef SPD
     21 obj-$(CONFIG_SYS_FSL_DDR1)	+= ddr1_dimm_params.o
     22 obj-$(CONFIG_SYS_FSL_DDR2)	+= ddr2_dimm_params.o
     23 obj-$(CONFIG_SYS_FSL_DDR3)	+= ddr3_dimm_params.o
     24 obj-$(CONFIG_SYS_FSL_DDR4)	+= ddr4_dimm_params.o
     25 endif
     26 
     27 obj-$(CONFIG_FSL_DDR_INTERACTIVE)	+= interactive.o
     28 obj-$(CONFIG_SYS_FSL_DDRC_GEN1)	+= mpc85xx_ddr_gen1.o
     29 obj-$(CONFIG_SYS_FSL_DDRC_GEN2)	+= mpc85xx_ddr_gen2.o
     30 obj-$(CONFIG_SYS_FSL_DDRC_GEN3)	+= mpc85xx_ddr_gen3.o
     31 obj-$(CONFIG_SYS_FSL_DDRC_86XX_GEN2)	+= mpc86xx_ddr.o
     32 obj-$(CONFIG_SYS_FSL_DDRC_ARM_GEN3)	+= arm_ddr_gen3.o
     33 obj-$(CONFIG_SYS_FSL_DDRC_GEN4) += fsl_ddr_gen4.o
     34 obj-$(CONFIG_SYS_FSL_MMDC) += fsl_mmdc.o
     35