1 // SPDX-License-Identifier: BSD-3-Clause 2 /* 3 * Copyright (C) 2012-2017 Altera Corporation <www.altera.com> 4 * All rights reserved. 5 */ 6 7 #include <common.h> 8 #include <asm/io.h> 9 #include <linux/errno.h> 10 #include <asm/arch/fpga_manager.h> 11 #include <asm/arch/reset_manager.h> 12 #include <asm/arch/system_manager.h> 13 14 /* Timeout count */ 15 #define FPGA_TIMEOUT_CNT 0x1000000 16 17 static struct socfpga_fpga_manager *fpgamgr_regs = 18 (struct socfpga_fpga_manager *)SOCFPGA_FPGAMGRREGS_ADDRESS; 19 20 int fpgamgr_dclkcnt_set(unsigned long cnt) 21 { 22 unsigned long i; 23 24 /* Clear any existing done status */ 25 if (readl(&fpgamgr_regs->dclkstat)) 26 writel(0x1, &fpgamgr_regs->dclkstat); 27 28 /* Write the dclkcnt */ 29 writel(cnt, &fpgamgr_regs->dclkcnt); 30 31 /* Wait till the dclkcnt done */ 32 for (i = 0; i < FPGA_TIMEOUT_CNT; i++) { 33 if (!readl(&fpgamgr_regs->dclkstat)) 34 continue; 35 36 writel(0x1, &fpgamgr_regs->dclkstat); 37 return 0; 38 } 39 40 return -ETIMEDOUT; 41 } 42 43 /* Write the RBF data to FPGA Manager */ 44 void fpgamgr_program_write(const void *rbf_data, size_t rbf_size) 45 { 46 uint32_t src = (uint32_t)rbf_data; 47 uint32_t dst = SOCFPGA_FPGAMGRDATA_ADDRESS; 48 49 /* Number of loops for 32-byte long copying. */ 50 uint32_t loops32 = rbf_size / 32; 51 /* Number of loops for 4-byte long copying + trailing bytes */ 52 uint32_t loops4 = DIV_ROUND_UP(rbf_size % 32, 4); 53 54 asm volatile( 55 " cmp %2, #0\n" 56 " beq 2f\n" 57 "1: ldmia %0!, {r0-r7}\n" 58 " stmia %1!, {r0-r7}\n" 59 " sub %1, #32\n" 60 " subs %2, #1\n" 61 " bne 1b\n" 62 "2: cmp %3, #0\n" 63 " beq 4f\n" 64 "3: ldr %2, [%0], #4\n" 65 " str %2, [%1]\n" 66 " subs %3, #1\n" 67 " bne 3b\n" 68 "4: nop\n" 69 : "+r"(src), "+r"(dst), "+r"(loops32), "+r"(loops4) : 70 : "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", "cc"); 71 } 72 73
