1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * Copyright (C) 2012-2020 ASPEED Technology Inc. 4 * Copyright 2016 IBM Corporation 5 * Copyright 2017 Google, Inc. 6 */ 7 8 #include <common.h> 9 #include <clk.h> 10 #include <dm.h> 11 #include <errno.h> 12 #include <fdtdec.h> 13 #include <i2c.h> 14 #include <asm/io.h> 15 #include <asm/arch/scu_ast2500.h> 16 17 #include "ast_i2c.h" 18 19 #define I2C_TIMEOUT_US 100000 20 #define I2C_SLEEP_STEP_US 20 21 22 #define HIGHSPEED_TTIMEOUT 3 23 24 /* 25 * Device private data 26 */ 27 struct ast_i2c_priv { 28 /* This device's clock */ 29 struct clk clk; 30 /* Device registers */ 31 struct ast_i2c_regs *regs; 32 /* I2C speed in Hz */ 33 int speed; 34 }; 35 36 /* 37 * Given desired divider ratio, return the value that needs to be set 38 * in Clock and AC Timing Control register 39 */ 40 static u32 get_clk_reg_val(ulong divider_ratio) 41 { 42 ulong inc = 0, div; 43 ulong scl_low, scl_high, data; 44 45 for (div = 0; divider_ratio >= 16; div++) { 46 inc |= (divider_ratio & 1); 47 divider_ratio >>= 1; 48 } 49 divider_ratio += inc; 50 scl_low = (divider_ratio >> 1) - 1; 51 scl_high = divider_ratio - scl_low - 2; 52 data = I2CD_CACTC_BASE 53 | (scl_high << I2CD_TCKHIGH_SHIFT) 54 | (scl_low << I2CD_TCKLOW_SHIFT) 55 | (div << I2CD_BASE_DIV_SHIFT); 56 57 return data; 58 } 59 60 static void ast_i2c_clear_interrupts(struct udevice *dev) 61 { 62 struct ast_i2c_priv *priv = dev_get_priv(dev); 63 64 writel(~0, &priv->regs->isr); 65 } 66 67 static void ast_i2c_init_bus(struct udevice *dev) 68 { 69 struct ast_i2c_priv *priv = dev_get_priv(dev); 70 71 /* Reset device */ 72 writel(0, &priv->regs->fcr); 73 /* Enable Master Mode. Assuming single-master */ 74 writel(I2CD_MASTER_EN 75 | I2CD_M_SDA_LOCK_EN 76 | I2CD_MULTI_MASTER_DIS | I2CD_M_SCL_DRIVE_EN, 77 &priv->regs->fcr); 78 /* Enable Interrupts */ 79 writel(I2CD_INTR_TX_ACK 80 | I2CD_INTR_TX_NAK 81 | I2CD_INTR_RX_DONE 82 | I2CD_INTR_BUS_RECOVER_DONE 83 | I2CD_INTR_NORMAL_STOP 84 | I2CD_INTR_ABNORMAL, &priv->regs->icr); 85 } 86 87 static int ast_i2c_ofdata_to_platdata(struct udevice *dev) 88 { 89 struct ast_i2c_priv *priv = dev_get_priv(dev); 90 int ret; 91 92 priv->regs = devfdt_get_addr_ptr(dev); 93 if (IS_ERR(priv->regs)) 94 return PTR_ERR(priv->regs); 95 96 ret = clk_get_by_index(dev, 0, &priv->clk); 97 if (ret < 0) { 98 debug("%s: Can't get clock for %s: %d\n", __func__, dev->name, 99 ret); 100 return ret; 101 } 102 103 return 0; 104 } 105 106 static int ast_i2c_probe(struct udevice *dev) 107 { 108 struct ast2500_scu *scu; 109 110 debug("Enabling I2C%u\n", dev->seq); 111 112 /* 113 * Get all I2C devices out of Reset. 114 * Only needs to be done once, but doing it for every 115 * device does not hurt. 116 */ 117 scu = ast_get_scu(); 118 ast_scu_unlock(scu); 119 clrbits_le32(&scu->sysreset_ctrl1, SCU_SYSRESET_I2C); 120 ast_scu_lock(scu); 121 122 ast_i2c_init_bus(dev); 123 124 return 0; 125 } 126 127 static int ast_i2c_wait_isr(struct udevice *dev, u32 flag) 128 { 129 struct ast_i2c_priv *priv = dev_get_priv(dev); 130 int timeout = I2C_TIMEOUT_US; 131 132 while (!(readl(&priv->regs->isr) & flag) && timeout > 0) { 133 udelay(I2C_SLEEP_STEP_US); 134 timeout -= I2C_SLEEP_STEP_US; 135 } 136 137 ast_i2c_clear_interrupts(dev); 138 if (timeout <= 0) 139 return -ETIMEDOUT; 140 141 return 0; 142 } 143 144 static int ast_i2c_send_stop(struct udevice *dev) 145 { 146 struct ast_i2c_priv *priv = dev_get_priv(dev); 147 148 writel(I2CD_M_STOP_CMD, &priv->regs->csr); 149 150 return ast_i2c_wait_isr(dev, I2CD_INTR_NORMAL_STOP); 151 } 152 153 static int ast_i2c_wait_tx(struct udevice *dev) 154 { 155 struct ast_i2c_priv *priv = dev_get_priv(dev); 156 int timeout = I2C_TIMEOUT_US; 157 u32 flag = I2CD_INTR_TX_ACK | I2CD_INTR_TX_NAK; 158 u32 status = readl(&priv->regs->isr) & flag; 159 int ret = 0; 160 161 while (!status && timeout > 0) { 162 status = readl(&priv->regs->isr) & flag; 163 udelay(I2C_SLEEP_STEP_US); 164 timeout -= I2C_SLEEP_STEP_US; 165 } 166 167 if (status == I2CD_INTR_TX_NAK) 168 ret = -EREMOTEIO; 169 170 if (timeout <= 0) 171 ret = -ETIMEDOUT; 172 173 ast_i2c_clear_interrupts(dev); 174 175 return ret; 176 } 177 178 static int ast_i2c_start_txn(struct udevice *dev, uint devaddr) 179 { 180 struct ast_i2c_priv *priv = dev_get_priv(dev); 181 182 /* Start and Send Device Address */ 183 writel(devaddr, &priv->regs->trbbr); 184 writel(I2CD_M_START_CMD | I2CD_M_TX_CMD, &priv->regs->csr); 185 186 return ast_i2c_wait_tx(dev); 187 } 188 189 static int ast_i2c_read_data(struct udevice *dev, u8 chip_addr, u8 *buffer, 190 size_t len, bool send_stop) 191 { 192 struct ast_i2c_priv *priv = dev_get_priv(dev); 193 u32 i2c_cmd = I2CD_M_RX_CMD; 194 int ret; 195 196 ret = ast_i2c_start_txn(dev, (chip_addr << 1) | I2C_M_RD); 197 if (ret < 0) 198 return ret; 199 200 for (; len > 0; len--, buffer++) { 201 if (len == 1) 202 i2c_cmd |= I2CD_M_S_RX_CMD_LAST; 203 writel(i2c_cmd, &priv->regs->csr); 204 ret = ast_i2c_wait_isr(dev, I2CD_INTR_RX_DONE); 205 if (ret < 0) 206 return ret; 207 *buffer = (readl(&priv->regs->trbbr) & I2CD_RX_DATA_MASK) 208 >> I2CD_RX_DATA_SHIFT; 209 } 210 ast_i2c_clear_interrupts(dev); 211 212 if (send_stop) 213 return ast_i2c_send_stop(dev); 214 215 return 0; 216 } 217 218 static int ast_i2c_write_data(struct udevice *dev, u8 chip_addr, u8 219 *buffer, size_t len, bool send_stop) 220 { 221 struct ast_i2c_priv *priv = dev_get_priv(dev); 222 int ret; 223 224 ret = ast_i2c_start_txn(dev, (chip_addr << 1)); 225 if (ret < 0) 226 return ret; 227 228 for (; len > 0; len--, buffer++) { 229 writel(*buffer, &priv->regs->trbbr); 230 writel(I2CD_M_TX_CMD, &priv->regs->csr); 231 ret = ast_i2c_wait_tx(dev); 232 if (ret < 0) 233 return ret; 234 } 235 236 if (send_stop) 237 return ast_i2c_send_stop(dev); 238 239 return 0; 240 } 241 242 static int ast_i2c_deblock(struct udevice *dev) 243 { 244 struct ast_i2c_priv *priv = dev_get_priv(dev); 245 struct ast_i2c_regs *regs = priv->regs; 246 u32 csr = readl(®s->csr); 247 bool sda_high = csr & I2CD_SDA_LINE_STS; 248 bool scl_high = csr & I2CD_SCL_LINE_STS; 249 int ret = 0; 250 251 if (sda_high && scl_high) { 252 /* Bus is idle, no deblocking needed. */ 253 return 0; 254 } else if (sda_high) { 255 /* Send stop command */ 256 debug("Unterminated TXN in (%x), sending stop\n", csr); 257 ret = ast_i2c_send_stop(dev); 258 } else if (scl_high) { 259 /* Possibly stuck slave */ 260 debug("Bus stuck (%x), attempting recovery\n", csr); 261 writel(I2CD_BUS_RECOVER_CMD, ®s->csr); 262 ret = ast_i2c_wait_isr(dev, I2CD_INTR_BUS_RECOVER_DONE); 263 } else { 264 /* Just try to reinit the device. */ 265 ast_i2c_init_bus(dev); 266 } 267 268 return ret; 269 } 270 271 static int ast_i2c_xfer(struct udevice *dev, struct i2c_msg *msg, int nmsgs) 272 { 273 int ret; 274 275 ret = ast_i2c_deblock(dev); 276 if (ret < 0) 277 return ret; 278 279 debug("i2c_xfer: %d messages\n", nmsgs); 280 for (; nmsgs > 0; nmsgs--, msg++) { 281 if (msg->flags & I2C_M_RD) { 282 debug("i2c_read: chip=0x%x, len=0x%x, flags=0x%x\n", 283 msg->addr, msg->len, msg->flags); 284 ret = ast_i2c_read_data(dev, msg->addr, msg->buf, 285 msg->len, (nmsgs == 1)); 286 } else { 287 debug("i2c_write: chip=0x%x, len=0x%x, flags=0x%x\n", 288 msg->addr, msg->len, msg->flags); 289 ret = ast_i2c_write_data(dev, msg->addr, msg->buf, 290 msg->len, (nmsgs == 1)); 291 } 292 if (ret) { 293 debug("%s: error (%d)\n", __func__, ret); 294 return -EREMOTEIO; 295 } 296 } 297 298 return 0; 299 } 300 301 static int ast_i2c_set_speed(struct udevice *dev, unsigned int speed) 302 { 303 struct ast_i2c_priv *priv = dev_get_priv(dev); 304 struct ast_i2c_regs *regs = priv->regs; 305 ulong i2c_rate, divider; 306 307 debug("Setting speed for I2C%d to <%u>\n", dev->seq, speed); 308 if (!speed) { 309 debug("No valid speed specified\n"); 310 return -EINVAL; 311 } 312 313 i2c_rate = clk_get_rate(&priv->clk); 314 divider = i2c_rate / speed; 315 316 priv->speed = speed; 317 if (speed > I2C_HIGHSPEED_RATE) { 318 debug("Enable High Speed\n"); 319 setbits_le32(®s->fcr, I2CD_M_HIGH_SPEED_EN 320 | I2CD_M_SDA_DRIVE_1T_EN 321 | I2CD_SDA_DRIVE_1T_EN); 322 writel(HIGHSPEED_TTIMEOUT, ®s->cactcr2); 323 } else { 324 debug("Enabling Normal Speed\n"); 325 writel(I2CD_NO_TIMEOUT_CTRL, ®s->cactcr2); 326 } 327 328 writel(get_clk_reg_val(divider), ®s->cactcr1); 329 ast_i2c_clear_interrupts(dev); 330 331 return 0; 332 } 333 334 static const struct dm_i2c_ops ast_i2c_ops = { 335 .xfer = ast_i2c_xfer, 336 .set_bus_speed = ast_i2c_set_speed, 337 .deblock = ast_i2c_deblock, 338 }; 339 340 static const struct udevice_id ast_i2c_ids[] = { 341 { .compatible = "aspeed,ast2400-i2c-bus" }, 342 { .compatible = "aspeed,ast2500-i2c-bus" }, 343 { }, 344 }; 345 346 U_BOOT_DRIVER(ast_i2c) = { 347 .name = "ast_i2c", 348 .id = UCLASS_I2C, 349 .of_match = ast_i2c_ids, 350 .probe = ast_i2c_probe, 351 .ofdata_to_platdata = ast_i2c_ofdata_to_platdata, 352 .priv_auto_alloc_size = sizeof(struct ast_i2c_priv), 353 .ops = &ast_i2c_ops, 354 }; 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