1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * (C) Copyright 2001, 2002, 2003 4 * Wolfgang Denk, DENX Software Engineering, wd (at) denx.de. 5 * Keith Outwater, keith_outwater (at) mvis.com` 6 * Steven Scholz, steven.scholz (at) imc-berlin.de 7 */ 8 9 /* 10 * Date & Time support (no alarms) for Dallas Semiconductor (now Maxim) 11 * DS1374 Real Time Clock (RTC). 12 * 13 * based on ds1337.c 14 */ 15 16 #include <common.h> 17 #include <command.h> 18 #include <rtc.h> 19 #include <i2c.h> 20 21 #if defined(CONFIG_CMD_DATE) 22 23 /*---------------------------------------------------------------------*/ 24 #undef DEBUG_RTC 25 #define DEBUG_RTC 26 27 #ifdef DEBUG_RTC 28 #define DEBUGR(fmt,args...) printf(fmt ,##args) 29 #else 30 #define DEBUGR(fmt,args...) 31 #endif 32 /*---------------------------------------------------------------------*/ 33 34 #ifndef CONFIG_SYS_I2C_RTC_ADDR 35 # define CONFIG_SYS_I2C_RTC_ADDR 0x68 36 #endif 37 38 #if defined(CONFIG_RTC_DS1374) && (CONFIG_SYS_I2C_SPEED > 400000) 39 # error The DS1374 is specified up to 400kHz in fast mode! 40 #endif 41 42 /* 43 * RTC register addresses 44 */ 45 #define RTC_TOD_CNT_BYTE0_ADDR 0x00 /* TimeOfDay */ 46 #define RTC_TOD_CNT_BYTE1_ADDR 0x01 47 #define RTC_TOD_CNT_BYTE2_ADDR 0x02 48 #define RTC_TOD_CNT_BYTE3_ADDR 0x03 49 50 #define RTC_WD_ALM_CNT_BYTE0_ADDR 0x04 51 #define RTC_WD_ALM_CNT_BYTE1_ADDR 0x05 52 #define RTC_WD_ALM_CNT_BYTE2_ADDR 0x06 53 54 #define RTC_CTL_ADDR 0x07 /* RTC-CoNTrol-register */ 55 #define RTC_SR_ADDR 0x08 /* RTC-StatusRegister */ 56 #define RTC_TCS_DS_ADDR 0x09 /* RTC-TrickleChargeSelect DiodeSelect-register */ 57 58 #define RTC_CTL_BIT_AIE (1<<0) /* Bit 0 - Alarm Interrupt enable */ 59 #define RTC_CTL_BIT_RS1 (1<<1) /* Bit 1/2 - Rate Select square wave output */ 60 #define RTC_CTL_BIT_RS2 (1<<2) /* Bit 2/2 - Rate Select square wave output */ 61 #define RTC_CTL_BIT_WDSTR (1<<3) /* Bit 3 - Watchdog Reset Steering */ 62 #define RTC_CTL_BIT_BBSQW (1<<4) /* Bit 4 - Battery-Backed Square-Wave */ 63 #define RTC_CTL_BIT_WD_ALM (1<<5) /* Bit 5 - Watchdoc/Alarm Counter Select */ 64 #define RTC_CTL_BIT_WACE (1<<6) /* Bit 6 - Watchdog/Alarm Counter Enable WACE*/ 65 #define RTC_CTL_BIT_EN_OSC (1<<7) /* Bit 7 - Enable Oscilator */ 66 67 #define RTC_SR_BIT_AF 0x01 /* Bit 0 = Alarm Flag */ 68 #define RTC_SR_BIT_OSF 0x80 /* Bit 7 - Osc Stop Flag */ 69 70 const char RtcTodAddr[] = { 71 RTC_TOD_CNT_BYTE0_ADDR, 72 RTC_TOD_CNT_BYTE1_ADDR, 73 RTC_TOD_CNT_BYTE2_ADDR, 74 RTC_TOD_CNT_BYTE3_ADDR 75 }; 76 77 static uchar rtc_read (uchar reg); 78 static void rtc_write(uchar reg, uchar val, bool set); 79 static void rtc_write_raw (uchar reg, uchar val); 80 81 /* 82 * Get the current time from the RTC 83 */ 84 int rtc_get (struct rtc_time *tm){ 85 int rel = 0; 86 unsigned long time1, time2; 87 unsigned int limit; 88 unsigned char tmp; 89 unsigned int i; 90 91 /* 92 * Since the reads are being performed one byte at a time, 93 * there is a chance that a carry will occur during the read. 94 * To detect this, 2 reads are performed and compared. 95 */ 96 limit = 10; 97 do { 98 i = 4; 99 time1 = 0; 100 while (i--) { 101 tmp = rtc_read(RtcTodAddr[i]); 102 time1 = (time1 << 8) | (tmp & 0xff); 103 } 104 105 i = 4; 106 time2 = 0; 107 while (i--) { 108 tmp = rtc_read(RtcTodAddr[i]); 109 time2 = (time2 << 8) | (tmp & 0xff); 110 } 111 } while ((time1 != time2) && limit--); 112 113 if (time1 != time2) { 114 printf("can't get consistent time from rtc chip\n"); 115 rel = -1; 116 } 117 118 DEBUGR ("Get RTC s since 1.1.1970: %ld\n", time1); 119 120 rtc_to_tm(time1, tm); /* To Gregorian Date */ 121 122 if (rtc_read(RTC_SR_ADDR) & RTC_SR_BIT_OSF) { 123 printf ("### Warning: RTC oscillator has stopped\n"); 124 rel = -1; 125 } 126 127 DEBUGR ("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", 128 tm->tm_year, tm->tm_mon, tm->tm_mday, tm->tm_wday, 129 tm->tm_hour, tm->tm_min, tm->tm_sec); 130 131 return rel; 132 } 133 134 /* 135 * Set the RTC 136 */ 137 int rtc_set (struct rtc_time *tmp){ 138 139 unsigned long time; 140 unsigned i; 141 142 DEBUGR ("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", 143 tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday, 144 tmp->tm_hour, tmp->tm_min, tmp->tm_sec); 145 146 if (tmp->tm_year < 1970 || tmp->tm_year > 2069) 147 printf("WARNING: year should be between 1970 and 2069!\n"); 148 149 time = rtc_mktime(tmp); 150 151 DEBUGR ("Set RTC s since 1.1.1970: %ld (0x%02lx)\n", time, time); 152 153 /* write to RTC_TOD_CNT_BYTEn_ADDR */ 154 for (i = 0; i <= 3; i++) { 155 rtc_write_raw(RtcTodAddr[i], (unsigned char)(time & 0xff)); 156 time = time >> 8; 157 } 158 159 /* Start clock */ 160 rtc_write(RTC_CTL_ADDR, RTC_CTL_BIT_EN_OSC, false); 161 162 return 0; 163 } 164 165 /* 166 * Reset the RTC. We setting the date back to 1970-01-01. 167 * We also enable the oscillator output on the SQW/OUT pin and program 168 * it for 32,768 Hz output. Note that according to the datasheet, turning 169 * on the square wave output increases the current drain on the backup 170 * battery to something between 480nA and 800nA. 171 */ 172 void rtc_reset (void){ 173 174 /* clear status flags */ 175 rtc_write(RTC_SR_ADDR, (RTC_SR_BIT_AF|RTC_SR_BIT_OSF), false); /* clearing OSF and AF */ 176 177 /* Initialise DS1374 oriented to MPC8349E-ADS */ 178 rtc_write (RTC_CTL_ADDR, (RTC_CTL_BIT_EN_OSC 179 |RTC_CTL_BIT_WACE 180 |RTC_CTL_BIT_AIE), false);/* start osc, disable WACE, clear AIE 181 - set to 0 */ 182 rtc_write (RTC_CTL_ADDR, (RTC_CTL_BIT_WD_ALM 183 |RTC_CTL_BIT_WDSTR 184 |RTC_CTL_BIT_RS1 185 |RTC_CTL_BIT_RS2 186 |RTC_CTL_BIT_BBSQW), true);/* disable WD/ALM, WDSTR set to INT-pin, 187 set BBSQW and SQW to 32k 188 - set to 1 */ 189 rtc_write(RTC_WD_ALM_CNT_BYTE2_ADDR, 0xAC, true); 190 rtc_write(RTC_WD_ALM_CNT_BYTE1_ADDR, 0xDE, true); 191 rtc_write(RTC_WD_ALM_CNT_BYTE2_ADDR, 0xAD, true); 192 } 193 194 /* 195 * Helper functions 196 */ 197 static uchar rtc_read (uchar reg) 198 { 199 return (i2c_reg_read (CONFIG_SYS_I2C_RTC_ADDR, reg)); 200 } 201 202 static void rtc_write(uchar reg, uchar val, bool set) 203 { 204 if (set == true) { 205 val |= i2c_reg_read (CONFIG_SYS_I2C_RTC_ADDR, reg); 206 i2c_reg_write (CONFIG_SYS_I2C_RTC_ADDR, reg, val); 207 } else { 208 val = i2c_reg_read (CONFIG_SYS_I2C_RTC_ADDR, reg) & ~val; 209 i2c_reg_write (CONFIG_SYS_I2C_RTC_ADDR, reg, val); 210 } 211 } 212 213 static void rtc_write_raw (uchar reg, uchar val) 214 { 215 i2c_reg_write (CONFIG_SYS_I2C_RTC_ADDR, reg, val); 216 } 217 #endif 218
